Lines Matching refs:CS
357 #define CS(a) (0x0020| (a)) /* control/status */
378 * CS register (read only)
380 #define CSRA CS(0) /* control/status register address */
381 #define CSFA CS(2) /* control/status FIFO BUSY ... */
382 #define ISRA CS(4) /* first int. source register address */
383 #define ISR2 CS(6) /* second int. source register address */
384 #define LEDR CS(0x0c) /* LED register r/w */
385 #define CSIL CS(0x10) /* I/O mapped POS_ID_low (100) */
386 #define CSIH CS(0x12) /* - " - POS_ID_HIGH (101) */
387 #define CSA CS(0x14) /* - " - POS_102 */
388 #define CSM CS(0x0e) /* - " - POS_103 */
389 #define CSM_FM1 CS(0x16) /* - " - POS_103 (copy in FM1) */
390 #define CSI CS(0x18) /* - " - POS_104 */
391 #define CSS CS(0x1a) /* - " - POS_105 */
392 #define CSP_06 CS(0x1c) /* - " - POS_106 */
427 * CS register (write only)
429 #define HSR(p) CS(0x18|(p)) /* Host request register */
472 * CS(0) CONTROLS
488 * CS(2) FIFOSTAT
540 #define CS_A(a) ADDR(CS(a)) /* control/status */
576 #define BYPASS(o) CS(0x10|(o)) /* o=STAT_BYP || STAT_INS */
578 #define IRQ_TC_EN CS(0x0b) /* enable/disable IRQ on TC */
579 #define IRQ_TC_DIS CS(0x0a)
580 #define IRQ_TOKEN_EN CS(9) /* enable/disable IRQ on restr. Token */
581 #define IRQ_TOKEN_DIS CS(8)
582 #define IRQ_CHCK_EN CS(7) /* -"- IRQ after CHCK line */
583 #define IRQ_CHCK_DIS CS(6)
584 #define IRQ_OTH_EN CS(5) /* -"- other IRQ's */
585 #define IRQ_OTH_DIS CS(4)
586 #define FIFO_EN CS(3) /* disable (reset), enable FIFO */
587 #define FIFO_RESET CS(2)
588 #define CARD_EN CS(1) /* disable (reset), enable card */
589 #define CARD_DIS CS(0)
998 #define PCI_PATCH_DIR_2 (1L<<8) /* Bit 8 CS for MicroWire */
1003 #define PCI_EXT_PATCH_2 (1L<<4) /* Bit 4 CS for MicroWire */