Lines Matching refs:Reg
329 XM_OUT32(IoC, Port, XM_MODE, 0x00000000); /* clear Mode Reg */
330 XM_OUT16(IoC, Port, XM_TX_CMD, 0x0000); /* reset TX CMD Reg */
331 XM_OUT16(IoC, Port, XM_RX_CMD, 0x0000); /* reset RX CMD Reg */
387 SK_U32 Reg;
417 SK_IN32(IoC, B2_GP_IO, &Reg);
419 Reg |= GP_DIR_0; /* set to output */
420 Reg &= ~GP_IO_0;
423 Reg |= GP_DIR_2; /* set to output */
424 Reg &= ~GP_IO_2;
426 SK_OUT32(IoC, B2_GP_IO, Reg);
429 SK_IN32(IoC, B2_GP_IO, &Reg);
456 SK_U32 Reg;
488 SK_IN32(IoC, B2_GP_IO, &Reg);
490 Reg |= GP_DIR_0; /* Set to output. */
491 Reg |= GP_IO_0;
494 Reg |= GP_DIR_2; /* Set to output. */
495 Reg |= GP_IO_2;
497 SK_OUT32(IoC, B2_GP_IO, Reg);
520 /* SK_IN32(IoC, 0x012c, &Reg); */
569 /* SK_IN32(IoC, 0x012c, &Reg); */
1060 ("1000Base-T Control Reg = %x\n", Ctrl2));
1065 ("AutoNeg Advertisment Reg = %x\n", Ctrl3));
1089 ("PHY Control Reg = %x\n", Ctrl1));
1205 ("1000Base-T Control Reg = %x\n", Ctrl2));
1210 ("AutoNeg Advertisment Reg = %x\n", Ctrl3));
1228 ("PHY Control Reg = %x\n", Ctrl1));
1734 SK_U16 Reg; /* 16bit register value */
1776 XM_IN16(IoC, Port, XM_MMU_CMD, &Reg);
1780 Reg |= XM_MMU_GMII_FD;
1799 XM_OUT16(IoC, Port, XM_MMU_CMD, Reg | XM_MMU_ENA_RX | XM_MMU_ENA_TX);