Lines Matching defs:hose
88 struct pci_controller *hose = dev->sysdata;
97 if (hose->first_busno == dev->bus->number)
102 addr |= hose->config_space_base;
206 titan_pci_tbi(struct pci_controller *hose, dma_addr_t start, dma_addr_t end)
209 (hose->index & 1) ? TITAN_pachip1 : TITAN_pachip0;
214 /* Get the right hose */
216 if (hose->index & 2)
249 titan_init_agp(titan_pachip_port *port, struct pci_controller *hose)
256 printk("AGP present on hose %d\n", hose->index);
268 TITAN_agp |= 1 << hose->index;
272 if (hose != NULL &&
273 __kernel_ldwu(*(vusp)(hose->config_space_base + 0x280a)) ==
275 set_vga_hose(hose);
282 struct pci_controller *hose;
285 hose = alloc_pci_controller();
287 pci_isa_hose = hose;
288 hose->io_space = alloc_resource();
289 hose->mem_space = alloc_resource();
295 hose->sparse_mem_base = 0;
296 hose->sparse_io_base = 0;
297 hose->dense_mem_base
299 hose->dense_io_base
302 hose->config_space_base = TITAN_CONF(index);
303 hose->index = index;
305 hose->io_space->start = TITAN_IO(index) - TITAN_IO_BIAS;
306 hose->io_space->end = hose->io_space->start + TITAN_IO_SPACE - 1;
307 hose->io_space->name = pci_io_names[index];
308 hose->io_space->flags = IORESOURCE_IO;
310 hose->mem_space->start = TITAN_MEM(index) - TITAN_MEM_BIAS;
311 hose->mem_space->end = hose->mem_space->start + 0xffffffff;
312 hose->mem_space->name = pci_mem_names[index];
313 hose->mem_space->flags = IORESOURCE_MEM;
315 if (request_resource(&ioport_resource, hose->io_space) < 0)
316 printk(KERN_ERR "Failed to request IO on hose %d\n", index);
317 if (request_resource(&iomem_resource, hose->mem_space) < 0)
318 printk(KERN_ERR "Failed to request MEM on hose %d\n", index);
321 titan_init_agp(port, hose);
352 hose->sg_isa = iommu_arena_new(hose, 0x00800000, 0x00800000, 0);
353 hose->sg_isa->align_entry = 8; /* 64KB for ISA */
355 hose->sg_pci = iommu_arena_new(hose, 0x40000000,
357 hose->sg_pci->align_entry = 4; /* Titan caches 4 PTEs at a time */
362 port->wsba[0].csr = hose->sg_isa->dma_base | 3;
363 port->wsm[0].csr = (hose->sg_isa->size - 1) & 0xfff00000;
364 port->tba[0].csr = virt_to_phys(hose->sg_isa->ptes);
366 port->wsba[1].csr = hose->sg_pci->dma_base | 3;
367 port->wsm[1].csr = (hose->sg_pci->size - 1) & 0xfff00000;
368 port->tba[1].csr = virt_to_phys(hose->sg_pci->ptes);
379 titan_pci_tbi(hose, 0, -1);
387 /* Init the ports in hose order... */
388 titan_init_one_pachip_port(&pachip0->g_port, 0); /* hose 0 */
390 titan_init_one_pachip_port(&pachip1->g_port, 1);/* hose 1 */
391 titan_init_one_pachip_port(&pachip0->a_port, 2); /* hose 2 */
393 titan_init_one_pachip_port(&pachip1->a_port, 3);/* hose 3 */