perf annotate mips: Add perf arch instructions annotate handlers

Support the MIPS architecture using the ins_ops association method. With
this patch, perf-annotate can work well on MIPS.

Testing it with a perf.data file collected on a mips machine:

$./perf annotate -i perf.data

: Disassembly of section .text:
:
: 00000000000be6a0 <get_next_seq>:
: get_next_seq():
0.00 : be6a0: lw v0,0(a0)
0.00 : be6a4: daddiu sp,sp,-128
0.00 : be6a8: ld a7,72(a0)
0.00 : be6ac: gssq s5,s4,80(sp)
0.00 : be6b0: gssq s1,s0,48(sp)
0.00 : be6b4: gssq s8,gp,112(sp)
0.00 : be6b8: gssq s7,s6,96(sp)
0.00 : be6bc: gssq s3,s2,64(sp)
0.00 : be6c0: sd a3,0(sp)
0.00 : be6c4: move s0,a0
0.00 : be6c8: sd v0,32(sp)
0.00 : be6cc: sd a5,8(sp)
0.00 : be6d0: sd zero,8(a0)
0.00 : be6d4: sd a6,16(sp)
0.00 : be6d8: ld s2,48(a0)
8.53 : be6dc: ld s1,40(a0)
9.42 : be6e0: ld v1,32(a0)
0.00 : be6e4: nop
0.00 : be6e8: ld s4,24(a0)
0.00 : be6ec: ld s5,16(a0)
0.00 : be6f0: sd a7,40(sp)
10.11 : be6f4: ld s6,64(a0)

...

The original patch link:
https://lore.kernel.org/patchwork/patch/1180480/

Signed-off-by: Dengcheng Zhu <dzhu@wavecomp.com>
Cc: Dengcheng Zhu <dzhu@wavecomp.com>
Cc: Jiaxun Yang <jiaxun.yang@flygoat.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Xuefeng Li <lixuefeng@loongson.cn>
Cc: linux-mips@vger.kernel.org
[ fanpeng@loongson.cn: Add missing "bgtzl", "bltzl", "bgezl", "blezl", "beql" and "bnel" for pre-R6processors ]
Signed-off-by: Peng Fan <fanpeng@loongson.cn>
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>