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4b3dbd70 |
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10-Jan-2024 |
Satya Priya Kakitapalli <quic_skakitap@quicinc.com> |
dt-bindings: clock: qcom,gcc-sm8150: Add gcc video resets for sm8150 Add gcc video axic, axi0 and axi1 resets for the global clock controller on sm8150. Signed-off-by: Satya Priya Kakitapalli <quic_skakitap@quicinc.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20240111-sm8150-dfs-support-v2-2-6edb44c83d3b@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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d1a16e34 |
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03-Mar-2022 |
Bhupesh Sharma <bhupesh.sharma@linaro.org> |
clk: qcom: gcc: Add emac GDSC support for SM8150 Add the EMAC GDSC defines and driver structures for SM8150. Cc: Stephen Boyd <sboyd@kernel.org> Cc: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220303084824.284946-4-bhupesh.sharma@linaro.org
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2fb605a1 |
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03-Mar-2022 |
Bhupesh Sharma <bhupesh.sharma@linaro.org> |
clk: qcom: gcc: Add UFS_CARD and UFS_PHY GDSCs for SM8150 Add the UFS_CARD and UFS_PHY GDSC defines & driver structures for SM8150. Cc: Stephen Boyd <sboyd@kernel.org> Cc: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220303082140.240745-2-bhupesh.sharma@linaro.org
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2dc63e76 |
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02-Mar-2022 |
Bhupesh Sharma <bhupesh.sharma@linaro.org> |
clk: qcom: gcc: Add PCIe0 and PCIe1 GDSC for SM8150 Add the PCIe0 and PCIe1 GDSC defines & driver structures for SM8150. Cc: Stephen Boyd <sboyd@kernel.org> Cc: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220302203045.184500-4-bhupesh.sharma@linaro.org
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8411aa50 |
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17-Mar-2020 |
Wesley Cheng <wcheng@codeaurora.org> |
clk: qcom: gcc: Add USB3 PIPE clock and GDSC for SM8150 This adds the USB3 PIPE clock and GDSC structures, so that the USB driver can vote for these resources to be enabled/disabled when required. Both are needed for SS and HS USB paths to operate properly. The GDSC will allow the USB system to be brought out of reset, while the PIPE clock is needed for data transactions between the PHY and controller. Signed-off-by: Wesley Cheng <wcheng@codeaurora.org> Link: https://lkml.kernel.org/r/1584478412-7798-2-git-send-email-wcheng@codeaurora.org Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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e5ee331e |
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22-Jul-2019 |
Deepak Katragadda <dkatraga@codeaurora.org> |
dt-bindings: clock: Document gcc bindings for SM8150 Document the global clock controller found on SM8150. Signed-off-by: Deepak Katragadda <dkatraga@codeaurora.org> Signed-off-by: Taniya Das <tdas@codeaurora.org> [vkoul: port to upstream and add external clocks split binding to this patch]] Signed-off-by: Vinod Koul <vkoul@kernel.org> Link: https://lkml.kernel.org/r/20190722074348.29582-5-vkoul@kernel.org Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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