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5d93cfcf |
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17-Oct-2022 |
Sean Anderson <sean.anderson@seco.com> |
net: dpaa: Convert to phylink This converts DPAA to phylink. All macs are converted. This should work with no device tree modifications (including those made in this series), except for QSGMII (as noted previously). The mEMAC configuration is one of the tricker areas. I have tried to capture all the restrictions across the various models. Most of the time, we assume that if the serdes supports a mode or the phy-interface-mode specifies it, then we support it. The only place we can't do this is (RG)MII, since there's no serdes. In that case, we rely on a (new) devicetree property. There are also several cases where half-duplex is broken. Unfortunately, only a single compatible is used for the MAC, so we have to use the board compatible instead. The 10GEC conversion is very straightforward, since it only supports XAUI. There is generally nothing to configure. The dTSEC conversion is broadly similar to mEMAC, but is simpler because we don't support configuring the SerDes (though this can be easily added) and we don't have multiple PCSs. From what I can tell, there's nothing different in the driver or documentation between SGMII and 1000BASE-X except for the advertising. Similarly, I couldn't find anything about 2500BASE-X. In both cases, I treat them like SGMII. These modes aren't used by any in-tree boards. Similarly, despite being mentioned in the driver, I couldn't find any documented SoCs which supported QSGMII. I have left it unimplemented for now. Signed-off-by: Sean Anderson <sean.anderson@seco.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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5b6acb55 |
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02-Sep-2022 |
Sean Anderson <sean.anderson@seco.com> |
net: fman: Specify type of mac_dev for exception_cb Instead of using a void pointer for mac_dev, specify its type explicitly. Signed-off-by: Sean Anderson <sean.anderson@seco.com> Acked-by: Camelia Groza <camelia.groza@nxp.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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19c788b1 |
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02-Sep-2022 |
Sean Anderson <sean.anderson@seco.com> |
net: fman: Use mac_dev for some params Some params are already present in mac_dev. Use them directly instead of passing them through params. Signed-off-by: Sean Anderson <sean.anderson@seco.com> Acked-by: Camelia Groza <camelia.groza@nxp.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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45fa34bf |
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02-Sep-2022 |
Sean Anderson <sean.anderson@seco.com> |
net: fman: Remove internal_phy_node from params This member was used to pass the phy node between mac_probe and the mac-specific initialization function. But now that the phy node is gotten in the initialization function, this parameter does not serve a purpose. Remove it, and do the grabbing of the node/grabbing of the phy in the same place. Signed-off-by: Sean Anderson <sean.anderson@seco.com> Acked-by: Camelia Groza <camelia.groza@nxp.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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aae73fde |
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17-Aug-2022 |
Sean Anderson <sean.anderson@seco.com> |
net: fman: dtsec: Always gracefully stop/start There are two ways that GRS can be set: graceful_stop and dtsec_isr. It is cleared by graceful_start. If it is already set before calling graceful_stop, then that means that dtsec_isr set it. In that case, we will not set GRS nor will we clear it (which seems like a bug?). For GTS the logic is similar, except that there is no one else messing with this bit (so we will always set and clear it). Simplify the logic by always setting/clearing GRS/GTS. This is less racy that the previous behavior, and ensures that we always end up clearing the bits. This can of course clear GRS while dtsec_isr is waiting, but because we have already done our own waiting it should be fine. This is the last user of enum comm_mode, so remove it. Signed-off-by: Sean Anderson <sean.anderson@seco.com> Acked-by: Camelia Groza <camelia.groza@nxp.com> Tested-by: Camelia Groza <camelia.groza@nxp.com> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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3207f715 |
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03-Aug-2020 |
Florinel Iordache <florinel.iordache@nxp.com> |
fsl/fman: fix eth hash table allocation Fix memory allocation for ethernet address hash table. The code was wrongly allocating an array for eth hash table which is incorrect because this is the main structure for eth hash table (struct eth_hash_t) that contains inside a number of elements. Fixes: 57ba4c9b56d8 ("fsl/fman: Add FMan MAC support") Signed-off-by: Florinel Iordache <florinel.iordache@nxp.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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07d8aafb |
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14-Sep-2016 |
Madalin Bucur <madalin.bucur@nxp.com> |
fsl/fman: remove leftover comment Signed-off-by: Madalin Bucur <madalin.bucur@nxp.com>
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99c1790e |
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10-Sep-2016 |
Michael Ellerman <mpe@ellerman.id.au> |
net: Remove NO_IRQ from powerpc-only network drivers We'd like to eventually remove NO_IRQ on powerpc, so remove usages of it from powerpc-only drivers. Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Signed-off-by: David S. Miller <davem@davemloft.net>
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57ba4c9b |
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20-Dec-2015 |
Igal Liberman <igal.liberman@freescale.com> |
fsl/fman: Add FMan MAC support Add the Data Path Acceleration Architecture Frame Manger MAC support. This patch adds The FMan MAC configuration, initialization and runtime control routines. This patch contains support for these types of MACs: - dTSEC: Three speed Ethernet controller (10/100/1000 Mbps) - tGEC: 10G Ethernet controller (10 Gbps) - mEMAC: Multi-rate Ethernet MAC (10/100/1000/10000 Mbps) Different FMan revisions have different type and number of MACs. Signed-off-by: Igal Liberman <igal.liberman@freescale.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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