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b59d810a |
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01-Jun-2022 |
Ben Skeggs <bskeggs@redhat.com> |
drm/nouveau/fault/tu102: switch to explicit intr handlers - reads vectors from HW, rather than being hardcoded - removes hacks to support routing via old interfaces Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Reviewed-by: Lyude Paul <lyude@redhat.com>
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55520832 |
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01-Jun-2022 |
Ben Skeggs <bskeggs@redhat.com> |
drm/nouveau/fault: switch non-replayable faults to nvkm_event_ntfy v2: fix flush_work() being called uninitialised during init Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Reviewed-by: Lyude Paul <lyude@redhat.com>
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77689f1b |
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03-Dec-2020 |
Ben Skeggs <bskeggs@redhat.com> |
drm/nouveau/fault: switch to instanced constructor Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Reviewed-by: Lyude Paul <lyude@redhat.com>
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0ac7facb |
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08-Dec-2019 |
Thierry Reding <treding@nvidia.com> |
drm/nouveau/fault: Add support for GP10B There is no BAR2 on GP10B and there is no need to map through BAR2 because all memory is shared between the GPU and the CPU. Add a custom implementation of the fault sub-device that uses nvkm_memory_addr() instead of nvkm_memory_bar2() to return the address of a pinned fault buffer. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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13e95729 |
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08-May-2018 |
Ben Skeggs <bskeggs@redhat.com> |
drm/nouveau/fault/gp100: expose MaxwellFaultBufferA This nvclass exposes the replayable fault buffer, which will be used by SVM to manage GPU page faults. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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17fb2807 |
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10-Dec-2018 |
Ben Skeggs <bskeggs@redhat.com> |
drm/nouveau/fault/tu104: initial support New registers. Currently uncertain how exactly to mask fault buffer interrupts. This will likely be corrected at around the same time as the new MC interrupt stuff has been properly figured out and implemented. For the moment, it shouldn't matter too much. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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3968d692 |
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10-Dec-2018 |
Ben Skeggs <bskeggs@redhat.com> |
drm/nouveau/fault: add explicit control over fault buffer interrupts The GPU will continually fire interrupts while a fault buffer GET != PUT, and to stop the spurious interrupts while the handler does its thing, we were disabling the fault buffer temporarily. This is not actually a great idea to begin with, and made worse by Volta resetting GET/PUT when it's reactivated. So, let's not do that. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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80972456 |
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10-Dec-2018 |
Ben Skeggs <bskeggs@redhat.com> |
drm/nouveau/fault: store get/put pri address in nvkm_fault_buffer Will allow more shared fault buffer handling code between Pascal/Volta. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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4d326469 |
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10-Dec-2018 |
Ben Skeggs <bskeggs@redhat.com> |
drm/nouveau/fault: remove manual mapping of fault buffers into BAR2 Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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60cda665 |
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12-Jun-2018 |
Ben Skeggs <bskeggs@redhat.com> |
drm/nouveau/fault/gv100: fix fault buffer initialisation Not sure how this happened, it worked last time I tested it! Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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36780d7e |
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08-May-2018 |
Ben Skeggs <bskeggs@redhat.com> |
drm/nouveau/fault: add infrastructure to support fault buffers GPU-specific support will be added separately. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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