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4e8303cf |
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11-Sep-2023 |
Lijo Lazar <lijo.lazar@amd.com> |
drm/amdgpu: Use function for IP version check Use an inline function for version check. Gives more flexibility to handle any format changes. Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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25faeddc |
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25-Mar-2022 |
Evan Quan <evan.quan@amd.com> |
drm/amdgpu: expand cg_flags from u32 to u64 With this, we can support more CG flags. Signed-off-by: Evan Quan <evan.quan@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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f06d9e4e |
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26-Jan-2022 |
Aaron Liu <aaron.liu@amd.com> |
drm/amdgpu: add 1.3.1/2.4.0 athub CG support This patch adds 1.3.1/2.4.0 athub clock gating support. Signed-off-by: Aaron Liu <aaron.liu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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1d789535 |
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04-Oct-2021 |
Alex Deucher <alexander.deucher@amd.com> |
drm/amdgpu: convert IP version array to include instances Allow us to query instances versions more cleanly. Instancing support is not consistent unfortunately. SDMA is a good example. Sienna cichlid has 4 total SDMA instances, each enumerated separately (HWIDs 42, 43, 68, 69). Arcturus has 8 total SDMA instances, but they are enumerated as multiple instances of the same HWIDs (4x HWID 42, 4x HWID 43). UMC is another example. On most chips there are multiple instances with the same HWID. This allows us to support both forms. v2: rebase v3: clarify instancing support Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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258fa17d |
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27-Jul-2021 |
Alex Deucher <alexander.deucher@amd.com> |
drm/amdgpu/athub2.1: convert to IP version checking Use IP versions rather than asic_type to differentiate IP version specific features. Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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d75caec8 |
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19-Mar-2021 |
Tao Zhou <tao.zhou1@amd.com> |
drm/amdgpu: support athub cg setting for beige_goby Enable athub cg for beige_goby. Signed-off-by: Tao Zhou <tao.zhou1@amd.com> Reviewed-by: Jiansong Chen <Jiansong.Chen@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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6c65a582 |
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22-Feb-2021 |
Jiapeng Chong <jiapeng.chong@linux.alibaba.com> |
drm/amdgpu: Remove unnecessary conversion to bool Fix the following coccicheck warnings: ./drivers/gpu/drm/amd/amdgpu/athub_v2_1.c:79:40-45: WARNING: conversion to bool not needed here. ./drivers/gpu/drm/amd/amdgpu/athub_v2_1.c:81:40-45: WARNING: conversion to bool not needed here. Reported-by: Abaci Robot <abaci@linux.alibaba.com> Signed-off-by: Jiapeng Chong <jiapeng.chong@linux.alibaba.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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beea33e1 |
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04-Jan-2021 |
Likun Gao <Likun.Gao@amd.com> |
drm/amdgpu: remove redundant include of navi10_enum Remove unnecessary include of navi10_enum header file. Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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e4ed4f50 |
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08-Aug-2020 |
Tao Zhou <tao.zhou1@amd.com> |
drm/amdgpu: support athub cg setting for dimgrey_cavefish Same as navy_flounder, the athub ip of dimgrey_cavefish is v2.1. Signed-off-by: Tao Zhou <tao.zhou1@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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cf4554fa |
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02-Jul-2020 |
Jiansong Chen <Jiansong.Chen@amd.com> |
drm/amdgpu: support athub cg setting for navy_flounder navy_flounder has athub ip v2.1. Signed-off-by: Jiansong Chen <Jiansong.Chen@amd.com> Reviewed-by: Tao Zhou <tao.zhou1@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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45d76eeb |
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25-Sep-2019 |
Likun Gao <Likun.Gao@amd.com> |
drm/amdgpu: add support for athub v2.1 Add athub v2.1 function and support to compile it. Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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