#
14d72af7 |
|
15-Jul-2021 |
周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com> |
MIPS: Ingenic: Add system type for new Ingenic SoCs. Add JZ4730, JZ4750, JZ4755, JZ4760, JZ4760B, X2000H, and X2100 system type for cat /proc/cpuinfo to give out JZ4730, JZ4750, JZ4755, JZ4760, JZ4760B, X2000H, and X2100. Signed-off-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com> Reviewed-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
|
#
6f3377bc |
|
21-Apr-2021 |
xiaochuan mao <maoxiaochuan@loongson.cn> |
mips/bootinfo:correct some comments of fw_arg from arch/mips/kernel/head.S we know that use a0~a3 for fw_arg0~fw_arg3 there is some code from head.S: LONG_S a0, fw_arg0 # firmware arguments LONG_S a1, fw_arg1 LONG_S a2, fw_arg2 LONG_S a3, fw_arg3 Signed-off-by: xiaochuan mao <maoxiaochuan@loongson.cn> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
|
#
b83ba0b9 |
|
27-Jan-2021 |
Thomas Bogendoerfer <tsbogend@alpha.franken.de> |
MIPS: of: Introduce helper function to get DTB Selection of the DTB to be used was burried in more or less readable code in head.S. Move this code into a inline helper function and use it. Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de> Acked-by: Florian Fainelli <f.fainelli@gmail.com>
|
#
e7ae8d17 |
|
09-Oct-2020 |
Thomas Bogendoerfer <tsbogend@alpha.franken.de> |
MIPS: replace add_memory_region with memblock add_memory_region was the old interface for registering memory and was already changed to used memblock internaly. Replace it by directly calling memblock functions. Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
|
#
a9fee3a5 |
|
21-Sep-2020 |
周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com> |
MIPS: Ingenic: Add system type for new Ingenic SoCs. Add JZ4775, X1000E, X2000, and X2000E system type for cat /proc/cpuinfo to give out JZ4775, X1000E, X2000 and X2000E. Signed-off-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com> Reviewed-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
|
#
0d10d17b |
|
21-Jul-2020 |
周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com> |
MIPS: X2000: Add X2000 system type. 1.Add "PRID_COMP_INGENIC_13" and "PRID_IMP_XBURST2" for X2000. 2.Add X2000 system type for cat /proc/cpuinfo to give out X2000. Signed-off-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
|
#
68c48f7c |
|
23-Jun-2020 |
Paul Cercueil <paul@crapouillou.net> |
MIPS: ingenic: Use enum instead of macros for Ingenic SoCs Use an enum instead of macros to represent the various versions of the Ingenic SoCs, and add some of the SoC versions that were previously missing. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
|
#
1b00767f |
|
20-Apr-2020 |
Thomas Bogendoerfer <tsbogend@alpha.franken.de> |
MIPS: Remove PMC MSP71xx platform No (active) developer owns this hardware, so let's remove Linux support. Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
|
#
2a3d47c9 |
|
21-Apr-2020 |
Tiezhu Yang <yangtiezhu@loongson.cn> |
MIPS: Cleanup code about plat_mem_setup() In the current code, plat_mem_setup() is called by arch_mem_init() instead of setup_arch() and has been declared in asm/bootinfo.h, so modify the code comment to reflect the reality and remove the useless duplicate declartion in arch/mips/kernel/setup.c. Signed-off-by: Tiezhu Yang <yangtiezhu@loongson.cn> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
|
#
b9bb868e |
|
08-Dec-2019 |
周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com> |
MIPS: X1830: Add X1830 system type. 1.Add X1830 system type for cat /proc/cpuinfo to give out X1830. 2.Change "PRID_IMP_XBURST" to "PRID_IMP_XBURST_REV1" and add a new "PRID_IMP_XBURST_REV2" for new Ingenic CPUs which has XBurst with MXU2 SIMD ISA. Notice: 1."PRID_IMP_XBURST_REV2" is corresponds to the latest XBurst processor with 128bit MXU2 SIMD instruction set, not the upcoming XBurst2 processor. This version of the processors fixes issues such as BTB and HPTLB. 2.In order to simplify and reuse the code, the "c->cputype" and the "c->writecombine" and the "__cpu_name[cpu]" in the original "PRID_IMP_XBURST" (now is "PRID_IMP_XBURST_REV1") are removed, and the corresponding settings are abtained through fall-through to "PRID_IMP_XBURST_REV2", which will cause the name that was previously mistakenly called "JZRISC" to become to the real name "XBurst". Signed-off-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com> Signed-off-by: Paul Burton <paulburton@kernel.org> Cc: linux-mips@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: yamada.masahiro@socionext.com Cc: tglx@linutronix.de Cc: chenhc@lemote.com Cc: tbogendoerfer@suse.de Cc: paul.burton@mips.com Cc: paul@crapouillou.net Cc: jhogan@kernel.org Cc: fancer.lancer@gmail.com Cc: ralf@linux-mips.org Cc: jiaxun.yang@flygoat.com
|
#
1bdb7b76 |
|
20-Oct-2019 |
Jiaxun Yang <jiaxun.yang@flygoat.com> |
MIPS: Loongson64: Cleanup unused code Clean up legacy code after stripping out Loongson2ef code. Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Signed-off-by: Paul Burton <paulburton@kernel.org> Cc: linux-mips@vger.kernel.org Cc: paul.burton@mips.com
|
#
c0de00b2 |
|
09-Oct-2019 |
Thomas Bogendoerfer <tbogendoerfer@suse.de> |
MIPS: SGI-IP22/28: Use PROM for memory detection EARLY_PRINTK uses ArcWrite (via prom_putchar) on IP22/28, which needs to not mess up PROMs data structures. ARC PROM gives out a list of memory chunks, which are used and which are free. This fixes the problem of not working early printk. By using XKPHYS spaces more than 256MB memory on Indigo2 R4k machines is working now, too. Signed-off-by: Thomas Bogendoerfer <tbogendoerfer@suse.de> Signed-off-by: Paul Burton <paul.burton@mips.com> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: James Hogan <jhogan@kernel.org> Cc: linux-mips@vger.kernel.org Cc: linux-kernel@vger.kernel.org
|
#
a94e4f24 |
|
19-Aug-2019 |
Jiaxun Yang <jiaxun.yang@flygoat.com> |
MIPS: init: Drop boot_mem_map boot_mem_map was introduced very early and cannot handle memory maps with nid. Nowadays, memblock can exactly replace boot_mem_map. Detect pfn info and setup resources with memblock maps. Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com> [paul.burton@mips.com: Fix size calculation in check_kernel_sections_mem] Signed-off-by: Paul Burton <paul.burton@mips.com> Cc: linux-mips@vger.kernel.org Cc: yasha.che3@gmail.com Cc: aurelien@aurel32.net Cc: sfr@canb.auug.org.au Cc: fancer.lancer@gmail.com Cc: matt.redfearn@mips.com Cc: chenhc@lemote.com
|
#
7ea502e1 |
|
30-Jul-2019 |
Zhou Yanjie <zhouyanjie@zoho.com> |
MIPS: X1000: Add X1000 system type. Add X1000 system type for cat /proc/cpuinfo to give out X1000. Signed-off-by: Zhou Yanjie <zhouyanjie@zoho.com> Signed-off-by: Paul Burton <paul.burton@mips.com> Cc: linux-mips@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: ralf@linux-mips.org Cc: paul@crapouillou.net Cc: jhogan@kernel.org Cc: fancer.lancer@gmail.com Cc: chenhc@lemote.com Cc: tglx@linutronix.de Cc: gregkh@linuxfoundation.org Cc: armijn@tjaldur.nl Cc: syq@debian.org Cc: jiaxun.yang@flygoat.com
|
#
9b9a59db |
|
23-Apr-2019 |
Serge Semin <fancer.lancer@gmail.com> |
mips: Add reserve-nomap memory type support It might be necessary to prevent the virtual mapping creation for a requested memory region. For instance there is a "no-map" property indicating exactly this feature. In this case we need to not only reserve the specified region by pretending it doesn't exist in the memory space, but completely remove the range from system just by removing it from memblock. The same way it's done in default early_init_dt_reserve_memory_arch() method. Signed-off-by: Serge Semin <fancer.lancer@gmail.com> Signed-off-by: Paul Burton <paul.burton@mips.com> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: James Hogan <jhogan@kernel.org> Cc: Matt Redfearn <matt.redfearn@mips.com> Cc: Mike Rapoport <rppt@linux.ibm.com> Cc: Andrew Morton <akpm@linux-foundation.org> Cc: Michal Hocko <mhocko@suse.com> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: Thomas Bogendoerfer <tbogendoerfer@suse.de> Cc: Huacai Chen <chenhc@lemote.com> Cc: Stefan Agner <stefan@agner.ch> Cc: Stephen Rothwell <sfr@canb.auug.org.au> Cc: Alexandre Belloni <alexandre.belloni@bootlin.com> Cc: Juergen Gross <jgross@suse.com> Cc: linux-mips@vger.kernel.org Cc: linux-kernel@vger.kernel.org
|
#
147b7910 |
|
16-Jan-2018 |
Paul Cercueil <paul@crapouillou.net> |
MIPS: platform: add machtype IDs for more Ingenic SoCs Add a machtype ID for the JZ4780 SoC, which was missing, and one for the newly supported JZ4770 SoC. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Reviewed-by: PrasannaKumar Muralidharan <prasannatsmkumar@gmail.com> Reviewed-by: James Hogan <jhogan@kernel.org> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Maarten ter Huurne <maarten@treewalker.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/18485/ Signed-off-by: James Hogan <jhogan@kernel.org>
|
#
0063fded |
|
23-Nov-2016 |
Marcin Nowakowski <marcin.nowakowski@mips.com> |
MIPS: platform: Allow for DTB to be moved during kernel relocation Add plat_fdt_relocated(void*) API to allow the kernel relocation code to update platform's information about the DTB location if the DTB had to be moved due to being placed in a location used by the relocated kernel. Signed-off-by: Marcin Nowakowski <marcin.nowakowski@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/14611/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
#
15f37e15 |
|
20-Jun-2016 |
Jonas Gorski <jogo@openwrt.org> |
MIPS: store the appended dtb address in a variable Instead of rewriting the arguments to match the UHI spec, store the address of a appended or UHI supplied dtb in fw_supplied_dtb. That way the original bootloader arugments are kept intact while still making the use of an appended dtb invisible for mach code. Mach code can still find out if it is an appended dtb by comparing fw_arg1 with fw_supplied_dtb. Signed-off-by: Jonas Gorski <jogo@openwrt.org> Cc: Kevin Cernekee <cernekee@gmail.com> Cc: Florian Fainelli <f.fainelli@gmail.com> Cc: John Crispin <john@phrozen.org> Cc: Paul Burton <paul.burton@imgtec.com> Cc: James Hogan <james.hogan@imgtec.com> Cc: Alban Bedel <albeu@free.fr> Cc: Daniel Gimpelevich <daniel@gimpelevich.san-francisco.ca.us> Cc: Antony Pavlov <antonynpavlov@gmail.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/13699/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
#
5e7c1c91 |
|
31-Mar-2016 |
Matt Redfearn <matt.redfearn@mips.com> |
MIPS: Introduce plat_get_fdt a platform API to retrieve the FDT Early access to the kernel command line requires early access to the FDT for platforms which pass the command line within the device tree. There was no common way to retrieve the location of the FDT without incurring side effects, such as plat_mem_setup which, on Malta at least, initializes a bunch of other stuff. This patch adds plat_get_ftd() for IMG platforms. Signed-off-by: Matt Redfearn <matt.redfearn@imgtec.com> Cc: Paul Burton <paul.burton@imgtec.com> Cc: linux-mips@linux-mips.org Cc: kernel-hardening@lists.openwall.com Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/12988/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
#
15d45cce |
|
21-Nov-2014 |
Ralf Baechle <ralf@linux-mips.org> |
MIPS: Replace use of phys_t with phys_addr_t. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
#
3adeb256 |
|
03-Nov-2014 |
Huacai Chen <chenhuacai@kernel.org> |
MIPS: Loongson: Improve LEFI firmware interface Machtypes of Loongson-3 machines become more and more, but there are only small differences among different machtypes. Keeping a large table of machtypes is very ugly and hard to extend. We found that the major machtype differences are UARTs information (number of UARTs, UART IRQs, UART clocks, etc.), platform devices (EC, temperature sensors, fan controllers, etc.) and some workarounds (because of some CPU bugs or mainboard bugs). In this patch we improve the UEFI-like (LEFI) interface to make all Loongson-3 machines use a same machtype "generic-loongson-machine". Signed-off-by: Huacai Chen <chenhc@lemote.com> Cc: John Crispin <john@phrozen.org> Cc: Steven J. Hill <Steven.Hill@imgtec.com> Cc: linux-mips@linux-mips.org Cc: Fuxin Zhang <zhangfx@lemote.com> Cc: Zhangjin Wu <wuzhangjin@gmail.com> Patchwork: https://patchwork.linux-mips.org/patch/8324/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
#
5f6d693e |
|
21-Mar-2014 |
Huacai Chen <chenhuacai@kernel.org> |
MIPS: Loongson 3: Add Lemote-3A machtypes definition Add four Loongson-3 based machine types: MACH_LEMOTE_A1004/MACH_LEMOTE_A1201 are laptops; MACH_LEMOTE_A1101 is mini-itx; MACH_LEMOTE_A1205 is all-in-one machine. The most significant differrent between A1004/A1201 and A1101/A1205 is the laptops have EC but others don't. Signed-off-by: Huacai Chen <chenhc@lemote.com> Signed-off-by: Hongliang Tao <taohl@lemote.com> Signed-off-by: Hua Yan <yanh@lemote.com> Tested-by: Alex Smith <alex.smith@imgtec.com> Reviewed-by: Alex Smith <alex.smith@imgtec.com> Cc: John Crispin <john@phrozen.org> Cc: Steven J. Hill <Steven.Hill@imgtec.com> Cc: Aurelien Jarno <aurelien@aurel32.net> Cc: linux-mips@linux-mips.org Cc: Fuxin Zhang <zhangfx@lemote.com> Cc: Zhangjin Wu <wuzhangjin@gmail.com> Patchwork: https://patchwork.linux-mips.org/patch/6631 Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
#
0893d3fb |
|
15-Jan-2014 |
Markos Chandras <markos.chandras@imgtec.com> |
MIPS: mm: init: Add free_init_pages() callback for EVA A core in EVA mode can have any possible segment mapping, so the default free_initmem_default() function may not always work as expected. Therefore, add a callback that platforms can use to free up the init section. Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
|
#
4d9f77d2 |
|
13-Apr-2013 |
John Crispin <blogic@openwrt.org> |
MIPS: add detect_memory_region() Add a generic way of detecting the available RAM. This function is based on the implementation already used by ath79. Signed-off-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/5178/
|
#
70342287 |
|
21-Jan-2013 |
Ralf Baechle <ralf@linux-mips.org> |
MIPS: Whitespace cleanup. Having received another series of whitespace patches I decided to do this once and for all rather than dealing with this kind of patches trickling in forever. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
#
43064c0c |
|
22-Nov-2011 |
David Daney <ddaney@caviumnetworks.com> |
MIPS: Handle initmem in systems with kernel not in add_memory_region() mem This patch addresses a couple of related problems: 1) The kernel may reside in physical memory outside of the ranges set by plat_mem_setup(). If this is the case, init mem cannot be reused as it resides outside of the range of pages that the kernel memory allocators control. 2) initrd images might be loaded in physical memory outside of the ranges set by plat_mem_setup(). The memory likewise cannot be reused. The patch doesn't handle this specific case, but the infrastructure is useful for future patches that do. The crux of the problem is that there are memory regions that need be memory_present(), but that cannot be free_bootmem() at the time of arch_mem_init(). We create a new type of memory (BOOT_MEM_INIT_RAM) for use with add_memory_region(). Then arch_mem_init() adds the init mem with this type if the init mem is not already covered by existing ranges. When memory is being freed into the bootmem allocator, we skip the BOOT_MEM_INIT_RAM ranges so they are not clobbered, but we do signal them as memory_present(). This way when they are later freed, the necessary memory manager structures have initialized and the Sparse allocater is prevented from crashing. The Octeon specific code that handled this case is removed, because the new general purpose code handles the case. Signed-off-by: David Daney <ddaney@caviumnetworks.com> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/1988/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
#
ee71b7d2 |
|
01-Oct-2010 |
David Daney <ddaney@caviumnetworks.com> |
MIPS: Add a platform hook for swiotlb setup. This allows platforms that are using the swiotlb to initialize it. Signed-off-by: David Daney <ddaney@caviumnetworks.com> Patchwork: http://patchwork.linux-mips.org/patch/1638/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
#
83ccf69d |
|
17-Jul-2010 |
Lars-Peter Clausen <lars@metafoo.de> |
MIPS: JZ4740: Add base support for Ingenic JZ4740 System-on-a-Chip Adds a new cpu type for the JZ4740 to the Linux MIPS architecture code. It also adds the iomem addresses for the different components found on a JZ4740 SoC. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/1464/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
#
6e552c9b |
|
16-Nov-2009 |
Wu Zhangjin <wuzhangjin@gmail.com> |
MIPS: Lemote 2F: Add Lynloong support Add a new machtype and kernel options for the Lynloong. Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Cc: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/657/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
#
e13fb776 |
|
16-Nov-2009 |
Wu Zhangjin <wuzhangjin@gmail.com> |
MIPS: Lemote 2F: Add NAS support Kernel support for this machine is almost the same as Fuloong 2F; the only difference is that it uses the serial port provided by Loongson 2F processor as Yeeloong 2F does. Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Cc: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/656/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
#
7580c9c3 |
|
13-Oct-2009 |
Dmitri Vorobiev <dmitri.vorobiev@movial.com> |
MIPS: Replace all usages of CL_SIZE by COMMAND_LINE_SIZE The MIPS-specific macro CL_SIZE is merely aliasing the macro COMMAND_LINE_SIZE. Other architectures use the latter; also, COMMAND_LINE_SIZE is documented in kernel-parameters.txt, so let's use it, and remove the alias. Signed-off-by: Dmitri Vorobiev <dmitri.vorobiev@movial.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
#
3209e70e |
|
02-Jul-2009 |
Wu Zhangjin <wuzhangjin@gmail.com> |
MIPS: Loongson: Add a machtype kernel command line argument The difference between some loongson-based machines is very small, so, if there is no necessary to add new kernel config options to cope with this difference, it will be better to share the same kernel image file between them, benefit from this, the linux distribution developers only have a need to compile the kernel one time. This machtype kernel command line argument will be used later to share the same kernel image file between two different machines(menglong & yeeloong) made by lemote. Thanks very much to Zhang Le for cleaning up the machtype implementation. Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
#
384740dc |
|
16-Sep-2008 |
Ralf Baechle <ralf@linux-mips.org> |
MIPS: Move headfiles to new location below arch/mips/include Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|