#
ac8fd122 |
|
05-Mar-2020 |
afzal mohammed <afzal.mohd.ma@gmail.com> |
MIPS: Replace setup_irq() by request_irq() request_irq() is preferred over setup_irq(). Invocations of setup_irq() occur after memory allocators are ready. Per tglx[1], setup_irq() existed in olden days when allocators were not ready by the time early interrupts were initialized. Hence replace setup_irq() by request_irq(). remove_irq() has been replaced by free_irq() as well. There were build error's during previous version, couple of which was reported by kbuild test robot <lkp@intel.com> of which one was reported by Thomas Bogendoerfer <tsbogend@alpha.franken.de> as well. There were a few more issues including build errors, those also have been fixed. [1] https://lkml.kernel.org/r/alpine.DEB.2.20.1710191609480.1971@nanos Signed-off-by: afzal mohammed <afzal.mohd.ma@gmail.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
|
#
5a4a4ad8 |
|
22-Jul-2011 |
Wu Zhangjin <wuzhangjin@gmail.com> |
MIPS: Mark cascade and low level interrupts IRQF_NO_THREAD Mark interrupts with no_action handler, cascade interrupts, low level interrupts (bus error, halt ..) with IRQF_NO_THREAD to exclude them from forced threading. Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: linux-mips@linux-mips.org Cc: Wu Zhangjin <wuzhangjin@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
#
1a8a5100 |
|
30-Mar-2009 |
Rusty Russell <rusty@rustcorp.com.au> |
cpumask: remove references to struct irqaction's mask field. Impact: cleanup It's unused, since about 1995. So remove all initialization of it in preparation for actually removing the field. Signed-off-by: Rusty Russell <rusty@rustcorp.com.au> Acked-by: Thomas Gleixner <tglx@linutronix.de>
|
#
d5ab1a69 |
|
13-Sep-2007 |
Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> |
[MIPS] Add GT641xx IRQ routines. Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
#
4e45171c |
|
28-Aug-2007 |
Thomas Gleixner <tglx@linutronix.de> |
[MIPS] cleanup struct irqaction initializers Signed-off-by: Thomas Gleixner <tglx@linutronix.de> CC: Ralf Baechle <ralf@linux-mips.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
#
cc50b67d |
|
06-Mar-2007 |
Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> |
[MIPS] Cobalt: clean up include files Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
|
#
97dcb82d |
|
07-Jan-2007 |
Atsushi Nemoto <anemo@mba.ocn.ne.jp> |
[MIPS] Define MIPS_CPU_IRQ_BASE in generic header The irq_base for {mips,rm7k,rm9k}_cpu_irq_init() are constant on all platforms and are same value on most platforms (0 or 16, depends on CONFIG_I8259). Define them in asm-mips/mach-generic/irq.h and make them customizable. This will save a few cycle on each CPU interrupt. A good side effect is removing some dependencies to MALTA in generic SMTC code. Although MIPS_CPU_IRQ_BASE is customizable, this patch changes irq mappings on DDB5477, EMMA2RH and MIPS_SIM, since really customizing them might cause some header dependency problem and there seems no good reason to customize it. So currently only VR41XX is using custom MIPS_CPU_IRQ_BASE value, which is 0 regardless of CONFIG_I8259. Testing this patch on those platforms is greatly appreciated. Thank you. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
#
56ae5833 |
|
13-Oct-2006 |
Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> |
[MIPS] Rewrite GALILEO_INL/GALILEO_OUTL to GT_READ/GT_WRITE This patch has rewritten GALILEO_INL/GALILEO_OUTL using GT_READ/GT_WRITE. This patch tested on Cobalt Qube2. Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
#
27f768192 |
|
08-Oct-2006 |
Ralf Baechle <ralf@linux-mips.org> |
[MIPS] Cleanup unnecessary <asm/ptrace.h> inclusions. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
#
937a8015 |
|
07-Oct-2006 |
Ralf Baechle <ralf@linux-mips.org> |
[MIPS] Complete fixes after removal of pt_regs argument to int handlers. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
#
e4ac58af |
|
03-Apr-2006 |
Ralf Baechle <ralf@linux-mips.org> |
[MIPS] Rewrite all the assembler interrupt handlers to C. Saves like 1,600 lines of code, is way easier to debug, compilers frequently do a better job than the cut and paste type of handlers many boards had. And finally having all the stuff done in a single place also means alot of bug potencial for the MT ASE is gone. The only surviving handler in assembler is the DECstation one; I hope Maciej will rewrite it. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
#
11ed6d5b |
|
18-Jan-2006 |
Ralf Baechle <ralf@linux-mips.org> |
[MIPS] Rename include/asm-mips/cobalt to include/asm-mips/mach-cobalt. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
#
c4ed38a0 |
|
21-Feb-2005 |
Ralf Baechle <ralf@linux-mips.org> |
Resurrect Cobalt support for 2.6. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
#
1da177e4 |
|
16-Apr-2005 |
Linus Torvalds <torvalds@ppc970.osdl.org> |
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
|