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d548ca6b |
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10-Dec-2014 |
Rafał Miłecki <zajec5@gmail.com> |
MIPS: BCM47XX: Fix coding style to match kernel standards [ralf@linux-mips.org: Fixed conflicts.] Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Acked-by: Hauke Mehrtens <hauke@hauke-m.de> Cc: linux-mips@linux-mips.org Cc: Paul Walmsley <paul@pwsan.com> Patchwork: https://patchwork.linux-mips.org/patch/8665/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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138173d4 |
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30-Nov-2014 |
Rafał Miłecki <zajec5@gmail.com> |
MIPS: BCM47xx: Move NVRAM header to the include/linux/. There are two reasons for having this header in the common place: 1) Simplifying drivers that read NVRAM entries. We will be able to safely call bcm47xx_nvram_* functions without #ifdef-s. 2) Getting NVRAM driver out of MIPS arch code. This is needed to support BCM5301X arch which also requires this NVRAM driver. Patch for that will follow once we get is reviewed. Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Acked-by: Hauke Mehrtens <hauke@hauke-m.de> Cc: linux-mips@linux-mips.org Cc: Arnd Bergmann <arnd@arndb.de> Cc: Paul Walmsley <paul@pwsan.com> Cc: linux-soc@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/8619/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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8eae19cc |
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18-Sep-2013 |
Hauke Mehrtens <hauke@hauke-m.de> |
MIPS: BCM47XX: Fix detected clock on Asus WL520GC and WL520GU The Asus WL520GC and WL520GU are based on the BCM5354 and clocked at 200MHz, but they do not have a clkfreq nvram variable set to the correct value. This adds a workaround for these devices. Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5843/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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2224de9d |
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18-Sep-2013 |
Hauke Mehrtens <hauke@hauke-m.de> |
MIPS: BCM47XX: Fix clock detection for BCM5354 with 200MHz clock Some BCM5354 SoCs are running at 200MHz, but it is not possible to read the clock from a register like it is done on some other SoC in ssb and bcma. These devices should have a clkfreq nvram configuration value set to 200, read it and set the clock to the correct value. Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5842/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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c1d1c5d4 |
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22-Jul-2011 |
Hauke Mehrtens <hauke@hauke-m.de> |
bcm47xx: add support for bcma bus This patch add support for the bcma bus. Broadcom uses only Mips 74K CPUs on the new SoC and on the old ons using ssb bus there are no Mips 74K CPUs. Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> Acked-by: Ralf Baechle <ralf@linux-mips.org> Signed-off-by: John W. Linville <linville@tuxdriver.com>
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a656ffcb |
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22-Jul-2011 |
Hauke Mehrtens <hauke@hauke-m.de> |
bcm47xx: make it possible to build bcm47xx without ssb. Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> Acked-by: Ralf Baechle <ralf@linux-mips.org> Signed-off-by: John W. Linville <linville@tuxdriver.com>
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08ccf572 |
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22-Jul-2011 |
Hauke Mehrtens <hauke@hauke-m.de> |
bcm47xx: prepare to support different buses Prepare bcm47xx to support different System buses. Before adding support for bcma it should be possible to build bcm47xx without the need of ssb. With this patch bcm47xx does not directly contain a ssb_bus, but a union contain all the supported system buses. As a SoC just uses one system bus a union is a good choice. Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> Acked-by: Ralf Baechle <ralf@linux-mips.org> Signed-off-by: John W. Linville <linville@tuxdriver.com>
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1d9ef3ec |
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19-Oct-2007 |
Atsushi Nemoto <anemo@mba.ocn.ne.jp> |
[MIPS] Kill duplicated setup_irq() for cp0 timer Also many plat_timer_setup() can be killed too. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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4b550488 |
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11-Oct-2007 |
Ralf Baechle <ralf@linux-mips.org> |
[MIPS] Deforest the function pointer jungle in the time code. Hard to follow who is pointing what to where and why so it's simply getting in the way of the time code renovation. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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1c0c13eb |
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25-Sep-2007 |
Aurelien Jarno <aurelien@aurel32.net> |
[MIPS] Add support for BCM47XX CPUs. Note that the BCM4710 does not support the wait instruction, this is not a mistake in the code. It originally comes from the OpenWrt patches. Cc: Michael Buesch <mb@bu3sch.de> Cc: Felix Fietkau <nbd@openwrt.org> Cc: Florian Schirmer <jolt@tuxbox.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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