#
9de7fc30 |
|
21-May-2020 |
Vineet Gupta <vgupta@kernel.org> |
ARC: entry: SAVE_ABI_CALLEE_REG: ISA/ABI specific helper And for ARcompact variant replace the PUSH/POP macros with gas provided push/pop pseudo-instructions This allows ISA specific implementation e.g. Current ARCv2 PUSH/POP could be replaced with STD/LDL to save 2 registers at a time (w/o bothering with SP update each time) or perhaps use ENTER_S/LEAVE_S to reduce code size For ARCv3 ABI changed so callee regs are now r14-r26 (vs. r13-r25) thus would need a different implementation. Signed-off-by: Vineet Gupta <vgupta@kernel.org>
|
#
58d9ceb7 |
|
21-May-2020 |
Vineet Gupta <vgupta@kernel.org> |
ARC: pt_regs: create seperate type for ecr Reduces duplication in each ISA specific pt_regs Tested-by: kernel test robot <lkp@intel.com> Closes: https://lore.kernel.org/oe-kbuild-all/202308151342.ROQ9Urvv-lkp@intel.com Signed-off-by: Vineet Gupta <vgupta@kernel.org>
|
#
d4624bf6 |
|
22-May-2020 |
Vineet Gupta <vgupta@kernel.org> |
ARCv2: entry: rearrange pt_regs slightly Instead of r26,fp,sp,r12,r30 order as fp,r30,r12,r26,sp - keeps SP at well known position (right abive hardware autosave) - r26,r12 saved specifically for ARCv2 (and not in ARCv3) kept closer for easy ifdef'ry later Signed-off-by: Vineet Gupta <vgupta@kernel.org>
|
#
c505b0da |
|
19-May-2020 |
Vineet Gupta <vgupta@kernel.org> |
ARC: entry: rework (non-functional) - comments update - rename syscall_trace_entry - use PT_xxx in entry code Signed-off-by: Vineet Gupta <vgupta@kernel.org>
|
#
cfca4b5a |
|
12-May-2020 |
Vineet Gupta <vgupta@kernel.org> |
ARC: entry: use gp to cache task pointer (vs. r25) The motivation is eventual ABI considerations for ARCv3 but even without it this change us worthwhile as diffstat reduces 100 net lines r25 is a callee saved register, normally not saved by entry code in pt_regs. However because of its usage in CONFIG_ARC_CURR_IN_REG it needs to be. This in turn requires a whole bunch of special casing when we need to access r25. Then there is distinction between user mode r25 vs. kernel mode r25 - hence distinct SAVE_CALLEE_SAVED_{USER,KERNEL} Instead use gp which is a scratch register and thus saved already in entry code. This cleans things up significantly and much nocer on eyes: - SAVE_CALLEE_SAVED_{USER,KERNEL} are now exactly same - no special user_r25 slot in pt_reggs Note that typical global asm registers are callee-saved (r25), but gp is not callee-saved thus needs additional -ffixed-<reg> toggle Signed-off-by: Vineet Gupta <vgupta@kernel.org>
|
#
4d369680 |
|
12-Aug-2023 |
Vineet Gupta <vgupta@kernel.org> |
ARC: -Wmissing-prototype warning fixes Anrd reported [1] new compiler warnings due to -Wmissing-protype. These are for non static functions mostly used in asm code hence not exported already. Fix this by adding the prototypes. [1] https://lore.kernel.org/lkml/20230810141947.1236730-1-arnd@kernel.org Reviewed-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Vineet Gupta <vgupta@kernel.org>
|
#
b3bbf6a7 |
|
14-Apr-2022 |
Sergey Matyukevich <sergey.matyukevich@synopsys.com> |
ARC: enable HAVE_REGS_AND_STACK_ACCESS_API feature Enable HAVE_REGS_AND_STACK_ACCESS_API feature for ARC architecture, including ARCcompact and ARCv2 flavors. Add supporting functions and defines. Signed-off-by: Sergey Matyukevich <sergey.matyukevich@synopsys.com> Signed-off-by: Vineet Gupta <vgupta@kernel.org>
|
#
bb6121b1 |
|
14-Sep-2021 |
Masami Hiramatsu <mhiramat@kernel.org> |
ARC: Add instruction_pointer_set() API Add instruction_pointer_set() API for arc. Link: https://lkml.kernel.org/r/163163050148.489837.15187799269793560256.stgit@devnote2 Signed-off-by: Masami Hiramatsu <mhiramat@kernel.org> Signed-off-by: Steven Rostedt (VMware) <rostedt@goodmis.org>
|
#
dd7c7ab0 |
|
25-Aug-2020 |
Vineet Gupta <vgupta@synopsys.com> |
ARC: [plat-eznps]: Drop support for EZChip NPS platform NPS customers are no longer doing active development, as evident from rand config build failures reported in recent times, so drop support for NPS platform. Tested-by: kernel test robot <lkp@intel.com> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
|
#
7321e2ea |
|
05-Mar-2020 |
Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> |
ARC: add support for DSP-enabled userspace applications To be able to run DSP-enabled userspace applications we need to save and restore following DSP-related registers: At IRQ/exception entry/exit: * DSP_CTRL (save it and reset to value suitable for kernel) * ACC0_LO, ACC0_HI (we already save them as r58, r59 pair) At context switch: * ACC0_GLO, ACC0_GHI * DSP_BFLY0, DSP_FFT_CTRL Reviewed-by: Vineet Gupta <vgupta@synopsys.com> Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
|
#
d2912cb1 |
|
04-Jun-2019 |
Thomas Gleixner <tglx@linutronix.de> |
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500 Based on 2 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 as published by the free software foundation this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 as published by the free software foundation # extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 4122 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Enrico Weigelt <info@metux.net> Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org> Reviewed-by: Allison Randal <allison@lohutok.net> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190604081206.933168790@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
|
#
28923f6b |
|
15-Jun-2017 |
Liav Rehana <liavr@mellanox.com> |
ARC: [plat-eznps] handle extra aux regs #2: kernel/entry exit Preserve eflags and gpa1 aux during entry/exit into kernel as these could be modified by kernel mode These registers used by compare exchange instructions. - GPA1 is used for compare value, - EFLAGS got bit reflects atomic operation response. EFLAGS is zeroed for each new user task so it won't get its parent value. Signed-off-by: Liav Rehana <liavr@mellanox.com> Signed-off-by: Noam Camus <noamc@ezchip.com> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
|
#
3d5e8012 |
|
20-Apr-2017 |
Vineet Gupta <vgupta@synopsys.com> |
ARCv2: entry: save Accumulator register pair (r58:59) if present Accumulator is present in configs with FPU and/or DSP MPY (mpy > 6) Instead of doing this in pt_regs (and thus every kernel entry/exit), this could have been done in context switch (and for user task only) as currently kernel doesn't clobber these registers for its own accord. However we will soon start using 64-bit multiply instructions for kernel which can clobber these. Also gcc folks also plan to start using these as GPRs, hence better to always save/restore them Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
|
#
ecd43afd |
|
08-Jan-2017 |
Vineet Gupta <vgupta@synopsys.com> |
ARCv2: save r30 on kernel entry as gcc uses it for code-gen This is not exposed to userspace debugers yet, which can be done independently as a seperate patch ! Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
|
#
87ce6280 |
|
04-Aug-2015 |
Vineet Gupta <vgupta@synopsys.com> |
ARC: Make pt_regs regs unsigned KGDB fails to build after f51e2f191112 ("ARC: make sure instruction_pointer() returns unsigned value") The hack to force one specific reg to unsigned backfired. There's no reason to keep the regs signed after all. | CC arch/arc/kernel/kgdb.o |../arch/arc/kernel/kgdb.c: In function 'kgdb_trap': | ../arch/arc/kernel/kgdb.c:180:29: error: lvalue required as left operand of assignment | instruction_pointer(regs) -= BREAK_INSTR_SIZE; Reported-by: Yuriy Kolerov <yuriy.kolerov@synopsys.com> Fixes: f51e2f191112 ("ARC: make sure instruction_pointer() returns unsigned value") Cc: Alexey Brodkin <abrodkin@synopsys.com> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
|
#
f51e2f19 |
|
13-Jul-2015 |
Alexey Brodkin <abrodkin@synopsys.com> |
ARC: make sure instruction_pointer() returns unsigned value Currently instruction_pointer() returns pt_regs->ret and so return value is of type "long", which implicitly stands for "signed long". While that's perfectly fine when dealing with 32-bit values if return value of instruction_pointer() gets assigned to 64-bit variable sign extension may happen. And at least in one real use-case it happens already. In perf_prepare_sample() return value of perf_instruction_pointer() (which is an alias to instruction_pointer() in case of ARC) is assigned to (struct perf_sample_data)->ip (which type is "u64"). And what we see if instuction pointer points to user-space application that in case of ARC lays below 0x8000_0000 "ip" gets set properly with leading 32 zeros. But if instruction pointer points to kernel address space that starts from 0x8000_0000 then "ip" is set with 32 leadig "f"-s. I.e. id instruction_pointer() returns 0x8100_0000, "ip" will be assigned with 0xffff_ffff__8100_0000. Which is obviously wrong. In particular that issuse broke output of perf, because perf was unable to associate addresses like 0xffff_ffff__8100_0000 with anything from /proc/kallsyms. That's what we used to see: ----------->8---------- 6.27% ls [unknown] [k] 0xffffffff8046c5cc 2.96% ls libuClibc-0.9.34-git.so [.] memcpy 2.25% ls libuClibc-0.9.34-git.so [.] memset 1.66% ls [unknown] [k] 0xffffffff80666536 1.54% ls libuClibc-0.9.34-git.so [.] 0x000224d6 1.18% ls libuClibc-0.9.34-git.so [.] 0x00022472 ----------->8---------- With that change perf output looks much better now: ----------->8---------- 8.21% ls [kernel.kallsyms] [k] memset 3.52% ls libuClibc-0.9.34-git.so [.] memcpy 2.11% ls libuClibc-0.9.34-git.so [.] malloc 1.88% ls libuClibc-0.9.34-git.so [.] memset 1.64% ls [kernel.kallsyms] [k] _raw_spin_unlock_irqrestore 1.41% ls [kernel.kallsyms] [k] __d_lookup_rcu ----------->8---------- Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> Cc: arc-linux-dev@synopsys.com Cc: stable@vger.kernel.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
|
#
1f6ccfff |
|
13-May-2013 |
Vineet Gupta <vgupta@synopsys.com> |
ARCv2: Support for ARCv2 ISA and HS38x cores The notable features are: - SMP configurations of upto 4 cores with coherency - Optional L2 Cache and IO-Coherency - Revised Interrupt Architecture (multiple priorites, reg banks, auto stack switch, auto regfile save/restore) - MMUv4 (PIPT dcache, Huge Pages) - Instructions for * 64bit load/store: LDD, STD * Hardware assisted divide/remainder: DIV, REM * Function prologue/epilogue: ENTER_S, LEAVE_S * IRQ enable/disable: CLRI, SETI * pop count: FFS, FLS * SETcc, BMSKN, XBFU... Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
|
#
4b06ff35 |
|
10-Jul-2013 |
Vineet Gupta <vgupta@synopsys.com> |
ARC: Code cosmetics (Nothing semantical) * reduce editor lines taken by pt_regs * ARCompact ISA specific part of TLB Miss handlers clubbed together * cleanup some comments Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
|
#
502a0c77 |
|
11-Jun-2013 |
Vineet Gupta <vgupta@synopsys.com> |
ARC: pt_regs update #5: Use real ECR for pt_regs->event vs. synth values pt_regs->event was set with artificial values to identify the low level system event (syscall trap / breakpoint trap / exceptions / interrupts) With r8 saving out of the way, the full word can be used to save real ECR (Exception Cause Register) which helps idenify the event naturally, including additional info such as cause code, param. Only for Interrupts, where ECR is not applicable, do we resort to synthetic non ECR values. SAVE_ALL_TRAP/EXCEPTIONS can now be merged as they both use ECR with different runtime values. The ptrace helpers now use the sub-fields of ECR to distinguish the events (e.g. vector 0x25 is trap, param 0 is syscall...) The following benefits will follow: (1) This centralizes the location of where ECR is saved and will allow the cleanup of task->thread.cause_code ECR placeholder which is set in non-uniform way. Then ARC VM code can safely rely on it being there for purpose of finer grained VM_EXEC dcache flush (based on exec fault: I-TLB Miss) (2) Further, ECR being passed around from low level handlers as arg can be eliminated as it is part of standard reg-file in pt_regs Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
|
#
359105bd |
|
28-May-2013 |
Vineet Gupta <vgupta@synopsys.com> |
ARC: pt_regs update #4: r25 saved/restored unconditionally (This is a VERY IMP change for low level interrupt/exception handling) ----------------------------------------------------------------------- WHAT ----------------------------------------------------------------------- * User 25 now saved in pt_regs->user_r25 (vs. tsk->thread_info.user_r25) * This allows Low level interrupt code to unconditionally save r25 (vs. the prev version which would only do it for U->K transition). Ofcourse for nested interrupts, only the pt_regs->user_r25 of bottom-most frame is useful. * simplifies the interrupt prologue/epilogue * Needed for ARCv2 ISA code and done here to keep design similar with ARCompact event handling ----------------------------------------------------------------------- WHY ------------------------------------------------------------------------- With CONFIG_ARC_CURR_IN_REG, r25 is used to cache "current" task pointer in kernel mode. So when entering kernel mode from User Mode - user r25 is specially safe-kept (it being a callee reg is NOT part of pt_regs which are saved by default on each interrupt/trap/exception) - r25 loaded with current task pointer. Further, if interrupt was taken in kernel mode, this is skipped since we know that r25 already has valid "current" pointer. With 2 level of interrupts in ARCompact ISA, detecting this is difficult but still possible, since we could be in kernel mode but r25 not already saved (in fact the stack itself might not have been switched). A. User mode B. L1 IRQ taken C. L2 IRQ taken (while on 1st line of L1 ISR) So in #C, although in kernel mode, r25 not saved (infact SP not switched at all) Given that ARcompact has manual stack switching, we could use a bit of trickey - The low level code would make sure that SP is only set to kernel mode value at the very end (after saving r25). So a non kernel mode SP, even if in kernel mode, meant r25 was NOT saved. The same paradigm won't work in ARCv2 ISA since SP is auto-switched so it's setting can't be delayed/constrained. Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
|
#
16f9afe6 |
|
27-May-2013 |
Vineet Gupta <vgupta@synopsys.com> |
ARC: pt_regs update #3: Remove unused gutter at start of callee_regs This is trickier than prev two: * context switching code saves kernel mode callee regs in the format of struct callee_regs thus needs adjustment. This also reduces the height of topmost kernel stack frame by 1 word. * Since kernel stack unwinder is sensitive to height of topmost kernel stack frame, that needs a word of adjustment too. ptrace needs a bit of updating since pt_regs now diverges from user_regs_struct. Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
|
#
2fa91904 |
|
27-May-2013 |
Vineet Gupta <vgupta@synopsys.com> |
ARC: pt_regs update #2: Remove unused gutter at start of pt_regs Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
|
#
283237a0 |
|
27-May-2013 |
Vineet Gupta <vgupta@synopsys.com> |
ARC: pt_regs update #1: Align pt_regs end with end of kernel stack page Historically, pt_regs would end at offset of 1 word from end of stack page. ----------------- -> START of page (task->stack) | | | thread_info | ----------------- | | ^ ~ ~ | ~ ~ | | | | | | <---- pt_regs used to END here ----------------- | 1 word GUTTER | ----------------- -> End of page (START of kernel stack) This required special "one-off" considerations in low level code. The root cause is very likely assumption of "empty" SP by the original ARC kernel hackers, despite ARC700 always been "full" SP. So finally RIP one word gutter ! Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
|
#
367f3fcd |
|
20-Mar-2013 |
Vineet Gupta <vgupta@synopsys.com> |
ARC: Fix the typo in event identifier flags used by ptrace orig_r8_IS_EXCPN and orig_r8_IS_BRKPT were same values due to a copy/paste error. Although it looks bad and is wrong, it really doesn't affect gdb working. orig_r8_IS_BRKPT is the one relevant to debugging (breakpoints), since it is used to provide EFA vs. ERET to a ptrace "stop_pc" request. So when gdb has inserted a breakpoint, orig_r8_IS_BRKPT is already set, and anything else (i.e. orig_r8_IS_EXCPN) becoming same as it, really doesn't hurt gdb. The corollary case, could be nasty but nobody uses the ptrace "stop_pc" request in that case Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
|
#
8c2f4a8d |
|
11-Feb-2013 |
Vineet Gupta <vgupta@synopsys.com> |
ARC: UAPI Disintegrate arch/arc/include/asm 1. ./genfilelist.pl arch/arc/include/asm/ 2. Create arch/arc/include/uapi/asm/Kbuild as follows +# UAPI Header export list +include include/uapi/asm-generic/Kbuild.asm 3. ./disintegrate-one.pl arch/arc/include/{,uapi/}asm/<above-list> 4. Edit arch/arc/include/asm/Kbuild to remove ref to asm-generic/Kbuild.asm - To work around empty uapi/asm/setup.h added a placholder comment. - Also a manual #ifdef __ASSEMBLY__ for a late ptrace change Signed-off-by: Vineet Gupta <vgupta@synopsys.com> Cc: David Howells <dhowells@redhat.com>
|
#
2e651ea1 |
|
23-Jan-2013 |
Vineet Gupta <vgupta@synopsys.com> |
ARC: Unaligned access emulation ARC700 doesn't natively support unaligned access, but can be emulated -Unaligned Access Exception -Disassembly at the Fault address to find the exact insn (long/short) Also per Arnd's comment, we runtime control it using 2 sysctl knobs: * SYSCTL_ARCH_UNALIGN_ALLOW: Runtime enable/disble * SYSCTL_ARCH_UNALIGN_NO_WARN: Warn on each emulation attempt Originally contributed by Tim Yao <tim.yao@amlogic.com> Signed-off-by: Vineet Gupta <vgupta@synopsys.com> Cc: Tim Yao <tim.yao@amlogic.com> Acked-by: Arnd Bergmann <arnd@arndb.de>
|
#
4d86dfbb |
|
22-Jan-2013 |
Vineet Gupta <vgupta@synopsys.com> |
ARC: kprobes support Origin port done by Rajeshwar Ranga Signed-off-by: Vineet Gupta <vgupta@synopsys.com> Cc: Rajeshwar Ranga <rajeshwar.ranga@gmail.com>
|
#
55bb9480 |
|
18-Jan-2013 |
Vineet Gupta <vgupta@synopsys.com> |
ARC: [Review] Prevent incorrect syscall restarts Per Al Viro's "signals for dummies" https://lkml.org/lkml/2012/12/6/366 there are 3 golden rules for (not) restarting syscalls: " What we need to guarantee is * restarts do not happen on signals caught in interrupts or exceptions * restarts do not happen on signals caught in sigreturn() * restart should happen only once, even if we get through do_signal() many times." ARC Port already handled #1, this patch fixes #2 and #3. We use the additional state in pt_regs->orig_r8 to ckh if restarting has already been done once. Thanks to Al Viro for spotting this. Signed-off-by: Vineet Gupta <vgupta@synopsys.com> Cc: Al Viro <viro@ZenIV.linux.org.uk>
|
#
5c39c0ab |
|
11-Feb-2013 |
Vineet Gupta <vgupta@synopsys.com> |
ARC: [Review] Preparing to fix incorrect syscall restarts due to signals To avoid multiple syscall restarts (multiple signals) or no restart at all (sigreturn), we need just an extra bit of state "literally 1 bit" in struct pt_regs. orig_r8 is the best place to do this, however given the way it is encoded currently, we can't add anything simplistically. Current orig_r8: * syscalls -> 1 to NR_SYSCALLS * Exceptions -> NR_SYSCALLS + 1 * Break-point-> NR_SYSCALLS + 2 In new scheme it is a bit-field * lower short word contains the exact event type (and a new bit to represent restart semantics : if syscall was already / can't be restarted) * upper short word optionally containing the syscall num - needed by likes of tracehooks etc This patch only changes how orig_r8 is organised and nothing should change behaviourily. Signed-off-by: Vineet Gupta <vgupta@synopsys.com> Cc: Al Viro <viro@ZenIV.linux.org.uk>
|
#
bf90e1ea |
|
18-Jan-2013 |
Vineet Gupta <vgupta@synopsys.com> |
ARC: Process-creation/scheduling/idle-loop Signed-off-by: Vineet Gupta <vgupta@synopsys.com> Cc: Al Viro <viro@ZenIV.linux.org.uk> Cc: Thomas Gleixner <tglx@linutronix.de>
|
#
4adeefe1 |
|
18-Jan-2013 |
Vineet Gupta <vgupta@synopsys.com> |
ARC: Syscall support (no-legacy-syscall ABI) This includes support for generic clone/for/vfork/execve Signed-off-by: Vineet Gupta <vgupta@synopsys.com> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Al Viro <viro@ZenIV.linux.org.uk> Acked-by: Arnd Bergmann <arnd@arndb.de>
|
#
3be80aae |
|
18-Jan-2013 |
Vineet Gupta <vgupta@synopsys.com> |
ARC: Fundamental ARCH data-types/defines * L1_CACHE_SHIFT * PAGE_SIZE, PAGE_OFFSET * struct pt_regs, struct user_regs_struct * struct thread_struct, cpu_relax(), task_pt_regs(), start_thread(), ... * struct thread_info, THREAD_SIZE, INIT_THREAD_INFO(), TIF_*, ... * BUG() * ELF_* * Elf_* To disallow user-space visibility into some of the core kernel data-types such as struct pt_regs, #ifdef __KERNEL__ which also makes the UAPI header spit (further patch in the series) to NOT export it to asm/uapi/ptrace.h Signed-off-by: Vineet Gupta <vgupta@synopsys.com> Cc: Jonas Bonn <jonas.bonn@gmail.com> Cc: Al Viro <viro@ZenIV.linux.org.uk> Acked-by: Arnd Bergmann <arnd@arndb.de>
|