#
b0bcec86 |
|
30-Jan-2024 |
Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> |
dt-bindings: phy: qmp-ufs: Fix PHY clocks All QMP UFS PHYs except MSM8996 require 3 clocks: * ref - 19.2MHz reference clock from RPMh * ref_aux - Auxiliary reference clock from GCC * qref - QREF clock from GCC or TCSR (since SM8550) MSM8996 only requires 'ref' and 'qref' clocks. Hence, fix the binding to reflect the actual clock topology. This change obviously breaks the ABI, but it is inevitable since the clock topology needs to be accurately described in the binding. Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20240131-ufs-phy-clock-v3-1-58a49d2f4605@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
|
#
1cf2bf8f |
|
21-Jan-2024 |
David Wronek <davidwronek@gmail.com> |
dt-bindings: phy: Add QMP UFS PHY compatible for SC7180 Document the QMP UFS PHY compatible for SC7180 Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: David Wronek <davidwronek@gmail.com> Link: https://lore.kernel.org/r/20240121-sm7125-upstream-v4-3-f7d1212c8ebb@gmail.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
|
#
8c91ef98 |
|
30-Oct-2023 |
Neil Armstrong <neil.armstrong@linaro.org> |
dt-bindings: phy: qcom,sc8280xp-qmp-ufs-phy: document the SM8650 QMP UFS PHY Document the QMP UFS PHY on the SM8650 Platform. Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20231030-topic-sm8650-upstream-phy-v2-1-a543a4c4b491@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
|
#
79eeac2e |
|
18-Sep-2023 |
Nitin Rawat <quic_nitirawa@quicinc.com> |
dt-bindings: phy: Add QMP UFS PHY comptible for SC7280 Document the QMP UFS PHY compatible for SC7280. Signed-off-by: Nitin Rawat <quic_nitirawa@quicinc.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20230918205037.25658-2-quic_nitirawa@quicinc.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
|
#
dc5cb635 |
|
11-Jul-2023 |
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> |
dt-bindings: phy: migrate QMP UFS PHY bindings to qcom,sc8280xp-qmp-ufs-phy.yaml Migrate legacy bindings (described in qcom,msm8996-qmp-ufs-phy.yaml) to qcom,sc8280xp-qmp-ufs-phy.yaml. This removes a need to declare the child PHY node or split resource regions. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20230711145153.4167820-2-dmitry.baryshkov@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
|
#
d8c66cbb |
|
19-Apr-2023 |
Bartosz Golaszewski <bartosz.golaszewski@linaro.org> |
dt-bindings: phy: qmp-ufs: tweak clock and clock-names for sa8775p maxItems is already globally set to 3. To make the binding easier to read and remove redundancy, set minItems to 3 for sa8775p as this platform requires exactly three clocks. Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20230419120914.173715-1-brgl@bgdev.pl Signed-off-by: Vinod Koul <vkoul@kernel.org>
|
#
e5796a9c |
|
11-Apr-2023 |
Bartosz Golaszewski <bartosz.golaszewski@linaro.org> |
dt-bindings: phy: qmp-ufs: describe the UFS PHY for sa8775p Add a new compatible for the QMP UFS PHY found on sa8775p platforms and update the clocks property to accommodate three clocks. Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20230411130446.401440-3-brgl@bgdev.pl Signed-off-by: Vinod Koul <vkoul@kernel.org>
|
#
001c00ef |
|
11-Mar-2023 |
David Wronek <davidwronek@gmail.com> |
dt-bindings: phy: Add QMP UFS PHY comptible for SM7150 Document the QMP UFS PHY compatible for SM7150. Signed-off-by: David Wronek <davidwronek@gmail.com> Signed-off-by: Danila Tikhonov <danila@jiaxyga.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20230311231733.141806-2-danila@jiaxyga.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
|
#
fdb5a862 |
|
17-Jan-2023 |
Abel Vesa <abel.vesa@linaro.org> |
dt-bindings: phy: Add QMP UFS PHY comptible for SM8550 Document the QMP UFS PHY compatible for SM8550. Signed-off-by: Abel Vesa <abel.vesa@linaro.org> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Johan Hovold <johan+linaro@kernel.org> Link: https://lore.kernel.org/r/20230117224148.1914627-2-abel.vesa@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
|
#
9083b009 |
|
08-Jan-2023 |
Lux Aliaga <they@mint.lgbt> |
dt-bindings: phy: Add QMP UFS PHY compatible for SM6125 Document the QMP UFS PHY compatible for SM6125. Signed-off-by: Lux Aliaga <they@mint.lgbt> Reviewed-by: Martin Botka <martin.botka@somainline.org> Acked-by: Dhruva Gole <d-gole@ti.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20230108195336.388349-3-they@mint.lgbt Signed-off-by: Vinod Koul <vkoul@kernel.org>
|
#
521d431f |
|
22-Nov-2022 |
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> |
dt-bindings: phy: qcom,*-qmp-ufs-phy: add clock-cells property Add #clock-cells property to the QMP UFS PHYs to describe them as clock providers. The QMP PHY provides rx and tx symbol clocks for the GCC. Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20221123104443.3415267-2-dmitry.baryshkov@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
|
#
7741f31a |
|
24-Oct-2022 |
Johan Hovold <johan+linaro@kernel.org> |
dt-bindings: phy: qcom,qmp-ufs: fix sc8280xp binding The current QMP UFS PHY bindings are based on the original MSM8996 PCIe PHY binding which provided multiple PHYs per IP block and these in turn were described by child nodes. The QMP UFS PHY block only provide a single PHY and the remnant child node does not really reflect the hardware. The original MSM8996 binding also ended up describing the individual register blocks as belonging to either the wrapper node or the PHY child nodes. This is an unnecessary level of detail which has lead to problems when later IP blocks using different register layouts have been forced to fit the original mould rather than updating the binding. The bindings are arguable also incomplete as they only the describe register blocks used by the current Linux drivers. Add a new binding for the UFS QMP PHYs found on SC8280XP which further bindings can be based on. Note that the current binding is simply removed instead of being deprecated as it was only recently merged and support for SC8280XP is still under development. Signed-off-by: Johan Hovold <johan+linaro@kernel.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20221024090041.19574-9-johan+linaro@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
|