radeon_hd: from Cedar, memory sizes as bytes only for PALM/SUMO/SUMO2

should help with #17664
register change from Tahiti for #17377

Change-Id: I52b9691cd6a04b58b70e905bc29e803f06936789
Reviewed-on: https://review.haiku-os.org/c/haiku/+/5526
Reviewed-by: John Scipione <jscipione@gmail.com>
Tested-by: Commit checker robot <no-reply+buildbot@haiku-os.org>

radeon_hd: Drop unused overlay, cursor registers

* Also drop unused vblank semaphore storage
* Spotted by X512. These are from intel_extreme
which was used as a base *ages* ago.

Change-Id: I2a6baaa4849baeb8c8cf10e2046d0fbe10c3a356
Reviewed-on: https://review.haiku-os.org/c/haiku/+/5389
Reviewed-by: Alex von Gluck IV <kallisti5@unixzen.com>
Reviewed-by: waddlesplash <waddlesplash@gmail.com>
Tested-by: Commit checker robot <no-reply+buildbot@haiku-os.org>

radeon_hd: Add polaris HPD on transmitter config

Change-Id: I899e75c1556acc3462812ee6503dd1b782af2a96

radeon_hd: yolo add navi chipsets

* PCI ID's from Linux
* There are a bunch of NAVI quirks around 3d rendering pipelines
but not many around modesetting (which is the only thing we care
about)

Change-Id: If63e31fe1d37d9d95f2a71c222a4cda7a2914a5e
Reviewed-on: https://review.haiku-os.org/c/haiku/+/4467
Tested-by: Commit checker robot <no-reply+buildbot@haiku-os.org>
Reviewed-by: Alex von Gluck IV <kallisti5@unixzen.com>

radeon_hd: Cram in a bunch of new PCIID's

Change-Id: Ifbd82ef7bfc2c39b2aeb5c25be177421cd22d246
Reviewed-on: https://review.haiku-os.org/c/haiku/+/2920
Reviewed-by: Alex von Gluck IV <kallisti5@unixzen.com>
Reviewed-by: Adrien Destugues <pulkomandy@gmail.com>

radeon_hd: Add missing FirePro, Add vega, cleanup names.

* Vega is 100% untested.
* I think AMD is doing away with the DCE version numbers.

radeon_hd: Polaris10 power distribution fix

* Helps prevent mainboard explosions and other bad stuff.
* ...maybe not explosions, but bad things.
* The RX 480 reference design can pull as much as 90W
from its PCIe slot at load. PCIe is rated for 75W.
* This change overloads the PCIe power cables vs the PCIe
slot. The PCIe power cables can handle going over spec.
* Untested since we really can't come close to loading a
RX 480 without hardware OpenGL ^_^
* Should be able to test on real hardware within a week.

radeon_hd: Add new Polaris GPU, untested

radeon_hd: Properly and consistently pick HPD ID

radeon_hd: Add Hawaii,Topaz,Tonga,Carrizo chips/cards

radeon_hd: Add latest generation radeon_hd cards

* These aren't tested, but since we go off of DCE
versions for a lot of stuff, they may work.
* AMD doens't include market names in their drivers
anymore, so if we want to label them it will take
additional work.

RadeonHD: Fix incorrect name -> chipset mapping

* Put names and chipsets next to each other to
help prevent further mismatch.
* Fix potential (but unlikely) string overflow
* CID 611140

RadeonHD: Drop marketing names

* They are all over the place.. I give up
* Going off of engineering names and DCE is more accurate
* A lot of this info came from the x.org wiki
* I'd like to transition some of the engineering
name checks to use DCE versions.. they tend to be more
accurate and exact. (in some cases we can't, but most of
the time we can)

RadeonHD: Cleanup, new cards

* Fix some incorrect chip codenames
* Introduce a dual gpu flag
* Add some new chipsets and document
the next generation of chips

radeon_hd: Add Northern Island registers

radeon_hd: Final round of header cleanup

* This puts the registers in a better state and ensures
all model dependant defines are prefixed with card series
* Consolidate evergreen defines into single header

radeon_hd: r5xx to Avivo define cleanup

* Reorganize and clean up card defines
* Fix define spaces
* Unify card naming
* No (real) functional change

radeon_hd: Add Southen Island gpu temp sensor code

* Add AMD SI defines in si_reg.h
* Prefix SI registers with SI_
* Tab and space cleanup

radeon_hd: Update southern islands info

* Add 7770 and 7750 pciid's
* Remove Thames and reorganize code names for SI
(seems the codenames changed before release)
* Untested as always

First attempt at older Radeon card support
* add missing chipset ranges
* add a few more older (X1200) PCI ID's (mostly IGP)
* add code to detect and set frame buffer size on old chipsets
* we get to the connector detection currently and fail due to the
lack of legacy support on my X1200 IGP

* style cleanup of shared storage names
* return better data on card
* display chipset flags in screen preflet


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@43226 a95241bf-73f2-0310-859d-f6bbb57e9c96

* add lots of missing evergreen defines
* evergreen headers are split due to different
header copyrights
* detect and set up evergreen memory controler
* change the way we manage radeon chipsets to
more closely match drm driver as the chipset
model numbers aren't in order and change from
numbers to names.
* check for evergreen when populating frame buffer
information.
* style cleanup


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@43225 a95241bf-73f2-0310-859d-f6bbb57e9c96

* reorganize register definitions
There were a large number if incorrect, duplicated, misplaced
registers that were leading to bugs in the code. This is my first
shot at cleaning them up. Luckly as we are using AtomBIOS the number
of registers we need to know about is shrinking.
* remove registers left over from register banging days
* r770 is less then r710, r720 in the drm sources. Fix in code.
* enable newer radeons for testing


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42930 a95241bf-73f2-0310-859d-f6bbb57e9c96

* redesign pretty much everything frame buffer related
* don't resize the frame buffer after mapping it.. doesn't make sense
* add memory controller code and program the memory controller for r600
* remove unneeded frame_buffer_int
* don't malloc mc_info, waste of time
* fix scaler setting
* vramStart in mc should be 0... get vertical colored lines however when this
this is set properly (everything in mc_info is the MC view of FB BAR)
When vramStart is the FB physical address... i get proper video on some cards
... thoughts?


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42924 a95241bf-73f2-0310-859d-f6bbb57e9c96

* add chipset flags vs isIGP
* we can now utilize these chipset
flags throughout the driver to better id
cards and features
* remove leftover BIOS size define from intel skel
* no *real* functional change


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42904 a95241bf-73f2-0310-859d-f6bbb57e9c96

* simplify some trace statements
* add potential support for IGP chipsets
* igp code is *untested* and should work *in theory*
* potentially resolves #8040 / #8046 ?


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42901 a95241bf-73f2-0310-859d-f6bbb57e9c96

* pass dceMajor and dceMinor to accelerant
* will fix other var names to match style guidelines
shortly


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42891 a95241bf-73f2-0310-859d-f6bbb57e9c96

* remove un-used registers that were left over from
base intel_extreme driver long ago
* no functional change


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42880 a95241bf-73f2-0310-859d-f6bbb57e9c96

* introduce mc control calls
* malloc storage for mc state info
* redo pll range struct
* change to ATOM_ENCODER_MODE for connector info
* redo pll calculations to match AtomBIOS requirements
* some structure changes
* no longer init already posted AtomBIOS as it
causes an infinite loop of AtomBIOS calls


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42644 a95241bf-73f2-0310-859d-f6bbb57e9c96

* add card instance to accelerant shared info
* when TRACE_ATOM is enabled in bios.c, we dump
each accelerant instance of the AtomBIOS rom
to disk in /boot/common/cache/tmp/ (next to usb
hid descriptors in the same file name format)
* these images can be parsed with the AtomDis application


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42622 a95241bf-73f2-0310-859d-f6bbb57e9c96

* add initial set of Northern Island cards
* add igp property to pciid map
* add disabled bios pull for r700 and ni cards
* refactor model numbering as >R700 AMD switched
to named card families


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42596 a95241bf-73f2-0310-859d-f6bbb57e9c96

* lots of changes
* add missing header for some radeon registers
* begin removing now un-needed direct register calls
* move and refactor crtc functions
* fix function naming to be clearer
* create more AtomBIOS style calls
* this will eat your cat at the moment, don't bother testing


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42582 a95241bf-73f2-0310-859d-f6bbb57e9c96

* create area for AtomBIOS
* clone mapped AtomBIOS area into accelerant


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42560 a95241bf-73f2-0310-859d-f6bbb57e9c96

* move obtaining / copying the vga bios into the driver.
* add missing r500 header
* replace r600 headers with newer one from kernel


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42554 a95241bf-73f2-0310-859d-f6bbb57e9c96

* Map AtomBIOS specified by PCI rom into virtual memory
* Point AtomBIOS to PCI rom mapped in memory
* Things no longer crash, but we get an Invalid BIOS Magic error
in the logs.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42543 a95241bf-73f2-0310-859d-f6bbb57e9c96

* Move bios_info into shared info
* Pull pci_rom base address from pci subsystem
* Point AtomBIOS parser to pci rom address
to set up and malloc atom_context
* This is untested! Don't run on an
expensive card until I test it on a cheaper
one!


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42541 a95241bf-73f2-0310-859d-f6bbb57e9c96

* Little cleanup
* Add missing Idle call for connectors
* Reformulate blanking.. this should match what the
register is after the GTF vesa call
* Set FrameBuffer to card internal address


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42509 a95241bf-73f2-0310-859d-f6bbb57e9c96

pass device pciid through to accelerant

git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42203 a95241bf-73f2-0310-859d-f6bbb57e9c96

add universal RadeonHD power states

git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42189 a95241bf-73f2-0310-859d-f6bbb57e9c96

Add surface address high handling; set primary and secondary surface frame buffer offset

git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@41769 a95241bf-73f2-0310-859d-f6bbb57e9c96

* rename graphics_memory to frame_buffer. lets keep consistant
* pass mapped frame buffer area id to accelerant
* remove my temporary hacked together frame buffer memory mapping
* completely rely on PCI BAR for now for aperture size / location instead of
R6XX_CONFIG_FB_BASE reg.
* Remove my temporary AllocateFB function.
* set grphPrimarySurfaceAddr to physical memory frame buffer location (offset 0)
* fix P/N sync setting.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@41722 a95241bf-73f2-0310-859d-f6bbb57e9c96

ensure framebuffer doesn't exceed PCI bar; add basic monitoring of frame buffer memory allocation; fix return of framebuffer to OS to be the correct area

git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@41586 a95241bf-73f2-0310-859d-f6bbb57e9c96

remove frame_buffer_pci as it duplicates frame_buffer_phys, remove frame_buffer_base as it duplicates framebuffer_area

git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@41570 a95241bf-73f2-0310-859d-f6bbb57e9c96

* actually set device_chipset before reading it.
* make shared memory info naming clearer.
* move frame buffer internal offset read to driver
* remove check of > 512MB as we really should always use frame_buffer_size


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@41569 a95241bf-73f2-0310-859d-f6bbb57e9c96

make math easier to read; fix chipset int length; additions to CardScale

git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@41561 a95241bf-73f2-0310-859d-f6bbb57e9c96

read and store aperture size (will be used in fblocation calculations)

git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@41543 a95241bf-73f2-0310-859d-f6bbb57e9c96

* turns out r800 has different register locations :(
* remove device_type and replace with device_chipset
* change MEMSIZE to >> 10 as r600-r700 store this in bytes (r800 uses MB and will be fixed soon)
* add if statement to select what register locations to use based on chipset
** Maybe use a struct or something to store these in a standardized way?


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@41525 a95241bf-73f2-0310-859d-f6bbb57e9c96

stir in evergreen/r800 mixins from Xorg radeonhd driver, may need to add to this as I just grep'ed evergreen; r800/evergreen has a different set of registers for some things, thus my work so far not working for me :(

git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@41523 a95241bf-73f2-0310-859d-f6bbb57e9c96

* add commented out radeon_hd driver/accel to HaikuImage
* add boot item support to radeon hd driver
* add edid storage to shared info
* add pull of active monitor VESA EDID to radeon hd driver (until AtomBios complete)
* EDID pulled in driver now passed to create_display_modes
* move registers to external stock xorg radeon hd register headers (lic. allows it)


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@41411 a95241bf-73f2-0310-859d-f6bbb57e9c96

add some R800 cards to known pci ids; implement basic known card type/model storage

git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@41289 a95241bf-73f2-0310-859d-f6bbb57e9c96

add some needed generic radeonhd registers, added Xorg copyright as I am taking a lot of their register definitions

git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@41171 a95241bf-73f2-0310-859d-f6bbb57e9c96

remove a bunch of leftover Intel extreme registers, add in relevant ATI r600 registers from Xorg driver, remove kATIVendorId from driver and use vendor var from global private header

git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@41073 a95241bf-73f2-0310-859d-f6bbb57e9c96

Work in progress of a Radeon HD 3200 driver to change the display mode (status when I leave the coding spring). At least it shows a picture but with a wrong scaling.

git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@36243 a95241bf-73f2-0310-859d-f6bbb57e9c96

radeon_hd: Properly and consistently pick HPD ID

radeon_hd: Add Hawaii,Topaz,Tonga,Carrizo chips/cards

radeon_hd: Add latest generation radeon_hd cards

* These aren't tested, but since we go off of DCE
versions for a lot of stuff, they may work.
* AMD doens't include market names in their drivers
anymore, so if we want to label them it will take
additional work.

RadeonHD: Fix incorrect name -> chipset mapping

* Put names and chipsets next to each other to
help prevent further mismatch.
* Fix potential (but unlikely) string overflow
* CID 611140

RadeonHD: Drop marketing names

* They are all over the place.. I give up
* Going off of engineering names and DCE is more accurate
* A lot of this info came from the x.org wiki
* I'd like to transition some of the engineering
name checks to use DCE versions.. they tend to be more
accurate and exact. (in some cases we can't, but most of
the time we can)

RadeonHD: Cleanup, new cards

* Fix some incorrect chip codenames
* Introduce a dual gpu flag
* Add some new chipsets and document
the next generation of chips

radeon_hd: Add Northern Island registers

radeon_hd: Final round of header cleanup

* This puts the registers in a better state and ensures
all model dependant defines are prefixed with card series
* Consolidate evergreen defines into single header

radeon_hd: r5xx to Avivo define cleanup

* Reorganize and clean up card defines
* Fix define spaces
* Unify card naming
* No (real) functional change

radeon_hd: Add Southen Island gpu temp sensor code

* Add AMD SI defines in si_reg.h
* Prefix SI registers with SI_
* Tab and space cleanup

radeon_hd: Update southern islands info

* Add 7770 and 7750 pciid's
* Remove Thames and reorganize code names for SI
(seems the codenames changed before release)
* Untested as always

First attempt at older Radeon card support
* add missing chipset ranges
* add a few more older (X1200) PCI ID's (mostly IGP)
* add code to detect and set frame buffer size on old chipsets
* we get to the connector detection currently and fail due to the
lack of legacy support on my X1200 IGP

* style cleanup of shared storage names
* return better data on card
* display chipset flags in screen preflet


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@43226 a95241bf-73f2-0310-859d-f6bbb57e9c96

* add lots of missing evergreen defines
* evergreen headers are split due to different
header copyrights
* detect and set up evergreen memory controler
* change the way we manage radeon chipsets to
more closely match drm driver as the chipset
model numbers aren't in order and change from
numbers to names.
* check for evergreen when populating frame buffer
information.
* style cleanup


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@43225 a95241bf-73f2-0310-859d-f6bbb57e9c96

* reorganize register definitions
There were a large number if incorrect, duplicated, misplaced
registers that were leading to bugs in the code. This is my first
shot at cleaning them up. Luckly as we are using AtomBIOS the number
of registers we need to know about is shrinking.
* remove registers left over from register banging days
* r770 is less then r710, r720 in the drm sources. Fix in code.
* enable newer radeons for testing


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42930 a95241bf-73f2-0310-859d-f6bbb57e9c96

* redesign pretty much everything frame buffer related
* don't resize the frame buffer after mapping it.. doesn't make sense
* add memory controller code and program the memory controller for r600
* remove unneeded frame_buffer_int
* don't malloc mc_info, waste of time
* fix scaler setting
* vramStart in mc should be 0... get vertical colored lines however when this
this is set properly (everything in mc_info is the MC view of FB BAR)
When vramStart is the FB physical address... i get proper video on some cards
... thoughts?


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42924 a95241bf-73f2-0310-859d-f6bbb57e9c96

* add chipset flags vs isIGP
* we can now utilize these chipset
flags throughout the driver to better id
cards and features
* remove leftover BIOS size define from intel skel
* no *real* functional change


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42904 a95241bf-73f2-0310-859d-f6bbb57e9c96

* simplify some trace statements
* add potential support for IGP chipsets
* igp code is *untested* and should work *in theory*
* potentially resolves #8040 / #8046 ?


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42901 a95241bf-73f2-0310-859d-f6bbb57e9c96

* pass dceMajor and dceMinor to accelerant
* will fix other var names to match style guidelines
shortly


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42891 a95241bf-73f2-0310-859d-f6bbb57e9c96

* remove un-used registers that were left over from
base intel_extreme driver long ago
* no functional change


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42880 a95241bf-73f2-0310-859d-f6bbb57e9c96

* introduce mc control calls
* malloc storage for mc state info
* redo pll range struct
* change to ATOM_ENCODER_MODE for connector info
* redo pll calculations to match AtomBIOS requirements
* some structure changes
* no longer init already posted AtomBIOS as it
causes an infinite loop of AtomBIOS calls


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42644 a95241bf-73f2-0310-859d-f6bbb57e9c96

* add card instance to accelerant shared info
* when TRACE_ATOM is enabled in bios.c, we dump
each accelerant instance of the AtomBIOS rom
to disk in /boot/common/cache/tmp/ (next to usb
hid descriptors in the same file name format)
* these images can be parsed with the AtomDis application


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42622 a95241bf-73f2-0310-859d-f6bbb57e9c96

* add initial set of Northern Island cards
* add igp property to pciid map
* add disabled bios pull for r700 and ni cards
* refactor model numbering as >R700 AMD switched
to named card families


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42596 a95241bf-73f2-0310-859d-f6bbb57e9c96

* lots of changes
* add missing header for some radeon registers
* begin removing now un-needed direct register calls
* move and refactor crtc functions
* fix function naming to be clearer
* create more AtomBIOS style calls
* this will eat your cat at the moment, don't bother testing


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42582 a95241bf-73f2-0310-859d-f6bbb57e9c96

* create area for AtomBIOS
* clone mapped AtomBIOS area into accelerant


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42560 a95241bf-73f2-0310-859d-f6bbb57e9c96

* move obtaining / copying the vga bios into the driver.
* add missing r500 header
* replace r600 headers with newer one from kernel


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42554 a95241bf-73f2-0310-859d-f6bbb57e9c96

* Map AtomBIOS specified by PCI rom into virtual memory
* Point AtomBIOS to PCI rom mapped in memory
* Things no longer crash, but we get an Invalid BIOS Magic error
in the logs.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42543 a95241bf-73f2-0310-859d-f6bbb57e9c96

* Move bios_info into shared info
* Pull pci_rom base address from pci subsystem
* Point AtomBIOS parser to pci rom address
to set up and malloc atom_context
* This is untested! Don't run on an
expensive card until I test it on a cheaper
one!


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42541 a95241bf-73f2-0310-859d-f6bbb57e9c96

* Little cleanup
* Add missing Idle call for connectors
* Reformulate blanking.. this should match what the
register is after the GTF vesa call
* Set FrameBuffer to card internal address


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42509 a95241bf-73f2-0310-859d-f6bbb57e9c96

pass device pciid through to accelerant

git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42203 a95241bf-73f2-0310-859d-f6bbb57e9c96

add universal RadeonHD power states

git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42189 a95241bf-73f2-0310-859d-f6bbb57e9c96

Add surface address high handling; set primary and secondary surface frame buffer offset

git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@41769 a95241bf-73f2-0310-859d-f6bbb57e9c96

* rename graphics_memory to frame_buffer. lets keep consistant
* pass mapped frame buffer area id to accelerant
* remove my temporary hacked together frame buffer memory mapping
* completely rely on PCI BAR for now for aperture size / location instead of
R6XX_CONFIG_FB_BASE reg.
* Remove my temporary AllocateFB function.
* set grphPrimarySurfaceAddr to physical memory frame buffer location (offset 0)
* fix P/N sync setting.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@41722 a95241bf-73f2-0310-859d-f6bbb57e9c96

ensure framebuffer doesn't exceed PCI bar; add basic monitoring of frame buffer memory allocation; fix return of framebuffer to OS to be the correct area

git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@41586 a95241bf-73f2-0310-859d-f6bbb57e9c96

remove frame_buffer_pci as it duplicates frame_buffer_phys, remove frame_buffer_base as it duplicates framebuffer_area

git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@41570 a95241bf-73f2-0310-859d-f6bbb57e9c96

* actually set device_chipset before reading it.
* make shared memory info naming clearer.
* move frame buffer internal offset read to driver
* remove check of > 512MB as we really should always use frame_buffer_size


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@41569 a95241bf-73f2-0310-859d-f6bbb57e9c96

make math easier to read; fix chipset int length; additions to CardScale

git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@41561 a95241bf-73f2-0310-859d-f6bbb57e9c96

read and store aperture size (will be used in fblocation calculations)

git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@41543 a95241bf-73f2-0310-859d-f6bbb57e9c96

* turns out r800 has different register locations :(
* remove device_type and replace with device_chipset
* change MEMSIZE to >> 10 as r600-r700 store this in bytes (r800 uses MB and will be fixed soon)
* add if statement to select what register locations to use based on chipset
** Maybe use a struct or something to store these in a standardized way?


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@41525 a95241bf-73f2-0310-859d-f6bbb57e9c96

stir in evergreen/r800 mixins from Xorg radeonhd driver, may need to add to this as I just grep'ed evergreen; r800/evergreen has a different set of registers for some things, thus my work so far not working for me :(

git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@41523 a95241bf-73f2-0310-859d-f6bbb57e9c96

* add commented out radeon_hd driver/accel to HaikuImage
* add boot item support to radeon hd driver
* add edid storage to shared info
* add pull of active monitor VESA EDID to radeon hd driver (until AtomBios complete)
* EDID pulled in driver now passed to create_display_modes
* move registers to external stock xorg radeon hd register headers (lic. allows it)


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@41411 a95241bf-73f2-0310-859d-f6bbb57e9c96

add some R800 cards to known pci ids; implement basic known card type/model storage

git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@41289 a95241bf-73f2-0310-859d-f6bbb57e9c96

add some needed generic radeonhd registers, added Xorg copyright as I am taking a lot of their register definitions

git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@41171 a95241bf-73f2-0310-859d-f6bbb57e9c96

remove a bunch of leftover Intel extreme registers, add in relevant ATI r600 registers from Xorg driver, remove kATIVendorId from driver and use vendor var from global private header

git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@41073 a95241bf-73f2-0310-859d-f6bbb57e9c96

Work in progress of a Radeon HD 3200 driver to change the display mode (status when I leave the coding spring). At least it shows a picture but with a wrong scaling.

git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@36243 a95241bf-73f2-0310-859d-f6bbb57e9c96