Copy stable/9 to releng/9.3 as part of the 9.3-RELEASE cycle.

Approved by: re (implicit)
Sponsored by: The FreeBSD Foundation

MFC r260057:

In sys/dev/scc, remove unused static function scc_setmreg(). While
here, invoke scc_getmreg() in two more places where it can be used.

Reviewed by: marcel

MFC: r253902

Const'ify scc_driver_name.

MFC: r253900

- Use NULL instead of 0 for pointers.
- Remove unnecessary __RMAN_RESOURCE_VISIBLE.

MFC: r253899, r253920

- Implement iclear methods for QUICC and SAB 82532. With r253161 in place,
this is is crucial at least for the latter.
What happens is that attaching uart(4) to scc(4) causes the SAB 82532 to
"receive" something and trigger a SER_INT_RXREADY interrupt, given that
at least fast/filter interrupts are already enabled. Prior to r253161,
uart_bus_ihand() was set up at this point and handled that condition,
i. e. read the RX FIFO and issued a Receive Message Complete.
Now, uart_bus_ihand() and uart_intr() are setup after attaching uart(4),
leaving the SER_INT_RXREADY interrupt triggered during the latter to
be handled by the iclear method. However, with that method not implement,
this in turn causes SAB 82532 to not issue any further SER_INT_RXREADY
interrupts until the RX FIFO is full again. Thus, 15 received bytes go
to nowhere, given that "the other half" of the RX FIFO is used for status
information. Hence, implementing sab82532_bfe_iclear() fixes things again.
Potentially, the same problem exists for QUICC.
- Remove unnecessary __RMAN_RESOURCE_VISIBLE.
- Remove a superfluous header.
- Use KOBJMETHOD_END.
- Mark unused arguments as such.
- Remove variables unused after initialization.

Reviewed by: marcel (earlier version)

MFC r227293 (by ed):
Mark MALLOC_DEFINEs static that have no corresponding MALLOC_DECLAREs.

This means that their use is restricted to a single C file.

Toss bogus mergeinfo.

MFC r235634

Fix and update battery status bits according to linux driver

MFC r226173, r227843, r227848 and r227908:
Use DEVMETHOD_END to mark end of device methods.
Remove superfluous device methods.
Add some missing __FBSBID() macros.

Copy head to stable/9 as part of 9.0-RELEASE release cycle.

Approved by: re (implicit)

Recognize the SAB 82532 found in Fujitsu PRIMEPOWER650 and 900.

Make iclear return int, since that matches all function definitions of it.

With rev 1.24 of sys/powerpc/powermac/macio.c, we now get a
total of 6 interrupt resources for scc(4) on macio(4). This
is 3 per channel, of which the 1st of each channel is the
interrupt associated with the SCC. The other 2 are for DMA
operation.
Change scc_bfe_attach() to accept an argument that's the
number of interrupts per channel (ipc) and change each bus
front-end (bfe) to pass that argument through a wrapper
for the device_attach method.

For now, we only allocate the 1st interrupt of each channel
to perserve behaviour.

Support for Freescale QUad Integrated Communications Controller.

The QUICC engine is found on various Freescale parts including MPC85xx, and
provides multiple generic time-division serial channel resources, which are in
turn muxed/demuxed by the Serial Communications Controller (SCC).

Along with core QUICC/SCC functionality a uart(4)-compliant device driver is
provided which allows for serial ports over QUICC/SCC.

Approved by: cognet (mentor)
Obtained from: Juniper
MFp4: e500

Add method enabled() to the SCC interface. This method can be used
by driver backends to mark individual channels as enabled or not.
The default implementation of this method always mark channels as
enabled.
This method is currently not used, but is added with the PowerQUICC
in mind where the 2nd SCC channel can be disabled.

Allow the range of a SCC class to be 0. This gives all child
devices the same (overlapping) I/O range. This is useful for
embedded communications controllers like the CPM of various
models of the PowerQUICC.

Pass the RID from the bus frontends to the core probe function.
Currently all RIDs are 0, but for PCI devices this typically
isn't the case. This change is made with future PCI support in
mind.

o break newbus api: add a new argument of type driver_filter_t to
bus_setup_intr()

o add an int return code to all fast handlers

o retire INTR_FAST/IH_FAST

For more info: http://docs.freebsd.org/cgi/getmsg.cgi?fetch=465712+0+current/freebsd-current

Reviewed by: many
Approved by: re@

Fix braino: The cl_range field should not hold the shifted I/O
space range per channel, but rather the unshifted range. The
shifting depends on the bus. The hardcoded shift was specific
to the SBus on sparc64. The shifted range is now determined at
run-time. This fixes the mac-io attachment.

Revert previous commit. Spinlocks hold interrupts disabled, so
preemption is not possible.

Pointed out by: jhb@

If we have multiple interrupt resources, like for Z8530 clones on the
mac-io bus, we cannot setup FAST interrupt handlers. This because we
use spinlocks to protect the hardware and all interrupt resources are
assigned the same interrupt handler. When the interrupt handler is
invoked for interrupt X, it could be preempted for interrupt Y while
it was holding the lock (where X and Y are the interrupt resources
corresponding a single instance of this driver). This is a deadlock.
By only using a MPSAFE handler in that case we prevent preemption.

The Z8530 on the MacIO has an interrupt per channel. Deal with this
by having interrupt resource variables per channel. We don't set up
different interrupt handlers per channel, though.

Add a MacIO bus attachment. The Z8530 as present in the Mac needs
a different register shift and is fed by a different clock than
we use for UltraSPARC hardware. To deal with this, the regshft and
rclk fields in the class structure are removed and bus frontends
now pass the right regshft and rclk to the probe function where
they're put in the BAS and passed in to subordinate drivers.

Fix cut-n-paste braino in previous commit: s/puc/scc/g

Pointy hat: marcel@

Add a DRIVER_MODULE declaration for fhc(4) as this attachement is
also used for the FHC bus.

Pointed out by: marius@

Add scc(4), a driver for serial communications controllers. These
controllers typically have multiple channels and support a number
of serial communications protocols. The scc(4) driver is itself
an umbrella driver that delegates the control over each channel
and mode to a subordinate driver (like uart(4)).
The scc(4) driver supports the Siemens SAB 82532 and the Zilog
Z8530 and replaces puc(4) for these devices.