MFC r354702:
Make ntb(4) send bus_get_dma_tag() requests to parent buses passing real
bus' child pointers instead of grandchilds.

DMAR does not like requests from devices not parented directly by PCI.

MFC r354580: Allow splitting PLX NTB BAR2 into several memory windows.

Address Lookup Table (A-LUT) being enabled allows to specify separate
translation for each 1/128th or 1/256th of the BAR2. Previously it was
used only to limit effective window size by blocking access through some
of A-LUT elements. This change allows A-LUT elements to also point
different memory locations, providing to upper layers several (up to 128)
independent memory windows. A-LUT hardware allows even more flexible
configurations than this, but NTB KPI have no way to manage that now.

MFC r344437: Allow I/OAT of present Xeon E5/E7 to work thorugh PLX NTB.

Its a hack, we can't know/list all DMA engines, but this covers all
I/OAT of Xeon E5/E7 at least from Sandy Bridge till Skylake I saw.

MFC r328611: Try to preallocate receive memory early.

We may not have enough contiguous memory later, when NTB connection get
established. It is quite likely that NTB windows are symmetric and this
allocation remain, but even if not, we will just reallocate it later.

MFC r328450: Use bus_dmamem_alloc(9) KPI instead of contigmalloc(9).

I suppose it should make this code NUMA-aware with recent NUMA drop-in,
trying to allocate shared memory buffers from domain closer to NT-bridge.

MFC r324155: Add initial support for Address Lookup Table (A-LUT).

When enabled by EEPROM, use it to relax translation address/size alignment
requirements for BAR2 window by 128 or 256 times.

MFC r323575: Add second entry to LUT on a link side in B2B mode.

Each of two entries on a virtual side should have its counterpart on a
peer's link side.

MFC r323128: Increase negotiation polling period from 10ms to 100ms.

There is no big need to burn CPU if other side may be not there yet. For
example, the PLX hardware by default enables the NTB link up on reset, not
dependig on driver to do it. In case of Intel hardware this also reduces
race between MSI-X workaround negotiation and upper layers, using the same
scratchpad registers in different time.

MFC r323126: Make NTB drivers report more info via NewBus methods.

MFC r323074: Clear doorbell bits after masking them before processing.

In theory this allows to avoid one more expensive doorbell register read
later in some scenarios. But in practice it also significantly increases
packet rate on PLX hardware, that I can't explain yet, possibly work-
arounding some interrupt delays.

MFC r323032, r323053, r323058, r323059, r323084, r323114, r323127:
Add NTB driver for PLX/Avago/Broadcom PCIe switches.

This driver supports both NTB-to-NTB and NTB-to-Root Port modes (though
the second with predictable complications on hot-plug and reboot events).
I tested it with PEX 8717 and PEX 8733 chips, but expect it should work
with many other compatible ones too. It supports up to two NT bridges
per chip, each of which can have up to 2 64-bit or 4 32-bit memory windows,
6 or 12 scratchpad registers and 16 doorbells. There are also 4 DMA engines
in those chips, but they are not yet supported.

While there, rename Intel NTB driver from generic ntb_hw(4) to more specific
ntb_hw_intel(4), so now it is on par with this new ntb_hw_plx(4) driver and
alike to Linux naming.

MFC r322981: Mask doorbells while processing them.

This fixes interrupt storms on hardware using legacy level-triggered
interrupts, since doorbell processing could take time after interrupt
handler completion, that triggered extra interrupts in a loop.

MFC r322980: Fix fake interrupt when set doorbell is unmasked.

Since the doorbell bit is already set when interrupt handler is called,
the event was not propagated to upper layer. It was working normally
because present code was not using masking actively, but that is going
to change.

MFC r323046: Make ntb_transport(4) ready receive early link events.

Those events may be reported as soon as callback is registered, if the link
is enabled by hardware or some other application.

While there, clean link_is_up variable on link down event.

MFC r323047: Make ntb_set_ctx() always generate fake link event.

It allows application driver get initial link state without racing with
hardware interrupts, thanks to the context rmlock held here.

MFC r317340: Report NTB link speed to console and interface.

MFC r311935: Pretend we support some IOCTLs to not scary upper layers.

MFC r303554, r303561:
Block MSIX negotiation until SMP started and IRQ reshuffled.

MFC r303553: Make MAC address generation more random.

'ticks' approach does not work at boot time.

MFC r303551: Fix infinite loops introduced at r303429.

MFC r303514: Fix NTBT_QP_LINKS negotiation.

I believe it never worked correctly for more the one queue even in Linux.
This fixes case when one of consumer drivers is not loaded on one side,
but its queues still announced as ready if something else brought link up.

While there, remove some pointless NULL checks.

MFC r303510: Clear scratchpad after MSIX negotiation to not leak garbage.

MFC r303494: Once more refactor KPI between ntb_transport(4) and if_ntb(4).

New design allows to attach multiple consumers to ntb_transport(4) instance.
Previous design obtained from Linux theoretically allowed that, but was not
practically usable (Linux also has only one consumer driver now).

MFC r303429, r303437:
Once more refactor KPI between NTB hardware and consumers.

New design allows hardware resources to be split between several consumers.
For example, one BAR can be dedicated for remote memory access, while other
resources can be used for packet transport for virtual Ethernet interface.
And even without resource split, this code allows to specify which consumer
driver should attach the hardware.

From some points this makes the code even closer to Linux one, even though
Linux does not provide the described flexibility.

MFC r303266: Postpone ntb_get_msix_info() till we need to negotiate MSIX.

Calling it earlier increases the window when MSIX info may change.
This change does not solve the problem completely, but seems logical.
Complete solution should probably include link reset in case of MSIX
remap to trigger new negotiation, but we have no way to get notified
about that now.

MFC r302622 (by sephe): ntb: Fix LINT

MFC r302531: Revert odd change, setting limit registers before base.

I don't know what errata is mentioned there, I was unable to find it, but
setting limit before the base simply does not work at all. According to
specification attempt to set limit out of the present window range resets
it to zero, effectively disabling it. And that is what I see in practice.

Fixing this properly disables access for remote side to our memory until
respective xlat is negotiated and set. As I see, Linux does the same.

MFC r302529: Remove callout_reset(link_work) from ntb_transport_attach().

At that point link is quite likely not established yet, so messing with
scratch registers is premature there. Original commit message mentioned
code diff reduction from Linux, but this line is not present in Linux now.

MFC r302530: Fix wrong copy/paste in r302510.

MFC r302510:
Simplify MSIX MW BAR xlat setup, and don't forget to unlock its limit.

The last fixes SB01BASE_LOCKUP workaround after driver reload.

MFC r302508: Disable SB01BASE_LOCKUP workaround when split BARs disabled.

For some reason hack with sending MSI-X interrupts by writing to remote
LAPIC memory works only for 32-bit BARs, that are available only if split
BARs mode is enabled in BIOS. If it is not, complain loudly and fall back
to less efficient workaround.

MFC r302499: Improve checksum "offload" support.

For compatibility reasons make driver not report any checksum offload by
default, since there is indeed none. But if administrator knows that
interface is used only for local traffic, he can enable fake checksum
offload manually on both sides to save some CPU cycles, since the data
are already protected by CRC32 of PCIe link.

Sponsored by: iXsystems, Inc.

MFC r302496: Rewrite if_ntb to use modern interface KPIs and features.

It includes: link state, if_transmit, buf_ring, multiple queues, bpf, etc.

Sponsored by: iXsystems, Inc.

MFC r302495: Improve memory allocation errors handling on receive.

MFC r302494: Synchronize MTU code with Linux.

It is mandatory for transport compatibility.

MFC r302493: Reimplement doorbell register emulation for NTB_SB01BASE_LOCKUP.

This allows at least first three doorbells to work very close to normal
hardware, properly signaling events to upper layers without spurious or
lost events. Doorbells above the first three may still report spurious
events due to lack of reliable information, but they are rarely used.

MFC r302492: Bring some more order into link and qp state handling.

Do not touch scratchpad registers until link is reported up.
Mask and do not handle doorbell events until respective qp is up.

MFC r302491: Switch ctx_lock from mutex to rmlock.

It is odd idea to serialize different MSI-X vectors. Use of rmlocks
here allows them to execute in parallel, but still protects ctx.
If upper layers require any additional serialization -- they can
do it by themselves.

MFC r302490: Create separate RX taskqueue for each qp.

MFC r302489: Remove rx_completion_task taskqueue.

It is not needed after RX lock removed in previous commit.

MFC r302488: Remove unneeded RX lock, and make TX lock per-qp.

MFC r302487: Reduce code divergence from Linux, preparing for DMA support.

MFC r302486: Fix operation with multiple qps.

MFC r302484: NewBus'ify NTB subsystem.

This follows NTB subsystem modularization in Linux, tuning it to FreeBSD
native NewBus interfaces. This change allows to support different types
of hardware with different drivers, support multiple NTB instances in a
system, ntb_transport module use for needs other then if_ntb, etc.

Sponsored by: iXsystems, Inc.

MFC r302483: Remove some dead code found by Clang static analyzer.

MFC r302482: Fix NTB_SDOORBELL_LOCKUP workaround.

Since SBARxSZ register can be write-once, it can be unusable for disabling
the SBAR. For such case also set SBARxBASE to zero to not intersect with
config BAR.

Copy head@r302406 to stable/11 as part of the 11.0-RELEASE cycle.
Prune svn:mergeinfo from the new branch, as nothing has been merged
here.

Additional commits post-branch will follow.

Approved by: re (implicit)
Sponsored by: The FreeBSD Foundation

Fix if_ntb interface setup to include IFF_MULTICAST.

This allows IPv6 link local addresses (and other IPv6 functionality) to work.

PR: 210355
Submitted by: Steve Wahl and David Bright (both at Dell Inc.)
Reviewed by: cem, mav
Tested by: mav (on Intel hardware)
Approved by: re (kib)
MFC after: 5 days
Sponsored by: Dell Inc.
Differential Revision: https://reviews.freebsd.org/D6885

When negotiating NTB_SB01BASE_LOCKUP workaround, don't try to limit the
BAR size to 1MB. According to Xeon v3 specifications and my tests, that
size register is write-once and so not writeable after BIOS written it.

Instead of that, make the code work with BAR of any sufficient size,
properly calculating offset within its base. It also simplifies the code.

Discussed with: cem
MFC after: 2 weeks
Sponsored by: iXsystems, Inc.

When negotiating MSIX parameters, give other head time to see our
NTB_MSIX_RECEIVED status, before making upper layers overwrite it.

This is not completely perfect, but now it works better then before.

MFC after: 2 weeks
Sponsored by: iXsystems, Inc.

Re-enable write combining, disabled by default at r295486.

if_ntb(4) strongly benefits from WC, improving throughput from 350Mbit/s
to 8-10Gbit/s on my tests.

MFC after: 1 week

ntb_hw(4): Only record the first three MSIX vectors

Don't overrun the msix_data array by reading the (unused) link state
interrupt information.

Reported by: mav (earlier version)
Sponsored by: EMC / Isilon Storage Division
Differential Revision: https://reviews.freebsd.org/D6489

ntb_hw(4): Add sysctls for administrative/test link config, state

dev.ntb_hw.0.admin_up=0/1: Like ifconfig UP/DOWN.
dev.ntb_hw.0.active=0/1: Like ifconfig 'status'

Reviewed by: ngie
Sponsored by: EMC / Isilon Storage Division
Differential Revision: https://reviews.freebsd.org/D6429

sys/dev: minor spelling fixes.

Most affect comments, very few have user-visible effects.

As <machine/pmap.h> is included from <vm/pmap.h>, there is no need to
include it explicitly when <vm/pmap.h> is already included.

Reviewed by: alc, kib
Differential Revision: https://reviews.freebsd.org/D5373

NTB: workaround for high traffic hardware hang

This patch comes from Dave Jiang's Linux tree, davejiang/ntb. It hasn't
been accepted into Linus' tree, so I do not have an authoritative SHA1
to point at. Original commit log:

=====================================================================
A hardware errata causes the NTB to hang when heavy bi-directional
traffic in addition to the usage of BAR0/1 (where the registers reside,
including the doorbell registers to trigger interrupts).

This workaround is only available on Haswell and Broadwell platform.
The workaround is to enable split BAR in the BIOS to allow the 64bit
BAR4 to be split into two 32bit BAR4 and BAR5. The BAR4 shall be pointed
to LAPIC region of the remote host. We will bypass the db mechanism and
directly trigger the MSIX interrupts. The offsets and vectors are
exchanged during transport scratch pad negotiation. The scratch pads are
now overloaded in order to allow the exchange of the information. This
gets around using the doorbell and prevents the lockup with additional
pcode changes in BIOS.

Signed-off-by: Dave Jiang <dave.jiang@intel.com>
=====================================================================

Notable changes in the FreeBSD version of this patch:
* The MSIX BAR is configurable, like hw.ntb.b2b_mw_idx (msix_mw_idx).
The Linux version of the patch only uses BAR4.
* MSIX negotiation aborts if the link goes down.

Obtained from: Linux (Dual BSD/GPL driver)
Sponsored by: EMC / Isilon Storage Division

ntb_hw(4): Print correct PAT name for non-WC/WB types mapped at load

Sponsored by: EMC / Isilon Storage Division

ntb_hw(4): Allow any x86 PAT caching flags for MW defaults

Replace the hw.ntb.enable_writecombine tunable with
hw.ntb.default_mw_pat. It can be set with several specific numerical
values to select a caching type. Any bogus value is treated as
Uncacheable (UC).

The ntb_mw_set_wc() KPI has removed the restriction that the selected
mode must be one of UC, WC, or WB.

Sponsored by: EMC / Isilon Storage Division

if_ntb: Don't roundup MW size to full BAR size unnecessarily

Note that the MW allocation still must be BAR *aligned*. So, this only
loosens the constraints on MW allocation slightly. BAR-aligned does not
play well with large (GB+) BAR sizes.

Going forward, if anyone cares about if_ntb on very large BARs, I
suggest they add functionality to allocate a smaller window than the BAR
size, and set the BAR range to cover a window much larger than the
allocated window. This will require negotiating a window offset and
limit for protocol traffic. None of this is implemented in this
revision.

Sponsored by: EMC / Isilon Storage Division

if_ntb: Log error *before* zeroing relevant variables

Sponsored by: EMC / Isilon Storage Division

NTB: WC/WB isn't enough; set MMR region as UC

And expose vm_memattr_t of current mapping to consumers (as well as the
ability to change it to one of UC, WB, WC).

After short discussion with: jhb (but no review)
Sponsored by: EMC / Isilon Storage Division

ntb: Add MW tunable for MMR Xeon errata workaround

Adds a new tunable, ntb.hw.b2b_mw_idx, which specifies the offset (from the
total number of memory windows) to use for register access on hardware with
the SDOORBELL_LOCKUP errata. The default is -1, i.e., the last memory
window.

We map BARs before the b2b_mw_idx is selected, so map them all as memory
windows initially. The register memory window should not be write-combined,
so we explicitly disable WC on the selected MW later.

This introduces a layer of abstraction between consumer memory window
indices, which exclude any exclusive errata-workaround BARs, and internal
memory window indices, which include such BARs. An internal routine,
ntb_user_mw_to_idx(), converts the former to the latter. Public APIs have
been updated to use this instead of assuming the exclusive workaround BAR is
the last available MW.

Sponsored by: EMC / Isilon Storage Division

if_ntb: Initialize if_mtu to the correct MTU

Lower the payload data (IP) portion of the MTU from 0x10000 to
IP_MAXPACKET (0xFFFF) to avoid panicing the IP stack.

Sponsored by: EMC / Isilon Storage Division

if_ntb: Add Xeon link watchdog register writes

This feature is disabled by default. To enable it, tune
hw.if_ntb.enable_xeon_watchdog to non-zero.

If enabled, writes an unused NTB register every second to demonstrate to
a hardware watchdog that the NTB device is still alive. Most machines
with NTB will not need this -- you know who you are.

Sponsored by: EMC / Isilon Storage Division

if_ntb: Reuse receive buffers correctly

Discard the unused rx_free_q. Instead, reuse inputed packets by putting
them back on the *pend* queue after reinitialization.

If tx or rx handlers are unavailable, free mbufs rather than leaking
them.

With this change, if_ntb can receive more than 100
(NTB_QP_DEF_NUM_ENTRIES) packets.

Sponsored by: EMC / Isilon Storage Division

NTB: Expose 32-bit BAR limits to consumers

32-bit BARs can only address memory mapped in the low 32 bits of
physical RAM. Expose this as a 'plimit' out parameter from
ntb_mw_get_range().

Fix if_ntb to allocate memory within this limit.

Sponsored by: EMC / Isilon Storage Division

NTB: Mask off the low 12 bits of address/range registers

Sometimes they'll read spurious values (observed: 0xc on Broadwell-DE),
failing link negotiation.

Discussed with: Dave Jiang, Allen Hubbe
Sponsored by: EMC / Isilon Storage Division

ntb_hw: Add programmatic interface to enable/disable WC

Enable users to enable/disable WC on memory windows programmatically.

Sponsored by: EMC / Isilon Storage Division

ntb_hw: Add tunable to disable write-combining

The tunable 'hw.ntb.enable_writecombine' may be set to zero to
administratively disable write combining the mapped NTB region.

Sponsored by: EMC / Isilon Storage Division

NTB: Fix 32-bit BAR size validation

Sponsored by: EMC / Isilon Storage Division

if_ntb: Diff reduce with Linux

Use bus_space_write instead of (non-volatile) C pointer writes via an
iowrite32() shim in the same places as the Dual BSD/GPL Linux driver.

Update some types to fixed 32-bit sizes.

Sponsored by: EMC / Isilon Storage Division

if_ntb: Clear the right QP in the free bitmap

Now it can ping back and forth.

Sponsored by: EMC / Isilon Storage Division

NTB: MFV 8b782fab: unify translation addresses

There is no need for the upstream and downstream addresses to be
different for the NTB configs. Go to using a single set of address. It
is still possible to configure them differently using module parameter
override however (CEM: tunable).

Authored by: Dave Jiang <dave.jiang@intel.com>
Reviewed by: Allen Hubbe <Allen.Hubbe@emc.com>
Reviewed by: Jon Mason <jdmason@kudzu.us>
Obtained from: Linux (Dual BSD/GPL driver)
Sponsored by: EMC / Isilon Storage Division

if_ntb: MFV c92ba3c5: invalid buf pointer in multi-MW setups

Order of operations issue with the QP Num and MW count, which would
result in the receive buffer pointer being invalid if there are more
than 1 MW. Corrected with parenthesis to enforce the proper order of
operations.

Reported by: John I. Kading <John.Kading@gd-ms.com>
Reported by: Conrad Meyer <cem@FreeBSD.org>
Authored by: Jon Mason <jdmason@kudzu.us>
Obtained from: Linux (Dual BSD/GPL driver)
Sponsored by: EMC / Isilon Storage Division

NTB: Add more HW registers to device sysctl tree

Sponsored by: EMC / Isilon Storage Division

ntb: volatile some members set by interrupt routines

Sponsored by: EMC / Isilon Storage Division

ntb_hw: Similarly, add a debug-leveled macro for ntb_hw

Sponsored by: EMC / Isilon Storage Division

if_ntb: Add module-specific log level

Rather than relying on the quite accurately named 'bootverbose'.

Sponsored by: EMC / Isilon Storage Division

if_ntb: Transport link cleanup needs to be on a taskqueue

Because it can sleep drainking link work callout(s). Linux (dual
BSD/GPL driver) does something very similar.

At the same time, switch the NTB CTX lock to a non-spin mutex, because
the taskqueue_swi lock can't be taken after a spin mutex.

Suggested by: Witness
Sponsored by: EMC / Isilon Storage Division

NTB: Diff reduce with Linux

No functional change.

Sponsored by: EMC / Isilon Storage Division

ntb_hw: Correctly detect DSD/USD

Sponsored by: EMC / Isilon Storage Division

ntb_hw: In INTx fallback, correct db shift from 15 to 16

Sponsored by: EMC / Isilon Storage Division

ntb: Use caddr_t to simplify pointer arithmetic

Sponsored by: EMC / Isilon Storage Division

NTB: Skip db_valid validation writing DB link bit

In ntb_poll_link, we are intentionally writing the link bit, which is
absent from db_valid_mask. Don't panic on a kassert when we do so.

The Linux version of this (dual BSD/GPL) driver has the db_valid_mask
assertions in callers of db_iowrite() rather than db_iowrite() itself;
it skips the assertions in the equivalent of ntb_poll_link(). Rather
than duplicating the assertions in every caller, add a db_iowrite_raw()
that doesn't check and use it from ntb_poll_link().

Suggested by: kassert_panic
Sponsored by: EMC / Isilon Storage Division

ntb: Revert r290130 now that r290156 has landed

Nagged by: vangyzen
Sponsored by: EMC / Isilon Storage Division

ntb: Do not attempt to set write-combining on MWs

AMD64 pmap assumes ranges will be in the DMAP, which isn't necessarily
true for NTB memory windows (especially 64-bit BARs).

Suggested by: pmap_change_attr_locked -> kassert_panic
Sponsored by: EMC / Isilon Storage Division

if_ntb: Use ffsll() now that it is broadly available

Sponsored by: EMC / Isilon Storage Division

NTB: Add device introspection sysctl hierarchy

This should export all of the same information as the Linux ntb_hw_intel
debugfs info file, but with a bit more structure, in the sysctl tree
rooted at 'dev.ntb_hw.<N>.debug_info'.

Raw registers are marked as OPAQUE because reading them on some hardware
revisions may cause a hard lockup (NTB errata). They can be read with
'sysctl -x dev.ntb_hw.<N>.debug_info.registers'. On Xeon platforms,
some additional registers are available under 'registers.xeon_stats' and
'registers.xeon_hw_err'. They are exported as big-endian values so that
the 'sysctl -x' output is legible.

Shrink the feature mask to 32 bits so we can use the %b formatter in
'debug_info.features'.

Sponsored by: EMC / Isilon Storage Division

NTB: Revert r289645

Per Benno, this is a Linuxism we do not need in FreeBSD.

Suggested by: benno
Sponsored by: EMC / Isilon Storage Division

if_ntb: Diff-reduce with Linux; add queue index type

Add ntb_q_idx_t so it is more clear which struct members are of the same
type (some bogus uint64_ts snuck in that should have been unsigned int).

Add tx_err_no_buf and s/ENOMEM/EBUSY/ in tx_enqueue to match Linux.

Sponsored by: EMC / Isilon Storage Division

NTB: MFV 8c9edf63: Fix zero size or integer overflow in ntb_set_mw

A plain 32 bit integer will overflow for values over 4GiB.

Change the plain integer size to the appropriate size type in
ntb_set_mw. Change the type of the size parameter and two local
variables used for size.

Even if there is no overflow, a size of zero is invalid here.

Authored by: Allen Hubbe
Reported by: Juyoung Jung
Obtained from: Linux (Dual BSD/GPL driver)
Sponsored by: EMC / Isilon Storage Division

NTB: MFV da2e5ae5: Fix ntb_transport out-of-order RX update

It was possible for a synchronous update of the RX index in the error
case to get ahead of the asynchronous RX index update in the normal
case. Change the RX processing to preserve an RX completion order.

There were two error cases. First, if a buffer is not present to
receive data, there would be no queue entry to preserve the RX
completion order. Instead of dropping the RX frame, leave the RX frame
in the ring. Schedule RX processing when RX entries are enqueued, in
case there are RX frames waiting in the ring to be received.

Second, if a buffer is too small to receive data, drop the frame in the
ring, mark the RX entry as done, and indicate the error in the RX entry
length. Check for a negative length in the receive callback in
ntb_netdev, and count occurrences as rx_length_errors.

Authored by: Allen Hubbe
Obtained from: Linux (Dual BSD/GPL driver)
Sponsored by: EMC / Isilon Storage Division

if_ntb: Correct over-long lines, use qmin()

Sponsored by: EMC / Isilon Storage Division

if_ntb: Use if_printf instead of device_printf

Sponsored by: EMC / Isilon Storage Division

NTB: MFV 2f887b9a: Rename Intel code names to platform names

Mechanically replace "SOC" with "ATOM" to match Linux. No functional
change. Original Linux commit log follows:

Instead of using the platform code names, use the correct platform names
to identify the respective Intel NTB hardware.

Authored by: Dave Jiang
Obtained from: Linux (Dual BSD/GPL driver)
Sponsored by: EMC / Isilon Storage Division

NTB: Don't abort if setting a MW write-combine fails

Also log BAR mapping results more verbosely.

Sponsored by: EMC / Isilon Storage Division

NTB: Fix typo in bar5 tunables

Typo introduced in r289614.

Pointy-hat: cem
Sponsored by: EMC / Isilon Storage Division

NTB: MFV 7eb38781: Print driver name in module init

Prints driver name to indicate what is being loaded.

Authored by: Dave Jiang
Obtained from: Linux (Dual BSD/GPL driver)
Sponsored by: EMC / Isilon Storage Division

NTB: Clean up safely if attach fails early

Sponsored by: EMC / Isilon Storage Division

NTB: MFV 9891417d: Increase transport MTU to 64k from 16k

Benchmarking showed a significant performance increase with the MTU size
to 64k instead of 16k. Change the driver default to 64k.

Authored by: Dave Jiang
Obtained from: Linux (Dual BSD/GPL driver)
Sponsored by: EMC / Isilon Storage Division

if_ntb: Fix typo in qp_link_work to match Linux

Throw away the result of the peer SPAD read. The peer will write our
local SPAD and we need to keep the locally read SPAD value to check if
the remote side is up.

Sponsored by: EMC / Isilon Storage Division

NTB: MFV 42fefc86: Add parameters for Intel SNB B2B addresses

Add module parameters for the addresses to be used in B2B topology.

Authored by: Allen Hubbe
Obtained from: Linux (Dual BSD/GPL driver)
Sponsored by: EMC / Isilon Storage Division

if_ntb: MFV 2849b5d7: Reset transport QP link stats on down

Reset the link stats when the link goes down. In particular, the TX and
RX index and count must be reset, or else the TX side will be sending
packets to the RX side where the RX side is not expecting them. Reset
all the stats, to be consistent.

Authored by: Allen Hubbe
Obtained from: Linux (Dual BSD/GPL driver)
Sponsored by: EMC / Isilon Storage Division

NTB: Change Atom (BWD/SoC) pci_id name to match others

Sponsored by: EMC / Isilon Storage Division

NTB: MFV 5ae0beb6: Enable link for Intel root port mode in probe

We skip actually bringing up Rootport/Transparent configurations, so
most of this doesn't apply. Original Linux commit log:

Link training should be enabled in the driver probe for root port mode.
We should not have to wait for transport to be loaded for this to
happen. Otherwise the ntb device will not show up on the transparent
bridge side of the link.

Authored by: Dave Jiang
Obtained from: Linux (Dual BSD/GPL driver)
Sponsored by: EMC / Isilon Storage Division

NTB: enum-ify some HW constants

Sponsored by: EMC / Isilon Storage Division

NTB: Pull copy of soc_link_is_err out of recover_soc_link

Sponsored by: EMC / Isilon Storage Division

NTB: Drop some dead softc members

Sponsored by: EMC / Isilon Storage Division

NTB: Replace last reg_ofs with self_reg

Diff reduce with Linux driver. No functional change.

Obtained from: Linux (Dual BSD/GPL driver)
Sponsored by: EMC / Isilon Storage Division

NTB: Add ntb_db_vector_mask() missed in r289546

This is the last one.

Obtained from: Linux (Dual BSD/GPL driver)
Sponsored by: EMC / Isilon Storage Division

NTB: Add ntb_db_valid_mask() missed in r289546

Another trivial one.

Pointy-hat: cem
Obtained from: Linux (Dual BSD/GPL driver)
Sponsored by: EMC / Isilon Storage Division

NTB: Add ntb_mw_clear_trans() missed in r289546

It is just a trivial wrapper around ntb_mw_set_trans().

Authored by: Allen Hubbe
Obtained from: Linux (Dual BSD/GPL driver)
Sponsored by: EMC / Isilon Storage Division

if_ntb: MFV e26a5843: Move MW/DB management to if_ntb

This is the last e26a5843 patch. The general thrust of the rewrite was
to move more responsibility for Memory Window and Doorbell interrupt
management from the ntb_hw driver to if_ntb.

A number of APIs have been added, removed, or replaced. The old
DB callback mechanism has been excised. Instead, callers (if_ntb) are
responsible for configuring MWs and handling their interrupts more
directly.

This adds a tunable, hw.ntb.max_mw_size, allowing users to limit the
size of memory windows used by if_ntb (identical to the Linux modparam
of the same name).

Despite attempts to keep mechanical name changes to separate commits,
some have snuck in here. At least the driver should be much more
similar to the latest Linux one now -- making porting fixes easier.

Authored by: Allen Hubbe
Obtained from: Linux (Dual BSD/GPL driver)
Sponsored by: EMC / Isilon Storage Division

if_ntb: Rename things to match Linux driver

No functional change. Part of the huge rewrite (e26a5843).

Obtained from: Linux (e26a5843) (Dual BSD/GPL driver)
Sponsored by: EMC / Isilon Storage Division

if_ntb: Replace handmade bitset macros with sys/bitset.h

No functional change.

Sponsored by: EMC / Isilon Storage Division

NTB: Flesh out the rest of the xeon_setup_b2b_mw changes

Move all Xeon secondary register setup to the setup_b2b_mw routine. We
use subroutines to make it a bit less wordy than the Linux version.

Adds a new tunable, 'hw.ntb.b2b_mw_share'. By default, it is off
(zero). If both sides enable it (any non-zero value), the NTB driver
attempts to use only half of a memory window for remote register MMIO
access.

This is still part of the large Linux rewrite (e26a5843).

Authored by: Allen Hubbe
Obtained from: Linux (e26a5843) (Dual BSD/GPL driver)
Sponsored by: EMC / Isilon Storage Division

NTB: "Split ntb_hw_intel and ntb_transport drivers"

This Linux commit was more or less a rewrite. Unfortunately, the commit
log does not give a lot of context for the rewrite. I have tried to
faithfully follow the changes made upstream, including matching function
names where possible, while churning the FreeBSD driver as little as
possible.

This is the bulk of the rewrite. There are two groups of changes to
follow in separate commits: fleshing out the rest of the changes to
xeon_setup_b2b_mw(), and some changes to if_ntb.

Yes, this is a big patch (3 files changed, 416 insertions(+), 237
deletions(-)), but the Linux patch was 13 files changed, 2,589
additions(+) and 2,195 deletions(-).

Original Linux commit log:
Change ntb_hw_intel to use the new NTB hardware abstraction layer.

Split ntb_transport into its own driver. Change it to use the new NTB
hardware abstraction layer.

Authored by: Allen Hubbe
Obtained from: Linux (e26a5843) (Dual BSD/GPL driver)
Sponsored by: EMC / Isilon Storage Division

NTB: Simplify ntb_map_pci_bars

Skip using a function pointer for shared error logging.

Sponsored by: EMC / Isilon Storage Division

NTB: Simplify interrupt handling by merging SoC/Xeon

Some interrupt-related function names changed to match Linux.

No functional change. Still part of the huge e26a5843 rewrite in Linux.

Obtained from: Linux (e26a5843) (Dual BSD/GPL driver)
Sponsored by: EMC / Isilon Storage Division

NTB: Rename some variables/functions to match Linux

No functional change.

Still part of the huge e26a5843 rewrite. I'm trying to make it less of
a complete rewrite in the FreeBSD version of the driver. Still, it
helps if our names match Linux.

Obtained from: Linux (e26a5843) (Dual BSD/GPL driver)
Sponsored by: EMC / Isilon Storage Division

NTB: Rename some constants to match Linux

No functional change.

Obtained from: Linux (part of e26a5843) (Dual BSD/GPL driver)
Sponsored by: EMC / Isilon Storage Division

NTB: MFV ab760a0c: Add split BAR support for Haswell

On the Haswell platform, a split BAR option to allow creation of 2 32bit
BARs (4 and 5) from the 64bit BAR 4. Adding support for this new option.

Authored by: Dave Jiang
Obtained from: Linux (Dual BSD/GPL driver)
Sponsored by: EMC / Isilon Storage Division

NTB: Add variable number MW, DB CB support code

This is a follow-up to r289208: "Xeon Errata Workaround."

Add logic to support a variable number of memory windows and doorbell
callbacks. This was added to the Linux driver in the "Xeon Errata
Workaround" commit, but I skipped it because it didn't look neccessary
at the time. It is needed for future Haswell split-BAR support, so
bring it in now.

A new tunable was added for if_ntb, 'hw.ntb.max_num_clients'. By
default, it is set to zero -- infer the number of clients from the
number of memory windows available from the hardware. Any other
positive value can specify a different number of clients, limited by the
number of doorbell callbacks available (4 under MSI-X, or 15 (Xeon) or
34 (SoC) under legacy INTx).

Obtained from: Linux (Dual BSD/GPL driver)
Sponsored by: EMC / Isilon Storage Division

NTB: MFV 1db97f25: Pull out platform detection logic

Pull out read of PPD and platform detection logic to new functions,
ntb_detect_xeon(), ntb_detect_soc(). No functional change -- mostly
this is just shuffling the code to more closely match the Linux driver.
Linux commit log:

To simplify some of the platform detection code. Move the platform
detection to a function to be called earlier.

Authored by: Dave Jiang
Obtained from: Linux (Dual BSD/GPL driver)
Sponsored by: EMC / Isilon Storage Division

NTB: Abstract doorbell register access

The doorbell registers (and associated mask) are 16-bit on Xeon but
64-bit on SoC. Abstract IO access to doorbell registers with
'db_ioread' and 'db_iowrite' (names and idea borrowed from the dual
BSD/GPL Linux driver).

Sponsored by: EMC / Isilon Storage Division

if_ntb: MFV 3cc5ba19: Add alignment check to meet hardware requirement

Original Linux commit log:

The NTB translate register must have the value to be BAR size aligned.
This alignment check make sure that the DMA memory allocated has the
proper alignment. Another requirement for NTB to function properly with
memory window BAR size greater or equal to 4M is to use the CMA feature
in 3.16 kernel with the appropriate CONFIG_CMA_ALIGNMENT and
CONFIG_CMA_SIZE_MBYTES set.

Authored by: Dave Jiang
Obtained from: Linux (Dual BSD/GPL driver)
Sponsored by: EMC / Isilon Storage Division

NTB: MFV a1413cfb: correct the spread of queues over mw's

The detection of an uneven number of queues on the given memory windows
was not correct. The mw_num is zero based and the mod should be
division to spread them evenly over the mw's.

Authored by: Jon Mason
Obtained from: Linux (Dual BSD/GPL driver)
Sponsored by: EMC / Isilon Storage Division

NTB: Remap MSI-X messages over available slots

Remap MSI-X messages over available slots rather than falling back to
legacy INTx when fewer MSI-X slots are available than were requested.

N.B. the Linux driver does *not* do this.

To aid in testing, a tunable 'hw.ntb.force_remap_mode' has been added.
It defaults to off (0). When the tunable is enabled and sufficient
slots were available, the driver restricts the number of slots by one
and remaps the MSI-X messages over the remaining slots.

In case this is actually not okay (as I don't yet have access to this
hardware to test), a tunable 'hw.ntb.prefer_intx_to_remap' has been
added. It defaults to off (0). When the tunable is enabled and fewer
slots are available than requested, fall back to legacy INTx mode rather
than attempting to remap MSI-X messages.

Suggested by: jhb
Reviewed by: jhb (earlier version)
Sponsored by: EMC / Isilon Storage Division

NTB: Reserve link event doorbell callback on Xeon

Consumers that registered on this bit would never see a callback and it
is likely a mistake.

This does not affect if_ntb, which limits itself to a single doorbell
callback.

NTB: MFV 53a788a7: Split ntb_setup_interrupts() into SOC, Xeon, and legacy routines

The names don't line up 100% with Linux. Our routines are named
ntb_setup_interrupts, ntb_setup_xeon_msix, ntb_setup_soc_msix, and
ntb_setup_legacy_interrupt. Linux SNB = FreeBSD Xeon; Linux BWD =
FreeBSD SOC. Original Linux commit log:

This is an cleanup effort to make ntb_setup_msix() more readable - use
ntb_setup_bwd_msix() to init MSI-Xs on BWD hardware and
ntb_setup_snb_msix() - on SNB hardware.

Function ntb_setup_snb_msix() also initializes MSI-Xs the way it should
has been done - looping pci_enable_msix() until success or failure.

Authored by: Alexander Gordeev
Obtained from: Linux (Dual BSD/GPL driver)
Sponsored by: EMC / Isilon Storage Division

if_ntb: Cleanup style

NTB: MFV 403c63cb: client event cleanup

Provide a better event interface between the client and transport.

Authored by: Jon Mason
Obtained from: Linux (Dual BSD/GPL driver)
Sponsored by: EMC / Isilon Storage Division

NTB: MFV e8aeb60c: Disable interrupts and poll under high load

Authored by: Jon Mason
Obtained from: Linux (Dual BSD/GPL driver)
Sponsored by: EMC / Isilon Storage Division

NTB: MFV 78958433: Enable Snoop on Primary Side

Enable Snoop from Primary to Secondary side on BAR23 and BAR45 on all
TLPs. Previously, Snoop was only enabled from Secondary to Primary
side. This can have a performance improvement on some workloads.

Also, make the code more obvious about how the link is being enabled.

Authored by: Jon Mason
Obtained from: Linux (Dual BSD/GPL driver)
Sponsored by: EMC / Isilon Storage Division

NTB: MFV 58b88920: Document HW errata

Add a comment describing the necessary ordering of modifications to the
NTB Limit and Base registers.

Authored by: Jon Mason
Obtained from: Linux (Dual BSD/GPL driver)
Sponsored by: EMC / Isilon Storage Division

NTB: MFV fca4d518: Fix ntb_transport link down race

A WARN_ON is being hit in ntb_qp_link_work due to the NTB transport link
being down while the ntb qp link is still active. This is caused by the
transport link being brought down prior to the qp link worker thread
being terminated. To correct this, shutdown the qp's prior to bringing
the transport link down. Also, only call the qp worker thread if it is
in interrupt context, otherwise call the function directly.

Authored by: Jon Mason
Obtained from: Linux (Dual BSD/GPL driver)
Sponsored by: EMC / Isilon Storage Division

NTB: MFV 9fec60c4: Fix NTB-RP Link Up

The Xeon NTB-RP setup, the transparent side does not get a link up/down
interrupt. Since the presence of a NTB device on the transparent side
means that we have a NTB link up, we can work around the lack of an
interrupt by simply calling the link up function to notify the upper
layers.

Authored by: Jon Mason
Obtained from: Linux (Dual BSD/GPL driver)
Sponsored by: EMC / Isilon Storage Division

NTB: MFV c529aa30: Xeon Doorbell errata workaround

Modifications to the 14th bit of the B2BDOORBELL register will not be
mirrored to the remote system due to a hardware issue. To get around
the issue, shrink the number of available doorbell bits by 1. The max
number of doorbells was being used as a way to referencing the Link
Doorbell bit. Since this would no longer work, the driver must now
explicitly reference that bit.

This does not affect the xeon_errata_workaround case, as it is not using
the b2bdoorbell register.

Authored by: Jon Mason
Obtained from: Linux (Dual BSD/GPL driver)
Sponsored by: EMC / Isilon Storage Division

NTB: MFV f9a2cf89: Comment Fix

Add "data" ntb_register_db_callback parameter description comment and
correct poor speling.

Authored by: Jon Mason
Obtained from: Linux (Dual BSD/GPL driver)
Sponsored by: EMC / Isilon Storage Division

NTB: MFV b1ef0043: Remove References of non-B2B BWD HW

NTB-RP is not a supported configuration on BWD hardware. Remove the
code attempting to set it up.

Authored by: Jon Mason
Obtained from: Linux (dual BSD/GPL driver)
Sponsored by: EMC / Isilon Storage Division

if_ntb: Fix build on i386

Sponsored by: EMC / Isilon Storage Division

NTB: (partial) MFV ed6c24ed: NTB-RP support

This commit does not actually add NTB-RP support. Mostly it serves to
shuffle code around to match the Linux driver. Original Linux commit
log follows:

Add support for Non-Transparent Bridge connected to a PCI-E Root Port on
the remote system (also known as NTB-RP mode). This allows for a NTB
enabled system to be connected to a non-NTB enabled system/slot.

Modifications to the registers and BARs/MWs on the Secondary side by the
remote system are reflected into registers on the Primary side for the
local system. Similarly, modifications of registers and BARs/MWs on
Primary side by the local system are reflected into registers on the
Secondary side for the Remote System. This allows communication between
the 2 sides via these registers and BARs/MWs.

Note: there is not a fix for the Xeon Errata (that was already worked
around in NTB-B2B mode) for NTB-RP mode. Due to this limitation, NTB-RP
will not work on the Secondary side with the Xeon Errata workaround
enabled. To get around this, disable the workaround via the
xeon_errata_workaround=0 modparm. However, this can cause the hang
described in the errata.

Authored by: Jon Mason
Obtained from: Linux
Sponsored by: EMC / Isilon Storage Division

NTB: MFV 49793889: Rename Variables for NTB-RP

Many variable names in the NTB driver refer to the primary or secondary
side. However, these variables will be used to access the reverse case
when in NTB-RP mode. Make these names more generic in anticipation of
NTB-RP support.

Authored by: Jon Mason
Obtained from: Linux
Sponsored by: EMC / Isilon Storage Division

NTB: Enable 32-bit support

Sponsored by: EMC / Isilon Storage Division

NTB: Update pci ids

Add JSF, HSX, BDX ids; add two additional Xeon errata flags while we're
here.

Obtained from: Linux
Sponsored by: EMC / Isilon Storage Division

NTB: MFV 113bf1c9: BWD Link Recovery

The BWD NTB device will drop the link if an error is encountered on the
point-to-point PCI bridge. The link will stay down until all errors are
cleared and the link is re-established. On link down, check to see if
the error is detected, if so do the necessary housekeeping to try and
recover from the error and reestablish the link.

There is a potential race between the 2 NTB devices recovering at the
same time. If the times are synchronized, the link will not recover and
the driver will be stuck in this loop forever. Add a random interval to
the recovery time to prevent this race.

Authored by: Jon Mason
Obtained from: Linux
Sponsored by: EMC / Isilon Storage Division

NTB: Style(9) cleanups

NTB: MFV 948d3a65: Xeon Errata Workaround

There is a Xeon hardware errata related to writes to SDOORBELL or B2BDOORBELL
in conjunction with inbound access to NTB MMIO Space, which may hang the
system. To workaround this issue, use one of the memory windows to access the
interrupt and scratch pad registers on the remote system. This bypasses the
issue, but removes one of the memory windows from use by the transport. This
reduction of MWs necessitates adding some logic to determine the number of
available MWs.

Since some NTB usage methodologies may have unidirectional traffic, the ability
to disable the workaround via modparm has been added.

See BF113 in
http://www.intel.com/content/dam/www/public/us/en/documents/specification-updates/xeon-c5500-c3500-spec-update.pdf
See BT119 in
http://www.intel.com/content/dam/www/public/us/en/documents/specification-updates/xeon-e5-family-spec-update.pdf

Authored by: Jon Mason
Obtained from: Linux
Sponsored by: EMC / Isilon Storage Division

NTB: Add hw.ntb sysctl node

NTB: MFV b6750cfe: Correct USD/DSD Identification

Due to ambiguous documentation, the USD/DSD identification is backward
when compared to the setting in BIOS. Correct the bits to match the
BIOS setting.

Authored by: Jon Mason
Obtained from: Linux
Sponsored by: EMC / Isilon Storage Division

NTB: MFV 87034511: Correct Number of Scratch Pad Registers

The NTB Xeon hardware has 16 scratch pad registers and 16 back-to-back
scratch pad registers. Correct the #define to represent this and update
the variable names to reflect their usage.

Authored by: Jon Mason
Obtained from: Linux
Sponsored by: EMC / Isilon Storage Division

NTB: MFV c336acd3: memcpy lockup workaround

The system will appear to lockup for long periods of time due to the NTB
driver spending too much time in memcpy. Avoid this by reducing the
number of packets that can be serviced on a given interrupt.

Authored by: Jon Mason
Obtained from: Linux
Sponsored by: EMC / Isilon Storage Division

NTB: MFV c9d534c8: Correctly handle receive buffers of the minimal size

The ring logic of the NTB receive buffer/transmit memory window requires
there to be at least 2 payload sized allotments. For the minimal size
case, split the buffer into two and set the transport_mtu to the
appropriate size.

Authored by: Jon Mason
Obtained from: Linux
Sponsored by: EMC / Isilon Storage Division

NTB: MFV 90f9e934: reset tx_index on link toggle

If the NTB link toggles, the driver could stop receiving due to the
tx_index not being set to 0 on the transmitting size on a link-up event.
This is due to the driver expecting the incoming data to start at the
beginning of the receive buffer and not at a random place.

Authored by: Jon Mason
Obtained from: Linux
Sponsored by: EMC / Isilon Storage Division

NTB: MFV b77b2637: Link toggle memory leak

Each link-up will allocate a new NTB receive buffer when the NTB
properties are negotiated with the remote system. These allocations did
not check for existing buffers and thus did not free them. Now, the
driver will check for an existing buffer and free it if not of the
correct size, before trying to alloc a new one.

Authored by: Jon Mason
Obtained from: Linux
Sponsored by: EMC / Isilon Storage Division

NTB: MFV 113fc505: Handle 64bit BAR sizes

64bit BAR sizes are permissible with an NTB device. To support them
various modifications and clean-ups were required, most significantly
using 2 32bit scratch pad registers for each BAR.

Also, modify the driver to allow more than 2 Memory Windows.

Authored by: Jon Mason
Obtained from: Linux
Sponsored by: EMC / Isilon Storage Division

NTB: MFV cc0f868d: fix pointer math issues

->remote_rx_info and ->rx_info are struct ntb_rx_info pointers. If we
add sizeof(struct ntb_rx_info) then it goes too far.

Authored by: Dan Carpenter
Obtained from: Linux
Sponsored by: EMC / Isilon Storage Division

CALLOUT_MPSAFE has lost its meaning since r141428, i.e., for more than ten
years for head. However, it is continuously misused as the mpsafe argument
for callout_init(9). Deprecate the flag and clean up callout_init() calls
to make them more consistent.

Differential Revision: https://reviews.freebsd.org/D2613
Reviewed by: jhb
MFC after: 2 weeks

Remove contractions.

Approved by: jimharris
Sponsored by: Intel

Only tear down interface and transport if they've been successfully setup.

Approved by: jimharris
Sponsored by: Intel

Workaround an issue with hardware by accessing remote device through mem
window.

Approved by: jimharris
Sponsored by: Intel

Simplify register access macros by removing one level of indirection.

Approved by: jimharris
Sponsored by: Intel

Cleaning up spacing and making hex value case consistent.

Approved by: jimharris
Sponsored by: Intel

Implement workaround for IvyTown 4K BAR size issue.

Approved by: jimharris
Sponsored by: Intel

Simplifying bus alloc resource call since we only need the default values.

Approved by: jimharris
Sponsored by: Intel

Add support for per device features and workarounds.

Approved by: jimharris
Sponsored by: Intel

Restructure the PCI bar initialization code in anticipation of upcoming
bug fixes.

Approved by: jimharris
Sponsored by: Intel

Fix name change from ntb_transport to if_ntb. A few places were
overlooked.

Approved by: jimharris
Sponsored by: Intel

Throw a bit to enable the link to come up on Xeon.

Approved by: jimharris
Sponsored by: Intel

Add some logging to ntb link up.

Approved by: jimharris
Sponsored by: Intel

Add a new driver to support the Intel Non-Transparent Bridge(NTB).

The NTB allows you to connect two systems with this device using a PCI-e
link. The driver is made of two modules:
- ntb_hw which is a basic hardware abstraction layer for the device.
- if_ntb which implements the ntb network device and the communication
protocol.

The driver is limited at the moment to CPU memcpy instead of using DMA, and
only Back-to-Back mode is supported. Also the network device isn't full
featured yet. These changes will be coming soon. The DMA change will also
bring in the ioat driver from the project branch it is on now.

This is an initial port of the GPL/BSD Linux driver contributed by Jon Mason
from Intel. Any bugs are my contributions.

Sponsored by: Intel
Reviewed by: jimharris, joel (man page only)
Approved by: jimharris (mentor)