259065 |
07-Dec-2013 |
gjb |
- Copy stable/10 (r259064) to releng/10.0 as part of the 10.0-RELEASE cycle. - Update __FreeBSD_version [1] - Set branch name to -RC1
[1] 10.0-CURRENT __FreeBSD_version value ended at '55', so start releng/10.0 at '100' so the branch is started with a value ending in zero.
Approved by: re (implicit) Sponsored by: The FreeBSD Foundation |
256281 |
10-Oct-2013 |
gjb |
Copy head (r256279) to stable/10 as part of the 10.0-RELEASE cycle.
Approved by: re (implicit) Sponsored by: The FreeBSD Foundation
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172689 |
16-Oct-2007 |
marcel |
Fix disassembly of the invala, itc, itr and hint instructions by fixing the opcode ordering.
MFC after: 1 week
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159916 |
24-Jun-2006 |
marcel |
Update to SDM 2.2: o Add tf (test feature) instruction, o Add vmsw (VM switch) instruction.
While here, update copyright.
MFC after: 1 week
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159909 |
24-Jun-2006 |
marcel |
Sync up with SDM 2.1: o Add nop/hint formats F16, I18, M48 and X5, o Add format M47 for ptc.e, o Add hint instruction, o Fix decoding of cmp8xchg16.
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139790 |
06-Jan-2005 |
imp |
/* -> /*- for copyright notices, minor format tweaks as necessary
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133875 |
16-Aug-2004 |
arun |
ITC.{i,d} instructions use format M41 not M42.
reviewed by: marcel@
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121448 |
24-Oct-2003 |
marcel |
Remove two unused fields in the operand structure (o_read & o_write).
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121404 |
23-Oct-2003 |
marcel |
Add a new disassembler that improves over the previous disassembler in that it provides an abstract (intermediate) representation for instructions. This significantly improves working with instructions such as emulation of instructions that are not implemented by the hardware (e.g. long branch) or enhancing implemented instructions (e.g. handling of misaligned memory accesses). Not to mention that it's much easier to print instructions.
Functions are included that provide a textual representation for opcodes, completers and operands.
The disassembler supports all ia64 instructions defined by revision 2.1 of the SDM (Oct 2002).
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