macroAssembler_aarch64.hpp (8304:6e2422a230fd) macroAssembler_aarch64.hpp (8462:5b8b5731ca2d)
1/*
2 * Copyright (c) 1997, 2012, Oracle and/or its affiliates. All rights reserved.
3 * Copyright (c) 2014, 2015, Red Hat Inc. All rights reserved.
4 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
5 *
6 * This code is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 only, as
8 * published by the Free Software Foundation.

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32//
33// Instructions for which a 'better' code sequence exists depending
34// on arguments should also go in here.
35
36class MacroAssembler: public Assembler {
37 friend class LIR_Assembler;
38
39 using Assembler::mov;
1/*
2 * Copyright (c) 1997, 2012, Oracle and/or its affiliates. All rights reserved.
3 * Copyright (c) 2014, 2015, Red Hat Inc. All rights reserved.
4 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
5 *
6 * This code is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 only, as
8 * published by the Free Software Foundation.

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32//
33// Instructions for which a 'better' code sequence exists depending
34// on arguments should also go in here.
35
36class MacroAssembler: public Assembler {
37 friend class LIR_Assembler;
38
39 using Assembler::mov;
40 using Assembler::movi;
40
41 protected:
42
43 // Support for VM calls
44 //
45 // This is the base routine called by the different versions of call_VM_leaf. The interpreter
46 // may customize this version by overriding it for its purposes (e.g., to save/restore
47 // additional registers when doing a VM call).

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459
460 inline void mov(Register dst, int i)
461 {
462 mov(dst, (long)i);
463 }
464
465 void movptr(Register r, uintptr_t imm64);
466
41
42 protected:
43
44 // Support for VM calls
45 //
46 // This is the base routine called by the different versions of call_VM_leaf. The interpreter
47 // may customize this version by overriding it for its purposes (e.g., to save/restore
48 // additional registers when doing a VM call).

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460
461 inline void mov(Register dst, int i)
462 {
463 mov(dst, (long)i);
464 }
465
466 void movptr(Register r, uintptr_t imm64);
467
468 // Macro to mov replicated immediate to vector register.
469 // Where imm32 == hex abcdefgh, Vd will get the following values
470 // for different arrangements in T
471 // T8B: Vd = ghghghghghghghgh
472 // T16B: Vd = ghghghghghghghghghghghghghghghgh
473 // T4H: Vd = efghefghefghefgh
474 // T8H: Vd = efghefghefghefghefghefghefghefgh
475 // T2S: Vd = abcdefghabcdefgh
476 // T4S: Vd = abcdefghabcdefghabcdefghabcdefgh
477 // T1D/T2D: invalid
478 void mov(FloatRegister Vd, SIMD_Arrangement T, u_int32_t imm32) {
479 assert(T != T1D && T != T2D, "invalid arrangement");
480 u_int32_t nimm32 = ~imm32;
481 if (T == T8B || T == T16B) { imm32 &= 0xff; nimm32 &= 0xff; }
482 if (T == T4H || T == T8H) { imm32 &= 0xffff; nimm32 &= 0xffff; }
483 u_int32_t x = imm32;
484 int movi_cnt = 0;
485 int movn_cnt = 0;
486 while (x) { if (x & 0xff) movi_cnt++; x >>= 8; }
487 x = nimm32;
488 while (x) { if (x & 0xff) movn_cnt++; x >>= 8; }
489 if (movn_cnt < movi_cnt) imm32 = nimm32;
490 unsigned lsl = 0;
491 while (imm32 && (imm32 & 0xff) == 0) { lsl += 8; imm32 >>= 8; }
492 if (movn_cnt < movi_cnt)
493 mvni(Vd, T, imm32 & 0xff, lsl);
494 else
495 movi(Vd, T, imm32 & 0xff, lsl);
496 imm32 >>= 8; lsl += 8;
497 while (imm32) {
498 while ((imm32 & 0xff) == 0) { lsl += 8; imm32 >>= 8; }
499 if (movn_cnt < movi_cnt)
500 bici(Vd, T, imm32 & 0xff, lsl);
501 else
502 orri(Vd, T, imm32 & 0xff, lsl);
503 lsl += 8; imm32 >>= 8;
504 }
505 }
506
467 // macro instructions for accessing and updating floating point
468 // status register
469 //
470 // FPSR : op1 == 011
471 // CRn == 0100
472 // CRm == 0100
473 // op2 == 001
474

--- 717 unchanged lines hidden --- 		507 // macro instructions for accessing and updating floating point
508 // status register
509 //
510 // FPSR : op1 == 011
511 // CRn == 0100
512 // CRm == 0100
513 // op2 == 001
514

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