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cs4280.c (1.39) cs4280.c (1.40)
1/* $NetBSD: cs4280.c,v 1.39 2006/06/17 23:34:26 christos Exp $ */
1/* $NetBSD: cs4280.c,v 1.40 2006/08/06 16:21:11 jmcneill Exp $ */
2
3/*
4 * Copyright (c) 1999, 2000 Tatoku Ogaito. All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright

--- 37 unchanged lines hidden (view full) ---

47 */
48
49/*
50 * TODO
51 * Joystick support
52 */
53
54#include <sys/cdefs.h>
2
3/*
4 * Copyright (c) 1999, 2000 Tatoku Ogaito. All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright

--- 37 unchanged lines hidden (view full) ---

47 */
48
49/*
50 * TODO
51 * Joystick support
52 */
53
54#include <sys/cdefs.h>
55__KERNEL_RCSID(0, "$NetBSD: cs4280.c,v 1.39 2006/06/17 23:34:26 christos Exp $");
55__KERNEL_RCSID(0, "$NetBSD: cs4280.c,v 1.40 2006/08/06 16:21:11 jmcneill Exp $");
56
57#include "midi.h"
58
59#include <sys/param.h>
60#include <sys/systm.h>
61#include <sys/kernel.h>
62#include <sys/fcntl.h>
63#include <sys/malloc.h>

--- 34 unchanged lines hidden (view full) ---

98 stream_filter_list_t *);
99static int cs4280_halt_output(void *);
100static int cs4280_halt_input(void *);
101static int cs4280_getdev(void *, struct audio_device *);
102static int cs4280_trigger_output(void *, void *, void *, int, void (*)(void *),
103 void *, const audio_params_t *);
104static int cs4280_trigger_input(void *, void *, void *, int, void (*)(void *),
105 void *, const audio_params_t *);
56
57#include "midi.h"
58
59#include <sys/param.h>
60#include <sys/systm.h>
61#include <sys/kernel.h>
62#include <sys/fcntl.h>
63#include <sys/malloc.h>

--- 34 unchanged lines hidden (view full) ---

98 stream_filter_list_t *);
99static int cs4280_halt_output(void *);
100static int cs4280_halt_input(void *);
101static int cs4280_getdev(void *, struct audio_device *);
102static int cs4280_trigger_output(void *, void *, void *, int, void (*)(void *),
103 void *, const audio_params_t *);
104static int cs4280_trigger_input(void *, void *, void *, int, void (*)(void *),
105 void *, const audio_params_t *);
106static int cs4280_read_codec(void *, u_int8_t, u_int16_t *);
107static int cs4280_write_codec(void *, u_int8_t, u_int16_t);
106#if 0
107static int cs4280_reset_codec(void *);
108#endif
109static enum ac97_host_flags cs4280_flags_codec(void *);
110
111/* For PowerHook */
112static void cs4280_power(int, void *);
113
114/* Internal functions */
115static const struct cs4280_card_t * cs4280_identify_card(struct pci_attach_args *);
108#if 0
109static int cs4280_reset_codec(void *);
110#endif
111static enum ac97_host_flags cs4280_flags_codec(void *);
112
113/* For PowerHook */
114static void cs4280_power(int, void *);
115
116/* Internal functions */
117static const struct cs4280_card_t * cs4280_identify_card(struct pci_attach_args *);
118static int cs4280_piix4_match(struct pci_attach_args *);
119static void cs4280_clkrun_hack(struct cs428x_softc *, int);
120static void cs4280_clkrun_hack_init(struct cs428x_softc *);
116static void cs4280_set_adc_rate(struct cs428x_softc *, int );
117static void cs4280_set_dac_rate(struct cs428x_softc *, int );
118static int cs4280_download(struct cs428x_softc *, const uint32_t *, uint32_t,
119 uint32_t);
120static int cs4280_download_image(struct cs428x_softc *);
121static void cs4280_reset(void *);
122static int cs4280_init(struct cs428x_softc *, int);
123static void cs4280_clear_fifos(struct cs428x_softc *);

--- 16 unchanged lines hidden (view full) ---

140 {PCI_ID_CODE(vend, prod), flags}
141
142static const struct cs4280_card_t cs4280_cards[] = {
143#if 0 /* untested, from ALSA driver */
144 _card(PCI_VENDOR_MITAC, PCI_PRODUCT_MITAC_MI6020,
145 CS428X_FLAG_INVAC97EAMP),
146#endif
147 _card(PCI_VENDOR_TURTLE_BEACH, PCI_PRODUCT_TURTLE_BEACH_SANTA_CRUZ,
121static void cs4280_set_adc_rate(struct cs428x_softc *, int );
122static void cs4280_set_dac_rate(struct cs428x_softc *, int );
123static int cs4280_download(struct cs428x_softc *, const uint32_t *, uint32_t,
124 uint32_t);
125static int cs4280_download_image(struct cs428x_softc *);
126static void cs4280_reset(void *);
127static int cs4280_init(struct cs428x_softc *, int);
128static void cs4280_clear_fifos(struct cs428x_softc *);

--- 16 unchanged lines hidden (view full) ---

145 {PCI_ID_CODE(vend, prod), flags}
146
147static const struct cs4280_card_t cs4280_cards[] = {
148#if 0 /* untested, from ALSA driver */
149 _card(PCI_VENDOR_MITAC, PCI_PRODUCT_MITAC_MI6020,
150 CS428X_FLAG_INVAC97EAMP),
151#endif
152 _card(PCI_VENDOR_TURTLE_BEACH, PCI_PRODUCT_TURTLE_BEACH_SANTA_CRUZ,
148 CS428X_FLAG_INVAC97EAMP)
153 CS428X_FLAG_INVAC97EAMP),
154 _card(PCI_VENDOR_IBM, PCI_PRODUCT_IBM_TPAUDIO,
155 CS428X_FLAG_CLKRUNHACK)
149};
150
151#undef _card
152
153#define CS4280_CARDS_SIZE (sizeof(cs4280_cards)/sizeof(cs4280_cards[0]))
154
155static const struct audio_hw_if cs4280_hw_if = {
156 NULL, /* open */

--- 134 unchanged lines hidden (view full) ---

291 /* LATENCY_TIMER setting */
292 mem = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_BHLC_REG);
293 if ( PCI_LATTIMER(mem) < 32 ) {
294 mem &= 0xffff00ff;
295 mem |= 0x00002000;
296 pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_BHLC_REG, mem);
297 }
298
156};
157
158#undef _card
159
160#define CS4280_CARDS_SIZE (sizeof(cs4280_cards)/sizeof(cs4280_cards[0]))
161
162static const struct audio_hw_if cs4280_hw_if = {
163 NULL, /* open */

--- 134 unchanged lines hidden (view full) ---

298 /* LATENCY_TIMER setting */
299 mem = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_BHLC_REG);
300 if ( PCI_LATTIMER(mem) < 32 ) {
301 mem &= 0xffff00ff;
302 mem |= 0x00002000;
303 pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_BHLC_REG, mem);
304 }
305
306 /* CLKRUN hack initialization */
307 cs4280_clkrun_hack_init(sc);
308
299 /* Map and establish the interrupt. */
300 if (pci_intr_map(pa, &ih)) {
301 aprint_error("%s: couldn't map interrupt\n",
302 sc->sc_dev.dv_xname);
303 return;
304 }
305 intrstr = pci_intr_string(pc, ih);
306

--- 19 unchanged lines hidden (view full) ---

326 /* setup buffer related parameters */
327 sc->dma_size = CS4280_DCHUNK;
328 sc->dma_align = CS4280_DALIGN;
329 sc->hw_blocksize = CS4280_ICHUNK;
330
331 /* AC 97 attachment */
332 sc->host_if.arg = sc;
333 sc->host_if.attach = cs428x_attach_codec;
309 /* Map and establish the interrupt. */
310 if (pci_intr_map(pa, &ih)) {
311 aprint_error("%s: couldn't map interrupt\n",
312 sc->sc_dev.dv_xname);
313 return;
314 }
315 intrstr = pci_intr_string(pc, ih);
316

--- 19 unchanged lines hidden (view full) ---

336 /* setup buffer related parameters */
337 sc->dma_size = CS4280_DCHUNK;
338 sc->dma_align = CS4280_DALIGN;
339 sc->hw_blocksize = CS4280_ICHUNK;
340
341 /* AC 97 attachment */
342 sc->host_if.arg = sc;
343 sc->host_if.attach = cs428x_attach_codec;
334 sc->host_if.read = cs428x_read_codec;
335 sc->host_if.write = cs428x_write_codec;
344 sc->host_if.read = cs4280_read_codec;
345 sc->host_if.write = cs4280_write_codec;
336#if 0
337 sc->host_if.reset = cs4280_reset_codec;
338#else
339 sc->host_if.reset = NULL;
340#endif
341 sc->host_if.flags = cs4280_flags_codec;
342 if (ac97_attach(&sc->host_if, self) != 0) {
343 aprint_error("%s: ac97_attach failed\n", sc->sc_dev.dv_xname);

--- 357 unchanged lines hidden (view full) ---

701{
702 struct cs428x_softc *sc;
703 uint32_t mem;
704
705 sc = addr;
706 mem = BA1READ4(sc, CS4280_PCTL);
707 BA1WRITE4(sc, CS4280_PCTL, mem & ~PCTL_MASK);
708 sc->sc_prun = 0;
346#if 0
347 sc->host_if.reset = cs4280_reset_codec;
348#else
349 sc->host_if.reset = NULL;
350#endif
351 sc->host_if.flags = cs4280_flags_codec;
352 if (ac97_attach(&sc->host_if, self) != 0) {
353 aprint_error("%s: ac97_attach failed\n", sc->sc_dev.dv_xname);

--- 357 unchanged lines hidden (view full) ---

711{
712 struct cs428x_softc *sc;
713 uint32_t mem;
714
715 sc = addr;
716 mem = BA1READ4(sc, CS4280_PCTL);
717 BA1WRITE4(sc, CS4280_PCTL, mem & ~PCTL_MASK);
718 sc->sc_prun = 0;
719 cs4280_clkrun_hack(sc, -1);
720
709 return 0;
710}
711
712static int
713cs4280_halt_input(void *addr)
714{
715 struct cs428x_softc *sc;
716 uint32_t mem;
717
718 sc = addr;
719 mem = BA1READ4(sc, CS4280_CCTL);
720 BA1WRITE4(sc, CS4280_CCTL, mem & ~CCTL_MASK);
721 sc->sc_rrun = 0;
721 return 0;
722}
723
724static int
725cs4280_halt_input(void *addr)
726{
727 struct cs428x_softc *sc;
728 uint32_t mem;
729
730 sc = addr;
731 mem = BA1READ4(sc, CS4280_CCTL);
732 BA1WRITE4(sc, CS4280_CCTL, mem & ~CCTL_MASK);
733 sc->sc_rrun = 0;
734 cs4280_clkrun_hack(sc, -1);
735
722 return 0;
723}
724
725static int
726cs4280_getdev(void *addr, struct audio_device *retp)
727{
728
729 *retp = cs4280_device;

--- 10 unchanged lines hidden (view full) ---

740 struct cs428x_dma *p;
741
742 sc = addr;
743#ifdef DIAGNOSTIC
744 if (sc->sc_prun)
745 printf("cs4280_trigger_output: already running\n");
746#endif
747 sc->sc_prun = 1;
736 return 0;
737}
738
739static int
740cs4280_getdev(void *addr, struct audio_device *retp)
741{
742
743 *retp = cs4280_device;

--- 10 unchanged lines hidden (view full) ---

754 struct cs428x_dma *p;
755
756 sc = addr;
757#ifdef DIAGNOSTIC
758 if (sc->sc_prun)
759 printf("cs4280_trigger_output: already running\n");
760#endif
761 sc->sc_prun = 1;
762 cs4280_clkrun_hack(sc, 1);
748
749 DPRINTF(("cs4280_trigger_output: sc=%p start=%p end=%p "
750 "blksize=%d intr=%p(%p)\n", addr, start, end, blksize, intr, arg));
751 sc->sc_pintr = intr;
752 sc->sc_parg = arg;
753
754 /* stop playback DMA */
755 BA1WRITE4(sc, CS4280_PCTL, BA1READ4(sc, CS4280_PCTL) & ~PCTL_MASK);

--- 73 unchanged lines hidden (view full) ---

829 struct cs428x_dma *p;
830
831 sc = addr;
832#ifdef DIAGNOSTIC
833 if (sc->sc_rrun)
834 printf("cs4280_trigger_input: already running\n");
835#endif
836 sc->sc_rrun = 1;
763
764 DPRINTF(("cs4280_trigger_output: sc=%p start=%p end=%p "
765 "blksize=%d intr=%p(%p)\n", addr, start, end, blksize, intr, arg));
766 sc->sc_pintr = intr;
767 sc->sc_parg = arg;
768
769 /* stop playback DMA */
770 BA1WRITE4(sc, CS4280_PCTL, BA1READ4(sc, CS4280_PCTL) & ~PCTL_MASK);

--- 73 unchanged lines hidden (view full) ---

844 struct cs428x_dma *p;
845
846 sc = addr;
847#ifdef DIAGNOSTIC
848 if (sc->sc_rrun)
849 printf("cs4280_trigger_input: already running\n");
850#endif
851 sc->sc_rrun = 1;
852 cs4280_clkrun_hack(sc, 1);
837
838 DPRINTF(("cs4280_trigger_input: sc=%p start=%p end=%p "
839 "blksize=%d intr=%p(%p)\n", addr, start, end, blksize, intr, arg));
840 sc->sc_rintr = intr;
841 sc->sc_rarg = arg;
842
843 /* stop capture DMA */
844 BA1WRITE4(sc, CS4280_CCTL, BA1READ4(sc, CS4280_CCTL) & ~CCTL_MASK);

--- 119 unchanged lines hidden (view full) ---

964 break;
965 case PWR_SOFTSUSPEND:
966 case PWR_SOFTSTANDBY:
967 case PWR_SOFTRESUME:
968 break;
969 }
970}
971
853
854 DPRINTF(("cs4280_trigger_input: sc=%p start=%p end=%p "
855 "blksize=%d intr=%p(%p)\n", addr, start, end, blksize, intr, arg));
856 sc->sc_rintr = intr;
857 sc->sc_rarg = arg;
858
859 /* stop capture DMA */
860 BA1WRITE4(sc, CS4280_CCTL, BA1READ4(sc, CS4280_CCTL) & ~CCTL_MASK);

--- 119 unchanged lines hidden (view full) ---

980 break;
981 case PWR_SOFTSUSPEND:
982 case PWR_SOFTSTANDBY:
983 case PWR_SOFTRESUME:
984 break;
985 }
986}
987
988static int
989cs4280_read_codec(void *addr, u_int8_t reg, u_int16_t *result)
990{
991 struct cs428x_softc *sc = addr;
992 int rv;
993
994 cs4280_clkrun_hack(sc, 1);
995 rv = cs428x_read_codec(addr, reg, result);
996 cs4280_clkrun_hack(sc, -1);
997
998 return rv;
999}
1000
1001static int
1002cs4280_write_codec(void *addr, u_int8_t reg, u_int16_t data)
1003{
1004 struct cs428x_softc *sc = addr;
1005 int rv;
1006
1007 cs4280_clkrun_hack(sc, 1);
1008 rv = cs428x_write_codec(addr, reg, data);
1009 cs4280_clkrun_hack(sc, -1);
1010
1011 return rv;
1012}
1013
972#if 0 /* XXX buggy and not required */
973/* control AC97 codec */
974static int
975cs4280_reset_codec(void *addr)
976{
977 struct cs428x_softc *sc;
978 int n;
979

--- 53 unchanged lines hidden (view full) ---

1033 for (i = 0; i < CS4280_CARDS_SIZE; i++) {
1034 if (idreg == cs4280_cards[i].id)
1035 return &cs4280_cards[i];
1036 }
1037
1038 return NULL;
1039}
1040
1014#if 0 /* XXX buggy and not required */
1015/* control AC97 codec */
1016static int
1017cs4280_reset_codec(void *addr)
1018{
1019 struct cs428x_softc *sc;
1020 int n;
1021

--- 53 unchanged lines hidden (view full) ---

1075 for (i = 0; i < CS4280_CARDS_SIZE; i++) {
1076 if (idreg == cs4280_cards[i].id)
1077 return &cs4280_cards[i];
1078 }
1079
1080 return NULL;
1081}
1082
1083static int
1084cs4280_piix4_match(struct pci_attach_args *pa)
1085{
1086 if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_INTEL &&
1087 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_INTEL_82371AB_PMC) {
1088 return 1;
1089 }
1090
1091 return 0;
1092}
1093
1041static void
1094static void
1095cs4280_clkrun_hack(struct cs428x_softc *sc, int change)
1096{
1097 uint16_t control, val;
1098
1099 if (!(sc->sc_flags & CS428X_FLAG_CLKRUNHACK))
1100 return;
1101
1102 sc->sc_active += change;
1103 val = control = bus_space_read_2(sc->sc_pm_iot, sc->sc_pm_ioh, 0x10);
1104 if (!sc->sc_active)
1105 val |= 0x2000;
1106 else
1107 val &= ~0x2000;
1108 if (val != control)
1109 bus_space_write_2(sc->sc_pm_iot, sc->sc_pm_ioh, 0x10, val);
1110}
1111
1112static void
1113cs4280_clkrun_hack_init(struct cs428x_softc *sc)
1114{
1115 struct pci_attach_args smbuspa;
1116 uint16_t reg;
1117 pcireg_t port;
1118
1119 if (!(sc->sc_flags & CS428X_FLAG_CLKRUNHACK))
1120 return;
1121
1122 if (pci_find_device(&smbuspa, cs4280_piix4_match)) {
1123 sc->sc_active = 0;
1124 printf("%s: enabling CLKRUN hack\n",
1125 sc->sc_dev.dv_xname);
1126
1127 reg = pci_conf_read(smbuspa.pa_pc, smbuspa.pa_tag, 0x40);
1128 port = reg & 0xffc0;
1129 printf("%s: power management port 0x%x\n", sc->sc_dev.dv_xname,
1130 port);
1131
1132 sc->sc_pm_iot = smbuspa.pa_iot;
1133 if (bus_space_map(sc->sc_pm_iot, port, 0x20 /* XXX */, 0,
1134 &sc->sc_pm_ioh) == 0)
1135 return;
1136 }
1137
1138 /* handle error */
1139 sc->sc_flags &= ~CS428X_FLAG_CLKRUNHACK;
1140 printf("%s: disabling CLKRUN hack\n", sc->sc_dev.dv_xname);
1141}
1142
1143static void
1042cs4280_set_adc_rate(struct cs428x_softc *sc, int rate)
1043{
1044 /* calculate capture rate:
1045 *
1046 * capture_coefficient_increment = -round(rate*128*65536/48000;
1047 * capture_phase_increment = floor(48000*65536*1024/rate);
1048 * cx = round(48000*65536*1024 - capture_phase_increment*rate);
1049 * cy = floor(cx/200);

--- 225 unchanged lines hidden (view full) ---

1275 BA1WRITE4(sc, CS4280_SPCR, SPCR_DRQEN);
1276}
1277
1278static int
1279cs4280_init(struct cs428x_softc *sc, int init)
1280{
1281 int n;
1282 uint32_t mem;
1144cs4280_set_adc_rate(struct cs428x_softc *sc, int rate)
1145{
1146 /* calculate capture rate:
1147 *
1148 * capture_coefficient_increment = -round(rate*128*65536/48000;
1149 * capture_phase_increment = floor(48000*65536*1024/rate);
1150 * cx = round(48000*65536*1024 - capture_phase_increment*rate);
1151 * cy = floor(cx/200);

--- 225 unchanged lines hidden (view full) ---

1377 BA1WRITE4(sc, CS4280_SPCR, SPCR_DRQEN);
1378}
1379
1380static int
1381cs4280_init(struct cs428x_softc *sc, int init)
1382{
1383 int n;
1384 uint32_t mem;
1385 int rv;
1283
1386
1387 rv = 1;
1388 cs4280_clkrun_hack(sc, 1);
1389
1284 /* Start PLL out in known state */
1285 BA0WRITE4(sc, CS4280_CLKCR1, 0);
1286 /* Start serial ports out in known state */
1287 BA0WRITE4(sc, CS4280_SERMC1, 0);
1288
1289 /* Specify type of CODEC */
1290/* XXX should not be here */
1291#define SERACC_CODEC_TYPE_1_03

--- 44 unchanged lines hidden (view full) ---

1336
1337 /* Wait for CODEC ready */
1338 n = 0;
1339 while ((BA0READ4(sc, CS428X_ACSTS) & ACSTS_CRDY) == 0) {
1340 delay(125);
1341 if (++n > 1000) {
1342 printf("%s: codec ready timeout\n",
1343 sc->sc_dev.dv_xname);
1390 /* Start PLL out in known state */
1391 BA0WRITE4(sc, CS4280_CLKCR1, 0);
1392 /* Start serial ports out in known state */
1393 BA0WRITE4(sc, CS4280_SERMC1, 0);
1394
1395 /* Specify type of CODEC */
1396/* XXX should not be here */
1397#define SERACC_CODEC_TYPE_1_03

--- 44 unchanged lines hidden (view full) ---

1442
1443 /* Wait for CODEC ready */
1444 n = 0;
1445 while ((BA0READ4(sc, CS428X_ACSTS) & ACSTS_CRDY) == 0) {
1446 delay(125);
1447 if (++n > 1000) {
1448 printf("%s: codec ready timeout\n",
1449 sc->sc_dev.dv_xname);
1344 return 1;
1450 goto exit;
1345 }
1346 }
1347
1348 /* Assert valid frame signal */
1349 BA0WRITE4(sc, CS428X_ACCTL, ACCTL_VFRM | ACCTL_ESYN | ACCTL_RSTN);
1350
1351 /* Wait for valid AC97 input slot */
1352 n = 0;
1353 while ((BA0READ4(sc, CS428X_ACISV) & (ACISV_ISV3 | ACISV_ISV4)) !=
1354 (ACISV_ISV3 | ACISV_ISV4)) {
1355 delay(1000);
1356 if (++n > 1000) {
1357 printf("AC97 inputs slot ready timeout\n");
1451 }
1452 }
1453
1454 /* Assert valid frame signal */
1455 BA0WRITE4(sc, CS428X_ACCTL, ACCTL_VFRM | ACCTL_ESYN | ACCTL_RSTN);
1456
1457 /* Wait for valid AC97 input slot */
1458 n = 0;
1459 while ((BA0READ4(sc, CS428X_ACISV) & (ACISV_ISV3 | ACISV_ISV4)) !=
1460 (ACISV_ISV3 | ACISV_ISV4)) {
1461 delay(1000);
1462 if (++n > 1000) {
1463 printf("AC97 inputs slot ready timeout\n");
1358 return 1;
1464 goto exit;
1359 }
1360 }
1361
1362 /* Set AC97 output slot valid signals */
1363 BA0WRITE4(sc, CS428X_ACOSV, ACOSV_SLV3 | ACOSV_SLV4);
1364
1365 /* reset the processor */
1366 cs4280_reset(sc);
1367
1368 /* Download the image to the processor */
1369 if (cs4280_download_image(sc) != 0) {
1370 printf("%s: image download error\n", sc->sc_dev.dv_xname);
1465 }
1466 }
1467
1468 /* Set AC97 output slot valid signals */
1469 BA0WRITE4(sc, CS428X_ACOSV, ACOSV_SLV3 | ACOSV_SLV4);
1470
1471 /* reset the processor */
1472 cs4280_reset(sc);
1473
1474 /* Download the image to the processor */
1475 if (cs4280_download_image(sc) != 0) {
1476 printf("%s: image download error\n", sc->sc_dev.dv_xname);
1371 return 1;
1477 goto exit;
1372 }
1373
1374 /* Save playback parameter and then write zero.
1375 * this ensures that DMA doesn't immediately occur upon
1376 * starting the processor core
1377 */
1378 mem = BA1READ4(sc, CS4280_PCTL);
1379 sc->pctl = mem & PCTL_MASK; /* save startup value */

--- 16 unchanged lines hidden (view full) ---

1396 BA1WRITE4(sc, CS4280_SPCR, SPCR_RUN | SPCR_RUNFR | SPCR_DRQEN);
1397
1398 /* Monitor RUNFR bit in SPCR for 1 to 0 transition */
1399 n = 0;
1400 while (BA1READ4(sc, CS4280_SPCR) & SPCR_RUNFR) {
1401 delay(10);
1402 if (++n > 1000) {
1403 printf("SPCR 1->0 transition timeout\n");
1478 }
1479
1480 /* Save playback parameter and then write zero.
1481 * this ensures that DMA doesn't immediately occur upon
1482 * starting the processor core
1483 */
1484 mem = BA1READ4(sc, CS4280_PCTL);
1485 sc->pctl = mem & PCTL_MASK; /* save startup value */

--- 16 unchanged lines hidden (view full) ---

1502 BA1WRITE4(sc, CS4280_SPCR, SPCR_RUN | SPCR_RUNFR | SPCR_DRQEN);
1503
1504 /* Monitor RUNFR bit in SPCR for 1 to 0 transition */
1505 n = 0;
1506 while (BA1READ4(sc, CS4280_SPCR) & SPCR_RUNFR) {
1507 delay(10);
1508 if (++n > 1000) {
1509 printf("SPCR 1->0 transition timeout\n");
1404 return 1;
1510 goto exit;
1405 }
1406 }
1407
1408 n = 0;
1409 while (!(BA1READ4(sc, CS4280_SPCS) & SPCS_SPRUN)) {
1410 delay(10);
1411 if (++n > 1000) {
1412 printf("SPCS 0->1 transition timeout\n");
1511 }
1512 }
1513
1514 n = 0;
1515 while (!(BA1READ4(sc, CS4280_SPCS) & SPCS_SPRUN)) {
1516 delay(10);
1517 if (++n > 1000) {
1518 printf("SPCS 0->1 transition timeout\n");
1413 return 1;
1519 goto exit;
1414 }
1415 }
1416 /* Processor is now running !!! */
1417
1418 /* Setup volume */
1419 BA1WRITE4(sc, CS4280_PVOL, 0x80008000);
1420 BA1WRITE4(sc, CS4280_CVOL, 0x80008000);
1421

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1435 /* Reset midi port */
1436 mem = BA0READ4(sc, CS4280_MIDCR) & ~MIDCR_MASK;
1437 BA0WRITE4(sc, CS4280_MIDCR, mem | MIDCR_MRST);
1438 DPRINTF(("midi reset: 0x%x\n", BA0READ4(sc, CS4280_MIDCR)));
1439 /* midi interrupt enable */
1440 mem |= MIDCR_TXE | MIDCR_RXE | MIDCR_RIE | MIDCR_TIE;
1441 BA0WRITE4(sc, CS4280_MIDCR, mem);
1442#endif
1520 }
1521 }
1522 /* Processor is now running !!! */
1523
1524 /* Setup volume */
1525 BA1WRITE4(sc, CS4280_PVOL, 0x80008000);
1526 BA1WRITE4(sc, CS4280_CVOL, 0x80008000);
1527

--- 13 unchanged lines hidden (view full) ---

1541 /* Reset midi port */
1542 mem = BA0READ4(sc, CS4280_MIDCR) & ~MIDCR_MASK;
1543 BA0WRITE4(sc, CS4280_MIDCR, mem | MIDCR_MRST);
1544 DPRINTF(("midi reset: 0x%x\n", BA0READ4(sc, CS4280_MIDCR)));
1545 /* midi interrupt enable */
1546 mem |= MIDCR_TXE | MIDCR_RXE | MIDCR_RIE | MIDCR_TIE;
1547 BA0WRITE4(sc, CS4280_MIDCR, mem);
1548#endif
1443 return 0;
1549
1550 rv = 0;
1551
1552exit:
1553 cs4280_clkrun_hack(sc, -1);
1554 return rv;
1444}
1445
1446static void
1447cs4280_clear_fifos(struct cs428x_softc *sc)
1448{
1449 int pd, cnt, n;
1450 uint32_t mem;
1451

--- 163 unchanged lines hidden --- 		1555}
1556
1557static void
1558cs4280_clear_fifos(struct cs428x_softc *sc)
1559{
1560 int pd, cnt, n;
1561 uint32_t mem;
1562

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