tegra_soc.c (1.5) | tegra_soc.c (1.6) |
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1/* $NetBSD: tegra_soc.c,v 1.5 2015/05/03 01:07:44 jmcneill Exp $ */ | 1/* $NetBSD: tegra_soc.c,v 1.6 2015/05/13 11:06:13 jmcneill Exp $ */ |
2 3/*- 4 * Copyright (c) 2015 Jared D. McNeill <jmcneill@invisible.ca> 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: --- 15 unchanged lines hidden (view full) --- 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 */ 28 29#include "opt_tegra.h" 30#include "opt_multiprocessor.h" 31 32#include <sys/cdefs.h> | 2 3/*- 4 * Copyright (c) 2015 Jared D. McNeill <jmcneill@invisible.ca> 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: --- 15 unchanged lines hidden (view full) --- 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 */ 28 29#include "opt_tegra.h" 30#include "opt_multiprocessor.h" 31 32#include <sys/cdefs.h> |
33__KERNEL_RCSID(0, "$NetBSD: tegra_soc.c,v 1.5 2015/05/03 01:07:44 jmcneill Exp $"); | 33__KERNEL_RCSID(0, "$NetBSD: tegra_soc.c,v 1.6 2015/05/13 11:06:13 jmcneill Exp $"); |
34 35#define _ARM32_BUS_DMA_PRIVATE 36#include <sys/param.h> 37#include <sys/bus.h> 38#include <sys/cpu.h> 39#include <sys/device.h> 40 41#include <uvm/uvm_extern.h> --- 61 unchanged lines hidden (view full) --- 103} 104 105void 106tegra_dma_bootstrap(psize_t psize) 107{ 108 tegra_coherent_dma_ranges[0].dr_len = psize; 109} 110 | 34 35#define _ARM32_BUS_DMA_PRIVATE 36#include <sys/param.h> 37#include <sys/bus.h> 38#include <sys/cpu.h> 39#include <sys/device.h> 40 41#include <uvm/uvm_extern.h> --- 61 unchanged lines hidden (view full) --- 103} 104 105void 106tegra_dma_bootstrap(psize_t psize) 107{ 108 tegra_coherent_dma_ranges[0].dr_len = psize; 109} 110 |
111void 112tegra_cpuinit(void) 113{ 114 switch (tegra_chip_id()) { 115#ifdef SOC_TEGRA124 116 case CHIP_ID_TEGRA124: 117 tegra124_cpuinit(); 118 break; 119#endif 120 } 121 122 tegra_cpufreq_init(); 123} 124 |
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111static void 112tegra_mpinit(void) 113{ 114#if defined(MULTIPROCESSOR) 115 switch (tegra_chip_id()) { 116#ifdef SOC_TEGRA124 117 case CHIP_ID_TEGRA124: 118 tegra124_mpinit(); --- 33 unchanged lines hidden --- | 125static void 126tegra_mpinit(void) 127{ 128#if defined(MULTIPROCESSOR) 129 switch (tegra_chip_id()) { 130#ifdef SOC_TEGRA124 131 case CHIP_ID_TEGRA124: 132 tegra124_mpinit(); --- 33 unchanged lines hidden --- |