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if_cuereg.h (187378) if_cuereg.h (188412)
1/*-
2 * Copyright (c) 1997, 1998, 1999, 2000
3 * Bill Paul <wpaul@ee.columbia.edu>. All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

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24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
30 * THE POSSIBILITY OF SUCH DAMAGE.
31 *
1/*-
2 * Copyright (c) 1997, 1998, 1999, 2000
3 * Bill Paul <wpaul@ee.columbia.edu>. All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

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24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
30 * THE POSSIBILITY OF SUCH DAMAGE.
31 *
32 * $FreeBSD: head/sys/dev/usb2/ethernet/if_cuereg.h 187378 2009-01-18 05:35:58Z thompsa $
32 * $FreeBSD: head/sys/dev/usb2/ethernet/if_cuereg.h 188412 2009-02-09 22:02:38Z thompsa $
33 */
34
35/*
36 * Definitions for the CATC Netmate II USB to ethernet controller.
37 */
38
39/* Vendor specific control commands. */
40#define CUE_CMD_RESET 0xF4

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94
95/*
96 * Address in ASIC's internal SRAM where the multicast hash table lives.
97 * The table is 64 bytes long, giving us a 512-bit table. We have to set
98 * the bit that corresponds to the broadcast address in order to enable
99 * reception of broadcast frames.
100 */
101#define CUE_MCAST_TABLE_ADDR 0xFA80
33 */
34
35/*
36 * Definitions for the CATC Netmate II USB to ethernet controller.
37 */
38
39/* Vendor specific control commands. */
40#define CUE_CMD_RESET 0xF4

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94
95/*
96 * Address in ASIC's internal SRAM where the multicast hash table lives.
97 * The table is 64 bytes long, giving us a 512-bit table. We have to set
98 * the bit that corresponds to the broadcast address in order to enable
99 * reception of broadcast frames.
100 */
101#define CUE_MCAST_TABLE_ADDR 0xFA80
102#define CUE_MCAST_TABLE_LEN 64
103
104#define CUE_TIMEOUT 1000
105#define CUE_MIN_FRAMELEN 60
106#define CUE_RX_FRAMES 1
107#define CUE_TX_FRAMES 1
108
109#define CUE_CTL_READ 0x01
110#define CUE_CTL_WRITE 0x02
111
112#define CUE_CONFIG_IDX 0 /* config number 1 */
113#define CUE_IFACE_IDX 0
114
115/* The interrupt endpoint is currently unused by the KLSI part. */
116enum {
117 CUE_BULK_DT_WR,
118 CUE_BULK_DT_RD,
102
103#define CUE_TIMEOUT 1000
104#define CUE_MIN_FRAMELEN 60
105#define CUE_RX_FRAMES 1
106#define CUE_TX_FRAMES 1
107
108#define CUE_CTL_READ 0x01
109#define CUE_CTL_WRITE 0x02
110
111#define CUE_CONFIG_IDX 0 /* config number 1 */
112#define CUE_IFACE_IDX 0
113
114/* The interrupt endpoint is currently unused by the KLSI part. */
115enum {
116 CUE_BULK_DT_WR,
117 CUE_BULK_DT_RD,
119 CUE_BULK_CS_WR,
120 CUE_BULK_CS_RD,
121 CUE_N_TRANSFER = 4,
118 CUE_N_TRANSFER,
122};
123
124struct cue_softc {
119};
120
121struct cue_softc {
125 struct ifnet *sc_ifp;
122 struct usb2_ether sc_ue;
123 struct mtx sc_mtx;
124 struct usb2_xfer *sc_xfer[CUE_N_TRANSFER];
126
125
127 struct usb2_config_td sc_config_td;
128 struct usb2_callout sc_watchdog;
129 struct mtx sc_mtx;
130
131 device_t sc_dev;
132 struct usb2_device *sc_udev;
133 struct usb2_xfer *sc_xfer[CUE_N_TRANSFER];
134
135 uint32_t sc_unit;
136
137 uint16_t sc_flags;
138#define CUE_FLAG_READ_STALL 0x0010 /* wait for clearing of stall */
139#define CUE_FLAG_WRITE_STALL 0x0020 /* wait for clearing of stall */
140#define CUE_FLAG_LL_READY 0x0040 /* Lower Layer Ready */
141#define CUE_FLAG_HL_READY 0x0080 /* Higher Layer Ready */
142#define CUE_FLAG_INTR_STALL 0x0100 /* wait for clearing of stall */
126 int sc_flags;
127#define CUE_FLAG_LINK 0x0001 /* got a link */
143};
128};
129
130#define CUE_LOCK(_sc) mtx_lock(&(_sc)->sc_mtx)
131#define CUE_UNLOCK(_sc) mtx_unlock(&(_sc)->sc_mtx)
132#define CUE_LOCK_ASSERT(_sc, t) mtx_assert(&(_sc)->sc_mtx, t)