1/*-
2 * Copyright (c) 1997, 1998, 1999 Nicolas Souchu, Michael Smith
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 *
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 *
26 *
27 */
28
29#include <sys/cdefs.h>
| 1/*-
2 * Copyright (c) 1997, 1998, 1999 Nicolas Souchu, Michael Smith
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 *
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 *
26 *
27 */
28
29#include <sys/cdefs.h>
|
30__FBSDID("$FreeBSD: head/sys/dev/ppbus/ppi.c 184164 2008-10-22 15:00:22Z jhb $");
| 30__FBSDID("$FreeBSD: head/sys/dev/ppbus/ppi.c 185003 2008-11-16 17:42:02Z jhb $");
|
31#include "opt_ppb_1284.h"
32
33#include <sys/param.h>
34#include <sys/systm.h>
35#include <sys/module.h>
36#include <sys/bus.h>
37#include <sys/conf.h>
38#include <sys/kernel.h>
39#include <sys/uio.h>
40#include <sys/fcntl.h>
41
42#include <machine/bus.h>
43#include <machine/resource.h>
44#include <sys/rman.h>
45
46#include <dev/ppbus/ppbconf.h>
47#include <dev/ppbus/ppb_msq.h>
48
49#ifdef PERIPH_1284
50#include <dev/ppbus/ppb_1284.h>
51#endif
52
53#include <dev/ppbus/ppi.h>
54
55#include "ppbus_if.h"
56
57#include <dev/ppbus/ppbio.h>
58
59#define BUFSIZE 512
60
61struct ppi_data {
62 device_t ppi_device;
63 struct cdev *ppi_cdev;
64 int ppi_flags;
65#define HAVE_PPBUS (1<<0)
66#define HAD_PPBUS (1<<1)
67
68 int ppi_count;
69 int ppi_mode; /* IEEE1284 mode */
70 char ppi_buffer[BUFSIZE];
71
72#ifdef PERIPH_1284
73 struct resource *intr_resource; /* interrupt resource */
74 void *intr_cookie; /* interrupt registration cookie */
75#endif /* PERIPH_1284 */
76};
77
78#define DEVTOSOFTC(dev) \
79 ((struct ppi_data *)device_get_softc(dev))
80
81static devclass_t ppi_devclass;
82
83static d_open_t ppiopen;
84static d_close_t ppiclose;
85static d_ioctl_t ppiioctl;
86static d_write_t ppiwrite;
87static d_read_t ppiread;
88
89static struct cdevsw ppi_cdevsw = {
90 .d_version = D_VERSION,
91 .d_flags = D_NEEDGIANT,
92 .d_open = ppiopen,
93 .d_close = ppiclose,
94 .d_read = ppiread,
95 .d_write = ppiwrite,
96 .d_ioctl = ppiioctl,
97 .d_name = "ppi",
98};
99
100#ifdef PERIPH_1284
101
102static void
103ppi_enable_intr(device_t ppidev)
104{
105 char r;
106 device_t ppbus = device_get_parent(ppidev);
107
108 r = ppb_rctr(ppbus);
109 ppb_wctr(ppbus, r | IRQENABLE);
110
111 return;
112}
113
114static void
115ppi_disable_intr(device_t ppidev)
116{
117 char r;
| 31#include "opt_ppb_1284.h"
32
33#include <sys/param.h>
34#include <sys/systm.h>
35#include <sys/module.h>
36#include <sys/bus.h>
37#include <sys/conf.h>
38#include <sys/kernel.h>
39#include <sys/uio.h>
40#include <sys/fcntl.h>
41
42#include <machine/bus.h>
43#include <machine/resource.h>
44#include <sys/rman.h>
45
46#include <dev/ppbus/ppbconf.h>
47#include <dev/ppbus/ppb_msq.h>
48
49#ifdef PERIPH_1284
50#include <dev/ppbus/ppb_1284.h>
51#endif
52
53#include <dev/ppbus/ppi.h>
54
55#include "ppbus_if.h"
56
57#include <dev/ppbus/ppbio.h>
58
59#define BUFSIZE 512
60
61struct ppi_data {
62 device_t ppi_device;
63 struct cdev *ppi_cdev;
64 int ppi_flags;
65#define HAVE_PPBUS (1<<0)
66#define HAD_PPBUS (1<<1)
67
68 int ppi_count;
69 int ppi_mode; /* IEEE1284 mode */
70 char ppi_buffer[BUFSIZE];
71
72#ifdef PERIPH_1284
73 struct resource *intr_resource; /* interrupt resource */
74 void *intr_cookie; /* interrupt registration cookie */
75#endif /* PERIPH_1284 */
76};
77
78#define DEVTOSOFTC(dev) \
79 ((struct ppi_data *)device_get_softc(dev))
80
81static devclass_t ppi_devclass;
82
83static d_open_t ppiopen;
84static d_close_t ppiclose;
85static d_ioctl_t ppiioctl;
86static d_write_t ppiwrite;
87static d_read_t ppiread;
88
89static struct cdevsw ppi_cdevsw = {
90 .d_version = D_VERSION,
91 .d_flags = D_NEEDGIANT,
92 .d_open = ppiopen,
93 .d_close = ppiclose,
94 .d_read = ppiread,
95 .d_write = ppiwrite,
96 .d_ioctl = ppiioctl,
97 .d_name = "ppi",
98};
99
100#ifdef PERIPH_1284
101
102static void
103ppi_enable_intr(device_t ppidev)
104{
105 char r;
106 device_t ppbus = device_get_parent(ppidev);
107
108 r = ppb_rctr(ppbus);
109 ppb_wctr(ppbus, r | IRQENABLE);
110
111 return;
112}
113
114static void
115ppi_disable_intr(device_t ppidev)
116{
117 char r;
|
118 device_t ppbus = device_get_parent(ppidev);
| 118 device_t ppbus = device_get_parent(ppidev);
|
119
120 r = ppb_rctr(ppbus);
121 ppb_wctr(ppbus, r & ~IRQENABLE);
122
123 return;
124}
125
126#endif /* PERIPH_1284 */
127
128static void
129ppi_identify(driver_t *driver, device_t parent)
130{
131
132 device_t dev;
133
134 dev = device_find_child(parent, "ppi", -1);
135 if (!dev)
136 BUS_ADD_CHILD(parent, 0, "ppi", -1);
137}
138
139/*
140 * ppi_probe()
141 */
142static int
143ppi_probe(device_t dev)
144{
145 struct ppi_data *ppi;
146
147 /* probe is always ok */
148 device_set_desc(dev, "Parallel I/O");
149
150 ppi = DEVTOSOFTC(dev);
151
152 return (0);
153}
154
155/*
156 * ppi_attach()
157 */
158static int
159ppi_attach(device_t dev)
160{
161 struct ppi_data *ppi = DEVTOSOFTC(dev);
162#ifdef PERIPH_1284
163 int rid = 0;
164
165 /* declare our interrupt handler */
166 ppi->intr_resource = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,
167 RF_ACTIVE);
168#endif /* PERIPH_1284 */
169
170 ppi->ppi_cdev = make_dev(&ppi_cdevsw, device_get_unit(dev),
171 UID_ROOT, GID_WHEEL,
172 0600, "ppi%d", device_get_unit(dev));
173 if (ppi->ppi_cdev == NULL) {
174 device_printf(dev, "Failed to create character device\n");
175 return (ENXIO);
176 }
177 ppi->ppi_cdev->si_drv1 = ppi;
178 ppi->ppi_device = dev;
179
180 return (0);
181}
182
183#ifdef PERIPH_1284
184/*
185 * Cable
186 * -----
187 *
188 * Use an IEEE1284 compliant (DB25/DB25) cable with the following tricks:
189 *
190 * nStrobe <-> nAck 1 <-> 10
191 * nAutofd <-> Busy 11 <-> 14
192 * nSelectin <-> Select 17 <-> 13
193 * nInit <-> nFault 15 <-> 16
194 *
195 */
196static void
197ppiintr(void *arg)
198{
199 device_t ppidev = (device_t)arg;
| 119
120 r = ppb_rctr(ppbus);
121 ppb_wctr(ppbus, r & ~IRQENABLE);
122
123 return;
124}
125
126#endif /* PERIPH_1284 */
127
128static void
129ppi_identify(driver_t *driver, device_t parent)
130{
131
132 device_t dev;
133
134 dev = device_find_child(parent, "ppi", -1);
135 if (!dev)
136 BUS_ADD_CHILD(parent, 0, "ppi", -1);
137}
138
139/*
140 * ppi_probe()
141 */
142static int
143ppi_probe(device_t dev)
144{
145 struct ppi_data *ppi;
146
147 /* probe is always ok */
148 device_set_desc(dev, "Parallel I/O");
149
150 ppi = DEVTOSOFTC(dev);
151
152 return (0);
153}
154
155/*
156 * ppi_attach()
157 */
158static int
159ppi_attach(device_t dev)
160{
161 struct ppi_data *ppi = DEVTOSOFTC(dev);
162#ifdef PERIPH_1284
163 int rid = 0;
164
165 /* declare our interrupt handler */
166 ppi->intr_resource = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,
167 RF_ACTIVE);
168#endif /* PERIPH_1284 */
169
170 ppi->ppi_cdev = make_dev(&ppi_cdevsw, device_get_unit(dev),
171 UID_ROOT, GID_WHEEL,
172 0600, "ppi%d", device_get_unit(dev));
173 if (ppi->ppi_cdev == NULL) {
174 device_printf(dev, "Failed to create character device\n");
175 return (ENXIO);
176 }
177 ppi->ppi_cdev->si_drv1 = ppi;
178 ppi->ppi_device = dev;
179
180 return (0);
181}
182
183#ifdef PERIPH_1284
184/*
185 * Cable
186 * -----
187 *
188 * Use an IEEE1284 compliant (DB25/DB25) cable with the following tricks:
189 *
190 * nStrobe <-> nAck 1 <-> 10
191 * nAutofd <-> Busy 11 <-> 14
192 * nSelectin <-> Select 17 <-> 13
193 * nInit <-> nFault 15 <-> 16
194 *
195 */
196static void
197ppiintr(void *arg)
198{
199 device_t ppidev = (device_t)arg;
|
200 device_t ppbus = device_get_parent(ppidev);
| 200 device_t ppbus = device_get_parent(ppidev);
|
201 struct ppi_data *ppi = DEVTOSOFTC(ppidev);
202
203 ppi_disable_intr(ppidev);
204
205 switch (ppb_1284_get_state(ppbus)) {
206
207 /* accept IEEE1284 negotiation then wakeup a waiting process to
208 * continue negotiation at process level */
209 case PPB_FORWARD_IDLE:
210 /* Event 1 */
211 if ((ppb_rstr(ppbus) & (SELECT | nBUSY)) ==
212 (SELECT | nBUSY)) {
213 /* IEEE1284 negotiation */
214#ifdef DEBUG_1284
215 printf("N");
216#endif
217
218 /* Event 2 - prepare for reading the ext. value */
219 ppb_wctr(ppbus, (PCD | STROBE | nINIT) & ~SELECTIN);
220
221 ppb_1284_set_state(ppbus, PPB_NEGOCIATION);
222
223 } else {
224#ifdef DEBUG_1284
225 printf("0x%x", ppb_rstr(ppbus));
226#endif
227 ppb_peripheral_terminate(ppbus, PPB_DONTWAIT);
228 break;
229 }
230
231 /* wake up any process waiting for negotiation from
232 * remote master host */
233
234 /* XXX should set a variable to warn the process about
235 * the interrupt */
236
237 wakeup(ppi);
238 break;
239 default:
240#ifdef DEBUG_1284
241 printf("?%d", ppb_1284_get_state(ppbus));
242#endif
243 ppb_1284_set_state(ppbus, PPB_FORWARD_IDLE);
244 ppb_set_mode(ppbus, PPB_COMPATIBLE);
245 break;
246 }
247
248 ppi_enable_intr(ppidev);
249
250 return;
251}
252#endif /* PERIPH_1284 */
253
254static int
255ppiopen(struct cdev *dev, int flags, int fmt, struct thread *td)
256{
257 struct ppi_data *ppi = dev->si_drv1;
258 device_t ppidev = ppi->ppi_device;
| 201 struct ppi_data *ppi = DEVTOSOFTC(ppidev);
202
203 ppi_disable_intr(ppidev);
204
205 switch (ppb_1284_get_state(ppbus)) {
206
207 /* accept IEEE1284 negotiation then wakeup a waiting process to
208 * continue negotiation at process level */
209 case PPB_FORWARD_IDLE:
210 /* Event 1 */
211 if ((ppb_rstr(ppbus) & (SELECT | nBUSY)) ==
212 (SELECT | nBUSY)) {
213 /* IEEE1284 negotiation */
214#ifdef DEBUG_1284
215 printf("N");
216#endif
217
218 /* Event 2 - prepare for reading the ext. value */
219 ppb_wctr(ppbus, (PCD | STROBE | nINIT) & ~SELECTIN);
220
221 ppb_1284_set_state(ppbus, PPB_NEGOCIATION);
222
223 } else {
224#ifdef DEBUG_1284
225 printf("0x%x", ppb_rstr(ppbus));
226#endif
227 ppb_peripheral_terminate(ppbus, PPB_DONTWAIT);
228 break;
229 }
230
231 /* wake up any process waiting for negotiation from
232 * remote master host */
233
234 /* XXX should set a variable to warn the process about
235 * the interrupt */
236
237 wakeup(ppi);
238 break;
239 default:
240#ifdef DEBUG_1284
241 printf("?%d", ppb_1284_get_state(ppbus));
242#endif
243 ppb_1284_set_state(ppbus, PPB_FORWARD_IDLE);
244 ppb_set_mode(ppbus, PPB_COMPATIBLE);
245 break;
246 }
247
248 ppi_enable_intr(ppidev);
249
250 return;
251}
252#endif /* PERIPH_1284 */
253
254static int
255ppiopen(struct cdev *dev, int flags, int fmt, struct thread *td)
256{
257 struct ppi_data *ppi = dev->si_drv1;
258 device_t ppidev = ppi->ppi_device;
|
259 device_t ppbus = device_get_parent(ppidev);
| 259 device_t ppbus = device_get_parent(ppidev);
|
260 int res;
261
262 if (!(ppi->ppi_flags & HAVE_PPBUS)) {
263 if ((res = ppb_request_bus(ppbus, ppidev,
264 (flags & O_NONBLOCK) ? PPB_DONTWAIT :
265 (PPB_WAIT | PPB_INTR))))
266 return (res);
267
268 ppi->ppi_flags |= HAVE_PPBUS;
269
270#ifdef PERIPH_1284
271 if (ppi->intr_resource) {
272 /* register our interrupt handler */
| 260 int res;
261
262 if (!(ppi->ppi_flags & HAVE_PPBUS)) {
263 if ((res = ppb_request_bus(ppbus, ppidev,
264 (flags & O_NONBLOCK) ? PPB_DONTWAIT :
265 (PPB_WAIT | PPB_INTR))))
266 return (res);
267
268 ppi->ppi_flags |= HAVE_PPBUS;
269
270#ifdef PERIPH_1284
271 if (ppi->intr_resource) {
272 /* register our interrupt handler */
|
273 bus_setup_intr(ppidev, ppi->intr_resource,
| 273 bus_setup_intr(ppidev, ppi->intr_resource,
|
274 INTR_TYPE_TTY, NULL, ppiintr, dev,
275 &ppi->intr_cookie);
276 }
277#endif /* PERIPH_1284 */
278 }
279 ppi->ppi_count += 1;
280
281 return (0);
282}
283
284static int
285ppiclose(struct cdev *dev, int flags, int fmt, struct thread *td)
286{
287 struct ppi_data *ppi = dev->si_drv1;
288 device_t ppidev = ppi->ppi_device;
| 274 INTR_TYPE_TTY, NULL, ppiintr, dev,
275 &ppi->intr_cookie);
276 }
277#endif /* PERIPH_1284 */
278 }
279 ppi->ppi_count += 1;
280
281 return (0);
282}
283
284static int
285ppiclose(struct cdev *dev, int flags, int fmt, struct thread *td)
286{
287 struct ppi_data *ppi = dev->si_drv1;
288 device_t ppidev = ppi->ppi_device;
|
289 device_t ppbus = device_get_parent(ppidev);
| 289 device_t ppbus = device_get_parent(ppidev);
|
290
291 ppi->ppi_count --;
292 if (!ppi->ppi_count) {
293
294#ifdef PERIPH_1284
295 switch (ppb_1284_get_state(ppbus)) {
296 case PPB_PERIPHERAL_IDLE:
297 ppb_peripheral_terminate(ppbus, 0);
298 break;
299 case PPB_REVERSE_IDLE:
300 case PPB_EPP_IDLE:
301 case PPB_ECP_FORWARD_IDLE:
302 default:
303 ppb_1284_terminate(ppbus);
304 break;
305 }
306#endif /* PERIPH_1284 */
307
308 /* unregistration of interrupt forced by release */
309 ppb_release_bus(ppbus, ppidev);
310
311 ppi->ppi_flags &= ~HAVE_PPBUS;
312 }
313
314 return (0);
315}
316
317/*
318 * ppiread()
319 *
320 * IEEE1284 compliant read.
321 *
322 * First, try negotiation to BYTE then NIBBLE mode
323 * If no data is available, wait for it otherwise transfer as much as possible
324 */
325static int
326ppiread(struct cdev *dev, struct uio *uio, int ioflag)
327{
328#ifdef PERIPH_1284
329 struct ppi_data *ppi = dev->si_drv1;
330 device_t ppidev = ppi->ppi_device;
| 290
291 ppi->ppi_count --;
292 if (!ppi->ppi_count) {
293
294#ifdef PERIPH_1284
295 switch (ppb_1284_get_state(ppbus)) {
296 case PPB_PERIPHERAL_IDLE:
297 ppb_peripheral_terminate(ppbus, 0);
298 break;
299 case PPB_REVERSE_IDLE:
300 case PPB_EPP_IDLE:
301 case PPB_ECP_FORWARD_IDLE:
302 default:
303 ppb_1284_terminate(ppbus);
304 break;
305 }
306#endif /* PERIPH_1284 */
307
308 /* unregistration of interrupt forced by release */
309 ppb_release_bus(ppbus, ppidev);
310
311 ppi->ppi_flags &= ~HAVE_PPBUS;
312 }
313
314 return (0);
315}
316
317/*
318 * ppiread()
319 *
320 * IEEE1284 compliant read.
321 *
322 * First, try negotiation to BYTE then NIBBLE mode
323 * If no data is available, wait for it otherwise transfer as much as possible
324 */
325static int
326ppiread(struct cdev *dev, struct uio *uio, int ioflag)
327{
328#ifdef PERIPH_1284
329 struct ppi_data *ppi = dev->si_drv1;
330 device_t ppidev = ppi->ppi_device;
|
331 device_t ppbus = device_get_parent(ppidev);
| 331 device_t ppbus = device_get_parent(ppidev);
|
332 int len, error = 0;
333
334 switch (ppb_1284_get_state(ppbus)) {
335 case PPB_PERIPHERAL_IDLE:
336 ppb_peripheral_terminate(ppbus, 0);
337 /* FALLTHROUGH */
338
339 case PPB_FORWARD_IDLE:
340 /* if can't negotiate NIBBLE mode then try BYTE mode,
341 * the peripheral may be a computer
342 */
343 if ((ppb_1284_negociate(ppbus,
344 ppi->ppi_mode = PPB_NIBBLE, 0))) {
345
346 /* XXX Wait 2 seconds to let the remote host some
347 * time to terminate its interrupt
348 */
349 tsleep(ppi, PPBPRI, "ppiread", 2*hz);
| 332 int len, error = 0;
333
334 switch (ppb_1284_get_state(ppbus)) {
335 case PPB_PERIPHERAL_IDLE:
336 ppb_peripheral_terminate(ppbus, 0);
337 /* FALLTHROUGH */
338
339 case PPB_FORWARD_IDLE:
340 /* if can't negotiate NIBBLE mode then try BYTE mode,
341 * the peripheral may be a computer
342 */
343 if ((ppb_1284_negociate(ppbus,
344 ppi->ppi_mode = PPB_NIBBLE, 0))) {
345
346 /* XXX Wait 2 seconds to let the remote host some
347 * time to terminate its interrupt
348 */
349 tsleep(ppi, PPBPRI, "ppiread", 2*hz);
|
350
| 350
|
351 if ((error = ppb_1284_negociate(ppbus,
352 ppi->ppi_mode = PPB_BYTE, 0)))
353 return (error);
354 }
355 break;
356
357 case PPB_REVERSE_IDLE:
358 case PPB_EPP_IDLE:
359 case PPB_ECP_FORWARD_IDLE:
360 default:
361 break;
362 }
363
364#ifdef DEBUG_1284
365 printf("N");
366#endif
367 /* read data */
368 len = 0;
369 while (uio->uio_resid) {
370 if ((error = ppb_1284_read(ppbus, ppi->ppi_mode,
371 ppi->ppi_buffer, min(BUFSIZE, uio->uio_resid),
372 &len))) {
373 goto error;
374 }
375
376 if (!len)
377 goto error; /* no more data */
378
379#ifdef DEBUG_1284
380 printf("d");
381#endif
382 if ((error = uiomove(ppi->ppi_buffer, len, uio)))
383 goto error;
384 }
385
386error:
387
388#else /* PERIPH_1284 */
389 int error = ENODEV;
390#endif
391
392 return (error);
393}
394
395/*
396 * ppiwrite()
397 *
398 * IEEE1284 compliant write
399 *
400 * Actually, this is the peripheral side of a remote IEEE1284 read
401 *
402 * The first part of the negotiation (IEEE1284 device detection) is
403 * done at interrupt level, then the remaining is done by the writing
404 * process
405 *
406 * Once negotiation done, transfer data
407 */
408static int
409ppiwrite(struct cdev *dev, struct uio *uio, int ioflag)
410{
411#ifdef PERIPH_1284
412 struct ppi_data *ppi = dev->si_drv1;
413 device_t ppidev = ppi->ppi_device;
| 351 if ((error = ppb_1284_negociate(ppbus,
352 ppi->ppi_mode = PPB_BYTE, 0)))
353 return (error);
354 }
355 break;
356
357 case PPB_REVERSE_IDLE:
358 case PPB_EPP_IDLE:
359 case PPB_ECP_FORWARD_IDLE:
360 default:
361 break;
362 }
363
364#ifdef DEBUG_1284
365 printf("N");
366#endif
367 /* read data */
368 len = 0;
369 while (uio->uio_resid) {
370 if ((error = ppb_1284_read(ppbus, ppi->ppi_mode,
371 ppi->ppi_buffer, min(BUFSIZE, uio->uio_resid),
372 &len))) {
373 goto error;
374 }
375
376 if (!len)
377 goto error; /* no more data */
378
379#ifdef DEBUG_1284
380 printf("d");
381#endif
382 if ((error = uiomove(ppi->ppi_buffer, len, uio)))
383 goto error;
384 }
385
386error:
387
388#else /* PERIPH_1284 */
389 int error = ENODEV;
390#endif
391
392 return (error);
393}
394
395/*
396 * ppiwrite()
397 *
398 * IEEE1284 compliant write
399 *
400 * Actually, this is the peripheral side of a remote IEEE1284 read
401 *
402 * The first part of the negotiation (IEEE1284 device detection) is
403 * done at interrupt level, then the remaining is done by the writing
404 * process
405 *
406 * Once negotiation done, transfer data
407 */
408static int
409ppiwrite(struct cdev *dev, struct uio *uio, int ioflag)
410{
411#ifdef PERIPH_1284
412 struct ppi_data *ppi = dev->si_drv1;
413 device_t ppidev = ppi->ppi_device;
|
414 device_t ppbus = device_get_parent(ppidev);
| 414 device_t ppbus = device_get_parent(ppidev);
|
415 int len, error = 0, sent;
416
417#if 0
418 int ret;
419
420 #define ADDRESS MS_PARAM(0, 0, MS_TYP_PTR)
421 #define LENGTH MS_PARAM(0, 1, MS_TYP_INT)
422
423 struct ppb_microseq msq[] = {
424 { MS_OP_PUT, { MS_UNKNOWN, MS_UNKNOWN, MS_UNKNOWN } },
425 MS_RET(0)
426 };
427
428 /* negotiate ECP mode */
429 if (ppb_1284_negociate(ppbus, PPB_ECP, 0)) {
430 printf("ppiwrite: ECP negotiation failed\n");
431 }
432
433 while (!error && (len = min(uio->uio_resid, BUFSIZE))) {
434 uiomove(ppi->ppi_buffer, len, uio);
435
436 ppb_MS_init_msq(msq, 2, ADDRESS, ppi->ppi_buffer, LENGTH, len);
437
438 error = ppb_MS_microseq(ppbus, msq, &ret);
439 }
440#endif
441
442 /* we have to be peripheral to be able to send data, so
443 * wait for the appropriate state
444 */
445 if (ppb_1284_get_state(ppbus) < PPB_PERIPHERAL_NEGOCIATION)
446 ppb_1284_terminate(ppbus);
447
448 while (ppb_1284_get_state(ppbus) != PPB_PERIPHERAL_IDLE) {
449 /* XXX should check a variable before sleeping */
450#ifdef DEBUG_1284
451 printf("s");
452#endif
453
454 ppi_enable_intr(ppidev);
455
456 /* sleep until IEEE1284 negotiation starts */
457 error = tsleep(ppi, PCATCH | PPBPRI, "ppiwrite", 0);
458
459 switch (error) {
460 case 0:
461 /* negotiate peripheral side with BYTE mode */
462 ppb_peripheral_negociate(ppbus, PPB_BYTE, 0);
463 break;
464 case EWOULDBLOCK:
465 break;
466 default:
467 goto error;
468 }
469 }
470#ifdef DEBUG_1284
471 printf("N");
472#endif
473
474 /* negotiation done, write bytes to master host */
475 while ((len = min(uio->uio_resid, BUFSIZE)) != 0) {
476 uiomove(ppi->ppi_buffer, len, uio);
477 if ((error = byte_peripheral_write(ppbus,
478 ppi->ppi_buffer, len, &sent)))
479 goto error;
480#ifdef DEBUG_1284
481 printf("d");
482#endif
483 }
484
485error:
486
487#else /* PERIPH_1284 */
488 int error = ENODEV;
489#endif
490
491 return (error);
492}
493
494static int
495ppiioctl(struct cdev *dev, u_long cmd, caddr_t data, int flags, struct thread *td)
496{
497 struct ppi_data *ppi = dev->si_drv1;
498 device_t ppidev = ppi->ppi_device;
499 device_t ppbus = device_get_parent(ppidev);
500 int error = 0;
501 u_int8_t *val = (u_int8_t *)data;
502
503 switch (cmd) {
504
505 case PPIGDATA: /* get data register */
506 *val = ppb_rdtr(ppbus);
507 break;
508 case PPIGSTATUS: /* get status bits */
509 *val = ppb_rstr(ppbus);
510 break;
511 case PPIGCTRL: /* get control bits */
512 *val = ppb_rctr(ppbus);
513 break;
514 case PPIGEPPD: /* get EPP data bits */
515 *val = ppb_repp_D(ppbus);
516 break;
517 case PPIGECR: /* get ECP bits */
518 *val = ppb_recr(ppbus);
519 break;
520 case PPIGFIFO: /* read FIFO */
521 *val = ppb_rfifo(ppbus);
522 break;
523 case PPISDATA: /* set data register */
524 ppb_wdtr(ppbus, *val);
525 break;
526 case PPISSTATUS: /* set status bits */
527 ppb_wstr(ppbus, *val);
528 break;
529 case PPISCTRL: /* set control bits */
530 ppb_wctr(ppbus, *val);
531 break;
532 case PPISEPPD: /* set EPP data bits */
533 ppb_wepp_D(ppbus, *val);
534 break;
535 case PPISECR: /* set ECP bits */
536 ppb_wecr(ppbus, *val);
537 break;
538 case PPISFIFO: /* write FIFO */
539 ppb_wfifo(ppbus, *val);
540 break;
541 case PPIGEPPA: /* get EPP address bits */
542 *val = ppb_repp_A(ppbus);
543 break;
544 case PPISEPPA: /* set EPP address bits */
545 ppb_wepp_A(ppbus, *val);
546 break;
547 default:
548 error = ENOTTY;
549 break;
550 }
| 415 int len, error = 0, sent;
416
417#if 0
418 int ret;
419
420 #define ADDRESS MS_PARAM(0, 0, MS_TYP_PTR)
421 #define LENGTH MS_PARAM(0, 1, MS_TYP_INT)
422
423 struct ppb_microseq msq[] = {
424 { MS_OP_PUT, { MS_UNKNOWN, MS_UNKNOWN, MS_UNKNOWN } },
425 MS_RET(0)
426 };
427
428 /* negotiate ECP mode */
429 if (ppb_1284_negociate(ppbus, PPB_ECP, 0)) {
430 printf("ppiwrite: ECP negotiation failed\n");
431 }
432
433 while (!error && (len = min(uio->uio_resid, BUFSIZE))) {
434 uiomove(ppi->ppi_buffer, len, uio);
435
436 ppb_MS_init_msq(msq, 2, ADDRESS, ppi->ppi_buffer, LENGTH, len);
437
438 error = ppb_MS_microseq(ppbus, msq, &ret);
439 }
440#endif
441
442 /* we have to be peripheral to be able to send data, so
443 * wait for the appropriate state
444 */
445 if (ppb_1284_get_state(ppbus) < PPB_PERIPHERAL_NEGOCIATION)
446 ppb_1284_terminate(ppbus);
447
448 while (ppb_1284_get_state(ppbus) != PPB_PERIPHERAL_IDLE) {
449 /* XXX should check a variable before sleeping */
450#ifdef DEBUG_1284
451 printf("s");
452#endif
453
454 ppi_enable_intr(ppidev);
455
456 /* sleep until IEEE1284 negotiation starts */
457 error = tsleep(ppi, PCATCH | PPBPRI, "ppiwrite", 0);
458
459 switch (error) {
460 case 0:
461 /* negotiate peripheral side with BYTE mode */
462 ppb_peripheral_negociate(ppbus, PPB_BYTE, 0);
463 break;
464 case EWOULDBLOCK:
465 break;
466 default:
467 goto error;
468 }
469 }
470#ifdef DEBUG_1284
471 printf("N");
472#endif
473
474 /* negotiation done, write bytes to master host */
475 while ((len = min(uio->uio_resid, BUFSIZE)) != 0) {
476 uiomove(ppi->ppi_buffer, len, uio);
477 if ((error = byte_peripheral_write(ppbus,
478 ppi->ppi_buffer, len, &sent)))
479 goto error;
480#ifdef DEBUG_1284
481 printf("d");
482#endif
483 }
484
485error:
486
487#else /* PERIPH_1284 */
488 int error = ENODEV;
489#endif
490
491 return (error);
492}
493
494static int
495ppiioctl(struct cdev *dev, u_long cmd, caddr_t data, int flags, struct thread *td)
496{
497 struct ppi_data *ppi = dev->si_drv1;
498 device_t ppidev = ppi->ppi_device;
499 device_t ppbus = device_get_parent(ppidev);
500 int error = 0;
501 u_int8_t *val = (u_int8_t *)data;
502
503 switch (cmd) {
504
505 case PPIGDATA: /* get data register */
506 *val = ppb_rdtr(ppbus);
507 break;
508 case PPIGSTATUS: /* get status bits */
509 *val = ppb_rstr(ppbus);
510 break;
511 case PPIGCTRL: /* get control bits */
512 *val = ppb_rctr(ppbus);
513 break;
514 case PPIGEPPD: /* get EPP data bits */
515 *val = ppb_repp_D(ppbus);
516 break;
517 case PPIGECR: /* get ECP bits */
518 *val = ppb_recr(ppbus);
519 break;
520 case PPIGFIFO: /* read FIFO */
521 *val = ppb_rfifo(ppbus);
522 break;
523 case PPISDATA: /* set data register */
524 ppb_wdtr(ppbus, *val);
525 break;
526 case PPISSTATUS: /* set status bits */
527 ppb_wstr(ppbus, *val);
528 break;
529 case PPISCTRL: /* set control bits */
530 ppb_wctr(ppbus, *val);
531 break;
532 case PPISEPPD: /* set EPP data bits */
533 ppb_wepp_D(ppbus, *val);
534 break;
535 case PPISECR: /* set ECP bits */
536 ppb_wecr(ppbus, *val);
537 break;
538 case PPISFIFO: /* write FIFO */
539 ppb_wfifo(ppbus, *val);
540 break;
541 case PPIGEPPA: /* get EPP address bits */
542 *val = ppb_repp_A(ppbus);
543 break;
544 case PPISEPPA: /* set EPP address bits */
545 ppb_wepp_A(ppbus, *val);
546 break;
547 default:
548 error = ENOTTY;
549 break;
550 }
|
551
| 551
|
552 return (error);
553}
554
555static device_method_t ppi_methods[] = {
556 /* device interface */
557 DEVMETHOD(device_identify, ppi_identify),
558 DEVMETHOD(device_probe, ppi_probe),
559 DEVMETHOD(device_attach, ppi_attach),
560
561 { 0, 0 }
562};
563
564static driver_t ppi_driver = {
565 "ppi",
566 ppi_methods,
567 sizeof(struct ppi_data),
568};
569DRIVER_MODULE(ppi, ppbus, ppi_driver, ppi_devclass, 0, 0);
570MODULE_DEPEND(ppi, ppbus, 1, 1, 1);
| 552 return (error);
553}
554
555static device_method_t ppi_methods[] = {
556 /* device interface */
557 DEVMETHOD(device_identify, ppi_identify),
558 DEVMETHOD(device_probe, ppi_probe),
559 DEVMETHOD(device_attach, ppi_attach),
560
561 { 0, 0 }
562};
563
564static driver_t ppi_driver = {
565 "ppi",
566 ppi_methods,
567 sizeof(struct ppi_data),
568};
569DRIVER_MODULE(ppi, ppbus, ppi_driver, ppi_devclass, 0, 0);
570MODULE_DEPEND(ppi, ppbus, 1, 1, 1);
|