1/*-
2 * PCI specific probe and attach routines for LSI Fusion Adapters
3 * FreeBSD Version.
4 *
5 * Copyright (c) 2000, 2001 by Greg Ansley
6 * Partially derived from Matt Jacob's ISP driver.
7 * Copyright (c) 1997, 1998, 1999, 2000, 2001, 2002 by Matthew Jacob
8 * Feral Software
9 * All rights reserved.
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 * 1. Redistributions of source code must retain the above copyright
15 * notice immediately at the beginning of the file, without modification,
16 * this list of conditions, and the following disclaimer.
17 * 2. The name of the author may not be used to endorse or promote products
18 * derived from this software without specific prior written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
24 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
25 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
26 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
27 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
28 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
29 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
30 * SUCH DAMAGE.
31 */
32/*-
33 * Copyright (c) 2002, 2006 by Matthew Jacob
34 * All rights reserved.
35 *
36 * Redistribution and use in source and binary forms, with or without
37 * modification, are permitted provided that the following conditions are
38 * met:
39 * 1. Redistributions of source code must retain the above copyright
40 * notice, this list of conditions and the following disclaimer.
41 * 2. Redistributions in binary form must reproduce at minimum a disclaimer
42 * substantially similar to the "NO WARRANTY" disclaimer below
43 * ("Disclaimer") and any redistribution must be conditioned upon including
44 * a substantially similar Disclaimer requirement for further binary
45 * redistribution.
46 * 3. Neither the names of the above listed copyright holders nor the names
47 * of any contributors may be used to endorse or promote products derived
48 * from this software without specific prior written permission.
49 *
50 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
51 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
52 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
53 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
54 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
55 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
56 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
57 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
58 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
59 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF THE COPYRIGHT
60 * OWNER OR CONTRIBUTOR IS ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
61 *
62 * Support from Chris Ellsworth in order to make SAS adapters work
63 * is gratefully acknowledged.
64 *
65 * Support from LSI-Logic has also gone a great deal toward making this a
66 * workable subsystem and is gratefully acknowledged.
67 */
68/*
69 * Copyright (c) 2004, Avid Technology, Inc. and its contributors.
70 * Copyright (c) 2005, WHEEL Sp. z o.o.
71 * Copyright (c) 2004, 2005 Justin T. Gibbs
72 * All rights reserved.
73 *
74 * Redistribution and use in source and binary forms, with or without
75 * modification, are permitted provided that the following conditions are
76 * met:
77 * 1. Redistributions of source code must retain the above copyright
78 * notice, this list of conditions and the following disclaimer.
79 * 2. Redistributions in binary form must reproduce at minimum a disclaimer
80 * substantially similar to the "NO WARRANTY" disclaimer below
81 * ("Disclaimer") and any redistribution must be conditioned upon including
82 * a substantially similar Disclaimer requirement for further binary
83 * redistribution.
84 * 3. Neither the names of the above listed copyright holders nor the names
85 * of any contributors may be used to endorse or promote products derived
86 * from this software without specific prior written permission.
87 *
88 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
89 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
90 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
91 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
92 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
93 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
94 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
95 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
96 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
97 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF THE COPYRIGHT
98 * OWNER OR CONTRIBUTOR IS ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
99 */
100
101#include <sys/cdefs.h>
| 1/*-
2 * PCI specific probe and attach routines for LSI Fusion Adapters
3 * FreeBSD Version.
4 *
5 * Copyright (c) 2000, 2001 by Greg Ansley
6 * Partially derived from Matt Jacob's ISP driver.
7 * Copyright (c) 1997, 1998, 1999, 2000, 2001, 2002 by Matthew Jacob
8 * Feral Software
9 * All rights reserved.
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 * 1. Redistributions of source code must retain the above copyright
15 * notice immediately at the beginning of the file, without modification,
16 * this list of conditions, and the following disclaimer.
17 * 2. The name of the author may not be used to endorse or promote products
18 * derived from this software without specific prior written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
24 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
25 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
26 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
27 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
28 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
29 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
30 * SUCH DAMAGE.
31 */
32/*-
33 * Copyright (c) 2002, 2006 by Matthew Jacob
34 * All rights reserved.
35 *
36 * Redistribution and use in source and binary forms, with or without
37 * modification, are permitted provided that the following conditions are
38 * met:
39 * 1. Redistributions of source code must retain the above copyright
40 * notice, this list of conditions and the following disclaimer.
41 * 2. Redistributions in binary form must reproduce at minimum a disclaimer
42 * substantially similar to the "NO WARRANTY" disclaimer below
43 * ("Disclaimer") and any redistribution must be conditioned upon including
44 * a substantially similar Disclaimer requirement for further binary
45 * redistribution.
46 * 3. Neither the names of the above listed copyright holders nor the names
47 * of any contributors may be used to endorse or promote products derived
48 * from this software without specific prior written permission.
49 *
50 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
51 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
52 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
53 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
54 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
55 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
56 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
57 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
58 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
59 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF THE COPYRIGHT
60 * OWNER OR CONTRIBUTOR IS ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
61 *
62 * Support from Chris Ellsworth in order to make SAS adapters work
63 * is gratefully acknowledged.
64 *
65 * Support from LSI-Logic has also gone a great deal toward making this a
66 * workable subsystem and is gratefully acknowledged.
67 */
68/*
69 * Copyright (c) 2004, Avid Technology, Inc. and its contributors.
70 * Copyright (c) 2005, WHEEL Sp. z o.o.
71 * Copyright (c) 2004, 2005 Justin T. Gibbs
72 * All rights reserved.
73 *
74 * Redistribution and use in source and binary forms, with or without
75 * modification, are permitted provided that the following conditions are
76 * met:
77 * 1. Redistributions of source code must retain the above copyright
78 * notice, this list of conditions and the following disclaimer.
79 * 2. Redistributions in binary form must reproduce at minimum a disclaimer
80 * substantially similar to the "NO WARRANTY" disclaimer below
81 * ("Disclaimer") and any redistribution must be conditioned upon including
82 * a substantially similar Disclaimer requirement for further binary
83 * redistribution.
84 * 3. Neither the names of the above listed copyright holders nor the names
85 * of any contributors may be used to endorse or promote products derived
86 * from this software without specific prior written permission.
87 *
88 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
89 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
90 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
91 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
92 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
93 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
94 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
95 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
96 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
97 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF THE COPYRIGHT
98 * OWNER OR CONTRIBUTOR IS ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
99 */
100
101#include <sys/cdefs.h>
|
103
104#include <dev/mpt/mpt.h>
105#include <dev/mpt/mpt_cam.h>
106#include <dev/mpt/mpt_raid.h>
107
108
109#ifndef PCI_VENDOR_LSI
110#define PCI_VENDOR_LSI 0x1000
111#endif
112
113#ifndef PCI_PRODUCT_LSI_FC909
114#define PCI_PRODUCT_LSI_FC909 0x0620
115#endif
116
117#ifndef PCI_PRODUCT_LSI_FC909A
118#define PCI_PRODUCT_LSI_FC909A 0x0621
119#endif
120
121#ifndef PCI_PRODUCT_LSI_FC919
122#define PCI_PRODUCT_LSI_FC919 0x0624
123#endif
124
125#ifndef PCI_PRODUCT_LSI_FC929
126#define PCI_PRODUCT_LSI_FC929 0x0622
127#endif
128
129#ifndef PCI_PRODUCT_LSI_FC929X
130#define PCI_PRODUCT_LSI_FC929X 0x0626
131#endif
132
133#ifndef PCI_PRODUCT_LSI_FC919X
134#define PCI_PRODUCT_LSI_FC919X 0x0628
135#endif
136
137#ifndef PCI_PRODUCT_LSI_FC7X04X
138#define PCI_PRODUCT_LSI_FC7X04X 0x0640
139#endif
140
141#ifndef PCI_PRODUCT_LSI_1030
142#define PCI_PRODUCT_LSI_1030 0x0030
143#endif
144
145#ifndef PCI_PRODUCT_LSI_SAS1064
146#define PCI_PRODUCT_LSI_SAS1064 0x0050
147#endif
148
149#ifndef PCI_PRODUCT_LSI_SAS1064A
150#define PCI_PRODUCT_LSI_SAS1064A 0x005C
151#endif
152
153#ifndef PCI_PRODUCT_LSI_SAS1064E
154#define PCI_PRODUCT_LSI_SAS1064E 0x0056
155#endif
156
157#ifndef PCI_PRODUCT_LSI_SAS1066
158#define PCI_PRODUCT_LSI_SAS1066 0x005E
159#endif
160
161#ifndef PCI_PRODUCT_LSI_SAS1066E
162#define PCI_PRODUCT_LSI_SAS1066E 0x005A
163#endif
164
165#ifndef PCI_PRODUCT_LSI_SAS1068
166#define PCI_PRODUCT_LSI_SAS1068 0x0054
167#endif
168
169#ifndef PCI_PRODUCT_LSI_SAS1068E
170#define PCI_PRODUCT_LSI_SAS1068E 0x0058
171#endif
172
173#ifndef PCI_PRODUCT_LSI_SAS1078
174#define PCI_PRODUCT_LSI_SAS1078 0x0060
175#endif
176
177#ifndef PCIM_CMD_SERRESPEN
178#define PCIM_CMD_SERRESPEN 0x0100
179#endif
180
181
182#define MPT_IO_BAR 0
183#define MPT_MEM_BAR 1
184
185static int mpt_pci_probe(device_t);
186static int mpt_pci_attach(device_t);
187static void mpt_free_bus_resources(struct mpt_softc *mpt);
188static int mpt_pci_detach(device_t);
189static int mpt_pci_shutdown(device_t);
190static int mpt_dma_mem_alloc(struct mpt_softc *mpt);
191static void mpt_dma_mem_free(struct mpt_softc *mpt);
192static void mpt_read_config_regs(struct mpt_softc *mpt);
193static void mpt_pci_intr(void *);
194
195static device_method_t mpt_methods[] = {
196 /* Device interface */
197 DEVMETHOD(device_probe, mpt_pci_probe),
198 DEVMETHOD(device_attach, mpt_pci_attach),
199 DEVMETHOD(device_detach, mpt_pci_detach),
200 DEVMETHOD(device_shutdown, mpt_pci_shutdown),
201 { 0, 0 }
202};
203
204static driver_t mpt_driver = {
205 "mpt", mpt_methods, sizeof(struct mpt_softc)
206};
207static devclass_t mpt_devclass;
208DRIVER_MODULE(mpt, pci, mpt_driver, mpt_devclass, 0, 0);
209MODULE_VERSION(mpt, 1);
210
211static int
212mpt_pci_probe(device_t dev)
213{
214 char *desc;
215
216 if (pci_get_vendor(dev) != PCI_VENDOR_LSI)
217 return (ENXIO);
218
219 switch ((pci_get_device(dev) & ~1)) {
220 case PCI_PRODUCT_LSI_FC909:
221 desc = "LSILogic FC909 FC Adapter";
222 break;
223 case PCI_PRODUCT_LSI_FC909A:
224 desc = "LSILogic FC909A FC Adapter";
225 break;
226 case PCI_PRODUCT_LSI_FC919:
227 desc = "LSILogic FC919 FC Adapter";
228 break;
229 case PCI_PRODUCT_LSI_FC929:
230 desc = "LSILogic FC929 FC Adapter";
231 break;
232 case PCI_PRODUCT_LSI_FC919X:
233 desc = "LSILogic FC919X FC Adapter";
234 break;
235 case PCI_PRODUCT_LSI_FC929X:
236 desc = "LSILogic FC929X 2Gb/s FC Adapter";
237 break;
238 case PCI_PRODUCT_LSI_FC7X04X:
239 desc = "LSILogic FC7X04X 4Gb/s FC Adapter";
240 break;
241 case PCI_PRODUCT_LSI_1030:
242 desc = "LSILogic 1030 Ultra4 Adapter";
243 break;
244 case PCI_PRODUCT_LSI_SAS1064:
245 case PCI_PRODUCT_LSI_SAS1064A:
246 case PCI_PRODUCT_LSI_SAS1064E:
247 case PCI_PRODUCT_LSI_SAS1066:
248 case PCI_PRODUCT_LSI_SAS1066E:
249 case PCI_PRODUCT_LSI_SAS1068:
250 case PCI_PRODUCT_LSI_SAS1068E:
251 case PCI_PRODUCT_LSI_SAS1078:
252 desc = "LSILogic SAS Adapter";
253 break;
254 default:
255 return (ENXIO);
256 }
257
258 device_set_desc(dev, desc);
259 return (0);
260}
261
262#if __FreeBSD_version < 500000
263static void
264mpt_set_options(struct mpt_softc *mpt)
265{
266 int bitmap;
267
268 bitmap = 0;
269 if (getenv_int("mpt_disable", &bitmap)) {
270 if (bitmap & (1 << mpt->unit)) {
271 mpt->disabled = 1;
272 }
273 }
274 bitmap = 0;
275 if (getenv_int("mpt_debug", &bitmap)) {
276 if (bitmap & (1 << mpt->unit)) {
277 mpt->verbose = MPT_PRT_DEBUG;
278 }
279 }
280 bitmap = 0;
281 if (getenv_int("mpt_debug1", &bitmap)) {
282 if (bitmap & (1 << mpt->unit)) {
283 mpt->verbose = MPT_PRT_DEBUG1;
284 }
285 }
286 bitmap = 0;
287 if (getenv_int("mpt_debug2", &bitmap)) {
288 if (bitmap & (1 << mpt->unit)) {
289 mpt->verbose = MPT_PRT_DEBUG2;
290 }
291 }
292 bitmap = 0;
293 if (getenv_int("mpt_debug3", &bitmap)) {
294 if (bitmap & (1 << mpt->unit)) {
295 mpt->verbose = MPT_PRT_DEBUG3;
296 }
297 }
298}
299#else
300static void
301mpt_set_options(struct mpt_softc *mpt)
302{
303 int tval;
304
305 tval = 0;
306 if (resource_int_value(device_get_name(mpt->dev),
307 device_get_unit(mpt->dev), "disable", &tval) == 0 && tval != 0) {
308 mpt->disabled = 1;
309 }
310 tval = 0;
311 if (resource_int_value(device_get_name(mpt->dev),
312 device_get_unit(mpt->dev), "debug", &tval) == 0 && tval != 0) {
313 mpt->verbose = tval;
314 }
315 tval = 0;
316 if (resource_int_value(device_get_name(mpt->dev),
317 device_get_unit(mpt->dev), "role", &tval) == 0 && tval != 0 &&
318 tval <= 3) {
319 mpt->role = tval;
320 }
321}
322#endif
323
324
325static void
326mpt_link_peer(struct mpt_softc *mpt)
327{
328 struct mpt_softc *mpt2;
329
330 if (mpt->unit == 0) {
331 return;
332 }
333 /*
334 * XXX: depends on probe order
335 */
336 mpt2 = (struct mpt_softc *)devclass_get_softc(mpt_devclass,mpt->unit-1);
337
338 if (mpt2 == NULL) {
339 return;
340 }
341 if (pci_get_vendor(mpt2->dev) != pci_get_vendor(mpt->dev)) {
342 return;
343 }
344 if (pci_get_device(mpt2->dev) != pci_get_device(mpt->dev)) {
345 return;
346 }
347 mpt->mpt2 = mpt2;
348 mpt2->mpt2 = mpt;
349 if (mpt->verbose >= MPT_PRT_DEBUG) {
350 mpt_prt(mpt, "linking with peer (mpt%d)\n",
351 device_get_unit(mpt2->dev));
352 }
353}
354
355static void
356mpt_unlink_peer(struct mpt_softc *mpt)
357{
358 if (mpt->mpt2) {
359 mpt->mpt2->mpt2 = NULL;
360 }
361}
362
363
364static int
365mpt_pci_attach(device_t dev)
366{
367 struct mpt_softc *mpt;
368 int iqd;
369 uint32_t data, cmd;
370
371 /* Allocate the softc structure */
372 mpt = (struct mpt_softc*)device_get_softc(dev);
373 if (mpt == NULL) {
374 device_printf(dev, "cannot allocate softc\n");
375 return (ENOMEM);
376 }
377 memset(mpt, 0, sizeof(struct mpt_softc));
378 switch ((pci_get_device(dev) & ~1)) {
379 case PCI_PRODUCT_LSI_FC909:
380 case PCI_PRODUCT_LSI_FC909A:
381 case PCI_PRODUCT_LSI_FC919:
382 case PCI_PRODUCT_LSI_FC929:
383 case PCI_PRODUCT_LSI_FC919X:
384 case PCI_PRODUCT_LSI_FC7X04X:
385 mpt->is_fc = 1;
386 break;
387 case PCI_PRODUCT_LSI_SAS1064:
388 case PCI_PRODUCT_LSI_SAS1064A:
389 case PCI_PRODUCT_LSI_SAS1064E:
390 case PCI_PRODUCT_LSI_SAS1066:
391 case PCI_PRODUCT_LSI_SAS1066E:
392 case PCI_PRODUCT_LSI_SAS1068:
393 case PCI_PRODUCT_LSI_SAS1068E:
394 case PCI_PRODUCT_LSI_SAS1078:
395 mpt->is_sas = 1;
396 break;
397 default:
398 mpt->is_spi = 1;
399 break;
400 }
401 mpt->dev = dev;
402 mpt->unit = device_get_unit(dev);
403 mpt->raid_resync_rate = MPT_RAID_RESYNC_RATE_DEFAULT;
404 mpt->raid_mwce_setting = MPT_RAID_MWCE_DEFAULT;
405 mpt->raid_queue_depth = MPT_RAID_QUEUE_DEPTH_DEFAULT;
406 mpt->verbose = MPT_PRT_NONE;
407 mpt->role = MPT_ROLE_NONE;
408 mpt_set_options(mpt);
409 if (mpt->verbose == MPT_PRT_NONE) {
410 mpt->verbose = MPT_PRT_WARN;
411 /* Print INFO level (if any) if bootverbose is set */
412 mpt->verbose += (bootverbose != 0)? 1 : 0;
413 }
414 /* Make sure memory access decoders are enabled */
415 cmd = pci_read_config(dev, PCIR_COMMAND, 2);
416 if ((cmd & PCIM_CMD_MEMEN) == 0) {
417 device_printf(dev, "Memory accesses disabled");
418 return (ENXIO);
419 }
420
421 /*
422 * Make sure that SERR, PERR, WRITE INVALIDATE and BUSMASTER are set.
423 */
424 cmd |=
425 PCIM_CMD_SERRESPEN | PCIM_CMD_PERRESPEN |
426 PCIM_CMD_BUSMASTEREN | PCIM_CMD_MWRICEN;
427 pci_write_config(dev, PCIR_COMMAND, cmd, 2);
428
429 /*
430 * Make sure we've disabled the ROM.
431 */
432 data = pci_read_config(dev, PCIR_BIOS, 4);
433 data &= ~1;
434 pci_write_config(dev, PCIR_BIOS, data, 4);
435
436 /*
437 * Is this part a dual?
438 * If so, link with our partner (around yet)
439 */
440 if ((pci_get_device(dev) & ~1) == PCI_PRODUCT_LSI_FC929 ||
441 (pci_get_device(dev) & ~1) == PCI_PRODUCT_LSI_FC7X04X ||
442 (pci_get_device(dev) & ~1) == PCI_PRODUCT_LSI_1030) {
443 mpt_link_peer(mpt);
444 }
445
446 /*
447 * Set up register access. PIO mode is required for
448 * certain reset operations (but must be disabled for
449 * some cards otherwise).
450 */
451 mpt->pci_pio_rid = PCIR_BAR(MPT_IO_BAR);
452 mpt->pci_pio_reg = bus_alloc_resource(dev, SYS_RES_IOPORT,
453 &mpt->pci_pio_rid, 0, ~0, 0, RF_ACTIVE);
454 if (mpt->pci_pio_reg == NULL) {
455 device_printf(dev, "unable to map registers in PIO mode\n");
456 goto bad;
457 }
458 mpt->pci_pio_st = rman_get_bustag(mpt->pci_pio_reg);
459 mpt->pci_pio_sh = rman_get_bushandle(mpt->pci_pio_reg);
460
461 /* Allocate kernel virtual memory for the 9x9's Mem0 region */
462 mpt->pci_mem_rid = PCIR_BAR(MPT_MEM_BAR);
463 mpt->pci_reg = bus_alloc_resource(dev, SYS_RES_MEMORY,
464 &mpt->pci_mem_rid, 0, ~0, 0, RF_ACTIVE);
465 if (mpt->pci_reg == NULL) {
466 device_printf(dev, "Unable to memory map registers.\n");
467 if (mpt->is_sas) {
468 device_printf(dev, "Giving Up.\n");
469 goto bad;
470 }
471 device_printf(dev, "Falling back to PIO mode.\n");
472 mpt->pci_st = mpt->pci_pio_st;
473 mpt->pci_sh = mpt->pci_pio_sh;
474 } else {
475 mpt->pci_st = rman_get_bustag(mpt->pci_reg);
476 mpt->pci_sh = rman_get_bushandle(mpt->pci_reg);
477 }
478
479 /* Get a handle to the interrupt */
480 iqd = 0;
481#if __FreeBSD_version < 500000
482 mpt->pci_irq = bus_alloc_resource(dev, SYS_RES_IRQ, &iqd, 0, ~0, 1,
483 RF_ACTIVE | RF_SHAREABLE);
484#else
485 mpt->pci_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &iqd,
486 RF_ACTIVE | RF_SHAREABLE);
487#endif
488 if (mpt->pci_irq == NULL) {
489 device_printf(dev, "could not allocate interrupt\n");
490 goto bad;
491 }
492
493 MPT_LOCK_SETUP(mpt);
494
495 /* Disable interrupts at the part */
496 mpt_disable_ints(mpt);
497
498 /* Register the interrupt handler */
499 if (bus_setup_intr(dev, mpt->pci_irq, MPT_IFLAGS, mpt_pci_intr,
500 mpt, &mpt->ih)) {
501 device_printf(dev, "could not setup interrupt\n");
502 goto bad;
503 }
504
505 /* Allocate dma memory */
506/* XXX JGibbs -Should really be done based on IOCFacts. */
507 if (mpt_dma_mem_alloc(mpt)) {
508 mpt_prt(mpt, "Could not allocate DMA memory\n");
509 goto bad;
510 }
511
512 /*
513 * Save the PCI config register values
514 *
515 * Hard resets are known to screw up the BAR for diagnostic
516 * memory accesses (Mem1).
517 *
518 * Using Mem1 is known to make the chip stop responding to
519 * configuration space transfers, so we need to save it now
520 */
521
522 mpt_read_config_regs(mpt);
523
524 /*
525 * Disable PIO until we need it
526 */
| 103
104#include <dev/mpt/mpt.h>
105#include <dev/mpt/mpt_cam.h>
106#include <dev/mpt/mpt_raid.h>
107
108
109#ifndef PCI_VENDOR_LSI
110#define PCI_VENDOR_LSI 0x1000
111#endif
112
113#ifndef PCI_PRODUCT_LSI_FC909
114#define PCI_PRODUCT_LSI_FC909 0x0620
115#endif
116
117#ifndef PCI_PRODUCT_LSI_FC909A
118#define PCI_PRODUCT_LSI_FC909A 0x0621
119#endif
120
121#ifndef PCI_PRODUCT_LSI_FC919
122#define PCI_PRODUCT_LSI_FC919 0x0624
123#endif
124
125#ifndef PCI_PRODUCT_LSI_FC929
126#define PCI_PRODUCT_LSI_FC929 0x0622
127#endif
128
129#ifndef PCI_PRODUCT_LSI_FC929X
130#define PCI_PRODUCT_LSI_FC929X 0x0626
131#endif
132
133#ifndef PCI_PRODUCT_LSI_FC919X
134#define PCI_PRODUCT_LSI_FC919X 0x0628
135#endif
136
137#ifndef PCI_PRODUCT_LSI_FC7X04X
138#define PCI_PRODUCT_LSI_FC7X04X 0x0640
139#endif
140
141#ifndef PCI_PRODUCT_LSI_1030
142#define PCI_PRODUCT_LSI_1030 0x0030
143#endif
144
145#ifndef PCI_PRODUCT_LSI_SAS1064
146#define PCI_PRODUCT_LSI_SAS1064 0x0050
147#endif
148
149#ifndef PCI_PRODUCT_LSI_SAS1064A
150#define PCI_PRODUCT_LSI_SAS1064A 0x005C
151#endif
152
153#ifndef PCI_PRODUCT_LSI_SAS1064E
154#define PCI_PRODUCT_LSI_SAS1064E 0x0056
155#endif
156
157#ifndef PCI_PRODUCT_LSI_SAS1066
158#define PCI_PRODUCT_LSI_SAS1066 0x005E
159#endif
160
161#ifndef PCI_PRODUCT_LSI_SAS1066E
162#define PCI_PRODUCT_LSI_SAS1066E 0x005A
163#endif
164
165#ifndef PCI_PRODUCT_LSI_SAS1068
166#define PCI_PRODUCT_LSI_SAS1068 0x0054
167#endif
168
169#ifndef PCI_PRODUCT_LSI_SAS1068E
170#define PCI_PRODUCT_LSI_SAS1068E 0x0058
171#endif
172
173#ifndef PCI_PRODUCT_LSI_SAS1078
174#define PCI_PRODUCT_LSI_SAS1078 0x0060
175#endif
176
177#ifndef PCIM_CMD_SERRESPEN
178#define PCIM_CMD_SERRESPEN 0x0100
179#endif
180
181
182#define MPT_IO_BAR 0
183#define MPT_MEM_BAR 1
184
185static int mpt_pci_probe(device_t);
186static int mpt_pci_attach(device_t);
187static void mpt_free_bus_resources(struct mpt_softc *mpt);
188static int mpt_pci_detach(device_t);
189static int mpt_pci_shutdown(device_t);
190static int mpt_dma_mem_alloc(struct mpt_softc *mpt);
191static void mpt_dma_mem_free(struct mpt_softc *mpt);
192static void mpt_read_config_regs(struct mpt_softc *mpt);
193static void mpt_pci_intr(void *);
194
195static device_method_t mpt_methods[] = {
196 /* Device interface */
197 DEVMETHOD(device_probe, mpt_pci_probe),
198 DEVMETHOD(device_attach, mpt_pci_attach),
199 DEVMETHOD(device_detach, mpt_pci_detach),
200 DEVMETHOD(device_shutdown, mpt_pci_shutdown),
201 { 0, 0 }
202};
203
204static driver_t mpt_driver = {
205 "mpt", mpt_methods, sizeof(struct mpt_softc)
206};
207static devclass_t mpt_devclass;
208DRIVER_MODULE(mpt, pci, mpt_driver, mpt_devclass, 0, 0);
209MODULE_VERSION(mpt, 1);
210
211static int
212mpt_pci_probe(device_t dev)
213{
214 char *desc;
215
216 if (pci_get_vendor(dev) != PCI_VENDOR_LSI)
217 return (ENXIO);
218
219 switch ((pci_get_device(dev) & ~1)) {
220 case PCI_PRODUCT_LSI_FC909:
221 desc = "LSILogic FC909 FC Adapter";
222 break;
223 case PCI_PRODUCT_LSI_FC909A:
224 desc = "LSILogic FC909A FC Adapter";
225 break;
226 case PCI_PRODUCT_LSI_FC919:
227 desc = "LSILogic FC919 FC Adapter";
228 break;
229 case PCI_PRODUCT_LSI_FC929:
230 desc = "LSILogic FC929 FC Adapter";
231 break;
232 case PCI_PRODUCT_LSI_FC919X:
233 desc = "LSILogic FC919X FC Adapter";
234 break;
235 case PCI_PRODUCT_LSI_FC929X:
236 desc = "LSILogic FC929X 2Gb/s FC Adapter";
237 break;
238 case PCI_PRODUCT_LSI_FC7X04X:
239 desc = "LSILogic FC7X04X 4Gb/s FC Adapter";
240 break;
241 case PCI_PRODUCT_LSI_1030:
242 desc = "LSILogic 1030 Ultra4 Adapter";
243 break;
244 case PCI_PRODUCT_LSI_SAS1064:
245 case PCI_PRODUCT_LSI_SAS1064A:
246 case PCI_PRODUCT_LSI_SAS1064E:
247 case PCI_PRODUCT_LSI_SAS1066:
248 case PCI_PRODUCT_LSI_SAS1066E:
249 case PCI_PRODUCT_LSI_SAS1068:
250 case PCI_PRODUCT_LSI_SAS1068E:
251 case PCI_PRODUCT_LSI_SAS1078:
252 desc = "LSILogic SAS Adapter";
253 break;
254 default:
255 return (ENXIO);
256 }
257
258 device_set_desc(dev, desc);
259 return (0);
260}
261
262#if __FreeBSD_version < 500000
263static void
264mpt_set_options(struct mpt_softc *mpt)
265{
266 int bitmap;
267
268 bitmap = 0;
269 if (getenv_int("mpt_disable", &bitmap)) {
270 if (bitmap & (1 << mpt->unit)) {
271 mpt->disabled = 1;
272 }
273 }
274 bitmap = 0;
275 if (getenv_int("mpt_debug", &bitmap)) {
276 if (bitmap & (1 << mpt->unit)) {
277 mpt->verbose = MPT_PRT_DEBUG;
278 }
279 }
280 bitmap = 0;
281 if (getenv_int("mpt_debug1", &bitmap)) {
282 if (bitmap & (1 << mpt->unit)) {
283 mpt->verbose = MPT_PRT_DEBUG1;
284 }
285 }
286 bitmap = 0;
287 if (getenv_int("mpt_debug2", &bitmap)) {
288 if (bitmap & (1 << mpt->unit)) {
289 mpt->verbose = MPT_PRT_DEBUG2;
290 }
291 }
292 bitmap = 0;
293 if (getenv_int("mpt_debug3", &bitmap)) {
294 if (bitmap & (1 << mpt->unit)) {
295 mpt->verbose = MPT_PRT_DEBUG3;
296 }
297 }
298}
299#else
300static void
301mpt_set_options(struct mpt_softc *mpt)
302{
303 int tval;
304
305 tval = 0;
306 if (resource_int_value(device_get_name(mpt->dev),
307 device_get_unit(mpt->dev), "disable", &tval) == 0 && tval != 0) {
308 mpt->disabled = 1;
309 }
310 tval = 0;
311 if (resource_int_value(device_get_name(mpt->dev),
312 device_get_unit(mpt->dev), "debug", &tval) == 0 && tval != 0) {
313 mpt->verbose = tval;
314 }
315 tval = 0;
316 if (resource_int_value(device_get_name(mpt->dev),
317 device_get_unit(mpt->dev), "role", &tval) == 0 && tval != 0 &&
318 tval <= 3) {
319 mpt->role = tval;
320 }
321}
322#endif
323
324
325static void
326mpt_link_peer(struct mpt_softc *mpt)
327{
328 struct mpt_softc *mpt2;
329
330 if (mpt->unit == 0) {
331 return;
332 }
333 /*
334 * XXX: depends on probe order
335 */
336 mpt2 = (struct mpt_softc *)devclass_get_softc(mpt_devclass,mpt->unit-1);
337
338 if (mpt2 == NULL) {
339 return;
340 }
341 if (pci_get_vendor(mpt2->dev) != pci_get_vendor(mpt->dev)) {
342 return;
343 }
344 if (pci_get_device(mpt2->dev) != pci_get_device(mpt->dev)) {
345 return;
346 }
347 mpt->mpt2 = mpt2;
348 mpt2->mpt2 = mpt;
349 if (mpt->verbose >= MPT_PRT_DEBUG) {
350 mpt_prt(mpt, "linking with peer (mpt%d)\n",
351 device_get_unit(mpt2->dev));
352 }
353}
354
355static void
356mpt_unlink_peer(struct mpt_softc *mpt)
357{
358 if (mpt->mpt2) {
359 mpt->mpt2->mpt2 = NULL;
360 }
361}
362
363
364static int
365mpt_pci_attach(device_t dev)
366{
367 struct mpt_softc *mpt;
368 int iqd;
369 uint32_t data, cmd;
370
371 /* Allocate the softc structure */
372 mpt = (struct mpt_softc*)device_get_softc(dev);
373 if (mpt == NULL) {
374 device_printf(dev, "cannot allocate softc\n");
375 return (ENOMEM);
376 }
377 memset(mpt, 0, sizeof(struct mpt_softc));
378 switch ((pci_get_device(dev) & ~1)) {
379 case PCI_PRODUCT_LSI_FC909:
380 case PCI_PRODUCT_LSI_FC909A:
381 case PCI_PRODUCT_LSI_FC919:
382 case PCI_PRODUCT_LSI_FC929:
383 case PCI_PRODUCT_LSI_FC919X:
384 case PCI_PRODUCT_LSI_FC7X04X:
385 mpt->is_fc = 1;
386 break;
387 case PCI_PRODUCT_LSI_SAS1064:
388 case PCI_PRODUCT_LSI_SAS1064A:
389 case PCI_PRODUCT_LSI_SAS1064E:
390 case PCI_PRODUCT_LSI_SAS1066:
391 case PCI_PRODUCT_LSI_SAS1066E:
392 case PCI_PRODUCT_LSI_SAS1068:
393 case PCI_PRODUCT_LSI_SAS1068E:
394 case PCI_PRODUCT_LSI_SAS1078:
395 mpt->is_sas = 1;
396 break;
397 default:
398 mpt->is_spi = 1;
399 break;
400 }
401 mpt->dev = dev;
402 mpt->unit = device_get_unit(dev);
403 mpt->raid_resync_rate = MPT_RAID_RESYNC_RATE_DEFAULT;
404 mpt->raid_mwce_setting = MPT_RAID_MWCE_DEFAULT;
405 mpt->raid_queue_depth = MPT_RAID_QUEUE_DEPTH_DEFAULT;
406 mpt->verbose = MPT_PRT_NONE;
407 mpt->role = MPT_ROLE_NONE;
408 mpt_set_options(mpt);
409 if (mpt->verbose == MPT_PRT_NONE) {
410 mpt->verbose = MPT_PRT_WARN;
411 /* Print INFO level (if any) if bootverbose is set */
412 mpt->verbose += (bootverbose != 0)? 1 : 0;
413 }
414 /* Make sure memory access decoders are enabled */
415 cmd = pci_read_config(dev, PCIR_COMMAND, 2);
416 if ((cmd & PCIM_CMD_MEMEN) == 0) {
417 device_printf(dev, "Memory accesses disabled");
418 return (ENXIO);
419 }
420
421 /*
422 * Make sure that SERR, PERR, WRITE INVALIDATE and BUSMASTER are set.
423 */
424 cmd |=
425 PCIM_CMD_SERRESPEN | PCIM_CMD_PERRESPEN |
426 PCIM_CMD_BUSMASTEREN | PCIM_CMD_MWRICEN;
427 pci_write_config(dev, PCIR_COMMAND, cmd, 2);
428
429 /*
430 * Make sure we've disabled the ROM.
431 */
432 data = pci_read_config(dev, PCIR_BIOS, 4);
433 data &= ~1;
434 pci_write_config(dev, PCIR_BIOS, data, 4);
435
436 /*
437 * Is this part a dual?
438 * If so, link with our partner (around yet)
439 */
440 if ((pci_get_device(dev) & ~1) == PCI_PRODUCT_LSI_FC929 ||
441 (pci_get_device(dev) & ~1) == PCI_PRODUCT_LSI_FC7X04X ||
442 (pci_get_device(dev) & ~1) == PCI_PRODUCT_LSI_1030) {
443 mpt_link_peer(mpt);
444 }
445
446 /*
447 * Set up register access. PIO mode is required for
448 * certain reset operations (but must be disabled for
449 * some cards otherwise).
450 */
451 mpt->pci_pio_rid = PCIR_BAR(MPT_IO_BAR);
452 mpt->pci_pio_reg = bus_alloc_resource(dev, SYS_RES_IOPORT,
453 &mpt->pci_pio_rid, 0, ~0, 0, RF_ACTIVE);
454 if (mpt->pci_pio_reg == NULL) {
455 device_printf(dev, "unable to map registers in PIO mode\n");
456 goto bad;
457 }
458 mpt->pci_pio_st = rman_get_bustag(mpt->pci_pio_reg);
459 mpt->pci_pio_sh = rman_get_bushandle(mpt->pci_pio_reg);
460
461 /* Allocate kernel virtual memory for the 9x9's Mem0 region */
462 mpt->pci_mem_rid = PCIR_BAR(MPT_MEM_BAR);
463 mpt->pci_reg = bus_alloc_resource(dev, SYS_RES_MEMORY,
464 &mpt->pci_mem_rid, 0, ~0, 0, RF_ACTIVE);
465 if (mpt->pci_reg == NULL) {
466 device_printf(dev, "Unable to memory map registers.\n");
467 if (mpt->is_sas) {
468 device_printf(dev, "Giving Up.\n");
469 goto bad;
470 }
471 device_printf(dev, "Falling back to PIO mode.\n");
472 mpt->pci_st = mpt->pci_pio_st;
473 mpt->pci_sh = mpt->pci_pio_sh;
474 } else {
475 mpt->pci_st = rman_get_bustag(mpt->pci_reg);
476 mpt->pci_sh = rman_get_bushandle(mpt->pci_reg);
477 }
478
479 /* Get a handle to the interrupt */
480 iqd = 0;
481#if __FreeBSD_version < 500000
482 mpt->pci_irq = bus_alloc_resource(dev, SYS_RES_IRQ, &iqd, 0, ~0, 1,
483 RF_ACTIVE | RF_SHAREABLE);
484#else
485 mpt->pci_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &iqd,
486 RF_ACTIVE | RF_SHAREABLE);
487#endif
488 if (mpt->pci_irq == NULL) {
489 device_printf(dev, "could not allocate interrupt\n");
490 goto bad;
491 }
492
493 MPT_LOCK_SETUP(mpt);
494
495 /* Disable interrupts at the part */
496 mpt_disable_ints(mpt);
497
498 /* Register the interrupt handler */
499 if (bus_setup_intr(dev, mpt->pci_irq, MPT_IFLAGS, mpt_pci_intr,
500 mpt, &mpt->ih)) {
501 device_printf(dev, "could not setup interrupt\n");
502 goto bad;
503 }
504
505 /* Allocate dma memory */
506/* XXX JGibbs -Should really be done based on IOCFacts. */
507 if (mpt_dma_mem_alloc(mpt)) {
508 mpt_prt(mpt, "Could not allocate DMA memory\n");
509 goto bad;
510 }
511
512 /*
513 * Save the PCI config register values
514 *
515 * Hard resets are known to screw up the BAR for diagnostic
516 * memory accesses (Mem1).
517 *
518 * Using Mem1 is known to make the chip stop responding to
519 * configuration space transfers, so we need to save it now
520 */
521
522 mpt_read_config_regs(mpt);
523
524 /*
525 * Disable PIO until we need it
526 */
|
528
529 /* Initialize the hardware */
530 if (mpt->disabled == 0) {
531 MPT_LOCK(mpt);
532 if (mpt_attach(mpt) != 0) {
533 MPT_UNLOCK(mpt);
534 goto bad;
535 }
536 MPT_UNLOCK(mpt);
537 } else {
538 mpt_prt(mpt, "device disabled at user request\n");
539 goto bad;
540 }
541
542 mpt->eh = EVENTHANDLER_REGISTER(shutdown_post_sync, mpt_pci_shutdown,
543 dev, SHUTDOWN_PRI_DEFAULT);
544
545 if (mpt->eh == NULL) {
546 mpt_prt(mpt, "shutdown event registration failed\n");
547 MPT_LOCK(mpt);
548 (void) mpt_detach(mpt);
549 MPT_UNLOCK(mpt);
550 goto bad;
551 }
552 KASSERT(MPT_OWNED(mpt) == 0, ("leaving attach with device locked"));
553 return (0);
554
555bad:
556 mpt_dma_mem_free(mpt);
557 mpt_free_bus_resources(mpt);
558 mpt_unlink_peer(mpt);
559
560 MPT_LOCK_DESTROY(mpt);
561
562 /*
563 * but return zero to preserve unit numbering
564 */
565 return (0);
566}
567
568/*
569 * Free bus resources
570 */
571static void
572mpt_free_bus_resources(struct mpt_softc *mpt)
573{
574 if (mpt->ih) {
575 bus_teardown_intr(mpt->dev, mpt->pci_irq, mpt->ih);
576 mpt->ih = 0;
577 }
578
579 if (mpt->pci_irq) {
580 bus_release_resource(mpt->dev, SYS_RES_IRQ, 0, mpt->pci_irq);
581 mpt->pci_irq = 0;
582 }
583
584 if (mpt->pci_pio_reg) {
585 bus_release_resource(mpt->dev, SYS_RES_IOPORT, mpt->pci_pio_rid,
586 mpt->pci_pio_reg);
587 mpt->pci_pio_reg = 0;
588 }
589 if (mpt->pci_reg) {
590 bus_release_resource(mpt->dev, SYS_RES_MEMORY, mpt->pci_mem_rid,
591 mpt->pci_reg);
592 mpt->pci_reg = 0;
593 }
594 MPT_LOCK_DESTROY(mpt);
595}
596
597
598/*
599 * Disconnect ourselves from the system.
600 */
601static int
602mpt_pci_detach(device_t dev)
603{
604 struct mpt_softc *mpt;
605
606 mpt = (struct mpt_softc*)device_get_softc(dev);
607
608 if (mpt) {
609 MPT_LOCK(mpt);
610 mpt_disable_ints(mpt);
611 mpt_detach(mpt);
612 mpt_reset(mpt, /*reinit*/FALSE);
613 mpt_dma_mem_free(mpt);
614 mpt_free_bus_resources(mpt);
615 mpt_raid_free_mem(mpt);
616 if (mpt->eh != NULL) {
617 EVENTHANDLER_DEREGISTER(shutdown_final, mpt->eh);
618 }
619 MPT_UNLOCK(mpt);
620 }
621 return(0);
622}
623
624
625/*
626 * Disable the hardware
627 */
628static int
629mpt_pci_shutdown(device_t dev)
630{
631 struct mpt_softc *mpt;
632
633 mpt = (struct mpt_softc *)device_get_softc(dev);
634 if (mpt) {
635 int r;
636 MPT_LOCK(mpt);
637 r = mpt_shutdown(mpt);
638 MPT_UNLOCK(mpt);
639 return (r);
640 }
641 return(0);
642}
643
644static int
645mpt_dma_mem_alloc(struct mpt_softc *mpt)
646{
647 int i, error, nsegs;
648 uint8_t *vptr;
649 uint32_t pptr, end;
650 size_t len;
651 struct mpt_map_info mi;
652
653 /* Check if we alreay have allocated the reply memory */
654 if (mpt->reply_phys != 0) {
655 return 0;
656 }
657
658 len = sizeof (request_t) * MPT_MAX_REQUESTS(mpt);
659#ifdef RELENG_4
660 mpt->request_pool = (request_t *)malloc(len, M_DEVBUF, M_WAITOK);
661 if (mpt->request_pool == NULL) {
662 mpt_prt(mpt, "cannot allocate request pool\n");
663 return (1);
664 }
665 memset(mpt->request_pool, 0, len);
666#else
667 mpt->request_pool = (request_t *)malloc(len, M_DEVBUF, M_WAITOK|M_ZERO);
668 if (mpt->request_pool == NULL) {
669 mpt_prt(mpt, "cannot allocate request pool\n");
670 return (1);
671 }
672#endif
673
674 /*
675 * Create a parent dma tag for this device.
676 *
677 * Align at byte boundaries,
678 * Limit to 32-bit addressing for request/reply queues.
679 */
680 if (mpt_dma_tag_create(mpt, /*parent*/NULL, /*alignment*/1,
681 /*boundary*/0, /*lowaddr*/BUS_SPACE_MAXADDR,
682 /*highaddr*/BUS_SPACE_MAXADDR, /*filter*/NULL, /*filterarg*/NULL,
683 /*maxsize*/BUS_SPACE_MAXSIZE_32BIT,
684 /*nsegments*/BUS_SPACE_MAXSIZE_32BIT,
685 /*maxsegsz*/BUS_SPACE_UNRESTRICTED, /*flags*/0,
686 &mpt->parent_dmat) != 0) {
687 mpt_prt(mpt, "cannot create parent dma tag\n");
688 return (1);
689 }
690
691 /* Create a child tag for reply buffers */
692 if (mpt_dma_tag_create(mpt, mpt->parent_dmat, PAGE_SIZE, 0,
693 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR,
694 NULL, NULL, 2 * PAGE_SIZE, 1, BUS_SPACE_MAXSIZE_32BIT, 0,
695 &mpt->reply_dmat) != 0) {
696 mpt_prt(mpt, "cannot create a dma tag for replies\n");
697 return (1);
698 }
699
700 /* Allocate some DMA accessable memory for replies */
701 if (bus_dmamem_alloc(mpt->reply_dmat, (void **)&mpt->reply,
702 BUS_DMA_NOWAIT, &mpt->reply_dmap) != 0) {
703 mpt_prt(mpt, "cannot allocate %lu bytes of reply memory\n",
704 (u_long) (2 * PAGE_SIZE));
705 return (1);
706 }
707
708 mi.mpt = mpt;
709 mi.error = 0;
710
711 /* Load and lock it into "bus space" */
712 bus_dmamap_load(mpt->reply_dmat, mpt->reply_dmap, mpt->reply,
713 2 * PAGE_SIZE, mpt_map_rquest, &mi, 0);
714
715 if (mi.error) {
716 mpt_prt(mpt, "error %d loading dma map for DMA reply queue\n",
717 mi.error);
718 return (1);
719 }
720 mpt->reply_phys = mi.phys;
721
722 /* Create a child tag for data buffers */
723
724 /*
725 * XXX: we should say that nsegs is 'unrestricted, but that
726 * XXX: tickles a horrible bug in the busdma code. Instead,
727 * XXX: we'll derive a reasonable segment limit from MAXPHYS
728 */
729 nsegs = (MAXPHYS / PAGE_SIZE) + 1;
730 if (mpt_dma_tag_create(mpt, mpt->parent_dmat, 1,
731 0, BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR,
732 NULL, NULL, MAXBSIZE, nsegs, BUS_SPACE_MAXSIZE_32BIT, 0,
733 &mpt->buffer_dmat) != 0) {
734 mpt_prt(mpt, "cannot create a dma tag for data buffers\n");
735 return (1);
736 }
737
738 /* Create a child tag for request buffers */
739 if (mpt_dma_tag_create(mpt, mpt->parent_dmat, PAGE_SIZE, 0,
740 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR,
741 NULL, NULL, MPT_REQ_MEM_SIZE(mpt), 1, BUS_SPACE_MAXSIZE_32BIT, 0,
742 &mpt->request_dmat) != 0) {
743 mpt_prt(mpt, "cannot create a dma tag for requests\n");
744 return (1);
745 }
746
747 /* Allocate some DMA accessable memory for requests */
748 if (bus_dmamem_alloc(mpt->request_dmat, (void **)&mpt->request,
749 BUS_DMA_NOWAIT, &mpt->request_dmap) != 0) {
750 mpt_prt(mpt, "cannot allocate %d bytes of request memory\n",
751 MPT_REQ_MEM_SIZE(mpt));
752 return (1);
753 }
754
755 mi.mpt = mpt;
756 mi.error = 0;
757
758 /* Load and lock it into "bus space" */
759 bus_dmamap_load(mpt->request_dmat, mpt->request_dmap, mpt->request,
760 MPT_REQ_MEM_SIZE(mpt), mpt_map_rquest, &mi, 0);
761
762 if (mi.error) {
763 mpt_prt(mpt, "error %d loading dma map for DMA request queue\n",
764 mi.error);
765 return (1);
766 }
767 mpt->request_phys = mi.phys;
768
769 /*
770 * Now create per-request dma maps
771 */
772 i = 0;
773 pptr = mpt->request_phys;
774 vptr = mpt->request;
775 end = pptr + MPT_REQ_MEM_SIZE(mpt);
776 while(pptr < end) {
777 request_t *req = &mpt->request_pool[i];
778 req->index = i++;
779
780 /* Store location of Request Data */
781 req->req_pbuf = pptr;
782 req->req_vbuf = vptr;
783
784 pptr += MPT_REQUEST_AREA;
785 vptr += MPT_REQUEST_AREA;
786
787 req->sense_pbuf = (pptr - MPT_SENSE_SIZE);
788 req->sense_vbuf = (vptr - MPT_SENSE_SIZE);
789
790 error = bus_dmamap_create(mpt->buffer_dmat, 0, &req->dmap);
791 if (error) {
792 mpt_prt(mpt, "error %d creating per-cmd DMA maps\n",
793 error);
794 return (1);
795 }
796 }
797
798 return (0);
799}
800
801
802
803/* Deallocate memory that was allocated by mpt_dma_mem_alloc
804 */
805static void
806mpt_dma_mem_free(struct mpt_softc *mpt)
807{
808 int i;
809
810 /* Make sure we aren't double destroying */
811 if (mpt->reply_dmat == 0) {
812 mpt_lprt(mpt, MPT_PRT_DEBUG, "already released dma memory\n");
813 return;
814 }
815
816 for (i = 0; i < MPT_MAX_REQUESTS(mpt); i++) {
817 bus_dmamap_destroy(mpt->buffer_dmat, mpt->request_pool[i].dmap);
818 }
819 bus_dmamap_unload(mpt->request_dmat, mpt->request_dmap);
820 bus_dmamem_free(mpt->request_dmat, mpt->request, mpt->request_dmap);
821 bus_dma_tag_destroy(mpt->request_dmat);
822 bus_dma_tag_destroy(mpt->buffer_dmat);
823 bus_dmamap_unload(mpt->reply_dmat, mpt->reply_dmap);
824 bus_dmamem_free(mpt->reply_dmat, mpt->reply, mpt->reply_dmap);
825 bus_dma_tag_destroy(mpt->reply_dmat);
826 bus_dma_tag_destroy(mpt->parent_dmat);
827 mpt->reply_dmat = 0;
828 free(mpt->request_pool, M_DEVBUF);
829 mpt->request_pool = 0;
830
831}
832
833
834
835/* Reads modifiable (via PCI transactions) config registers */
836static void
837mpt_read_config_regs(struct mpt_softc *mpt)
838{
839 mpt->pci_cfg.Command = pci_read_config(mpt->dev, PCIR_COMMAND, 2);
840 mpt->pci_cfg.LatencyTimer_LineSize =
841 pci_read_config(mpt->dev, PCIR_CACHELNSZ, 2);
842 mpt->pci_cfg.IO_BAR = pci_read_config(mpt->dev, PCIR_BAR(0), 4);
843 mpt->pci_cfg.Mem0_BAR[0] = pci_read_config(mpt->dev, PCIR_BAR(1), 4);
844 mpt->pci_cfg.Mem0_BAR[1] = pci_read_config(mpt->dev, PCIR_BAR(2), 4);
845 mpt->pci_cfg.Mem1_BAR[0] = pci_read_config(mpt->dev, PCIR_BAR(3), 4);
846 mpt->pci_cfg.Mem1_BAR[1] = pci_read_config(mpt->dev, PCIR_BAR(4), 4);
847 mpt->pci_cfg.ROM_BAR = pci_read_config(mpt->dev, PCIR_BIOS, 4);
848 mpt->pci_cfg.IntLine = pci_read_config(mpt->dev, PCIR_INTLINE, 1);
849 mpt->pci_cfg.PMCSR = pci_read_config(mpt->dev, 0x44, 4);
850}
851
852/* Sets modifiable config registers */
853void
854mpt_set_config_regs(struct mpt_softc *mpt)
855{
856 uint32_t val;
857
858#define MPT_CHECK(reg, offset, size) \
859 val = pci_read_config(mpt->dev, offset, size); \
860 if (mpt->pci_cfg.reg != val) { \
861 mpt_prt(mpt, \
862 "Restoring " #reg " to 0x%X from 0x%X\n", \
863 mpt->pci_cfg.reg, val); \
864 }
865
866 if (mpt->verbose >= MPT_PRT_DEBUG) {
867 MPT_CHECK(Command, PCIR_COMMAND, 2);
868 MPT_CHECK(LatencyTimer_LineSize, PCIR_CACHELNSZ, 2);
869 MPT_CHECK(IO_BAR, PCIR_BAR(0), 4);
870 MPT_CHECK(Mem0_BAR[0], PCIR_BAR(1), 4);
871 MPT_CHECK(Mem0_BAR[1], PCIR_BAR(2), 4);
872 MPT_CHECK(Mem1_BAR[0], PCIR_BAR(3), 4);
873 MPT_CHECK(Mem1_BAR[1], PCIR_BAR(4), 4);
874 MPT_CHECK(ROM_BAR, PCIR_BIOS, 4);
875 MPT_CHECK(IntLine, PCIR_INTLINE, 1);
876 MPT_CHECK(PMCSR, 0x44, 4);
877 }
878#undef MPT_CHECK
879
880 pci_write_config(mpt->dev, PCIR_COMMAND, mpt->pci_cfg.Command, 2);
881 pci_write_config(mpt->dev, PCIR_CACHELNSZ,
882 mpt->pci_cfg.LatencyTimer_LineSize, 2);
883 pci_write_config(mpt->dev, PCIR_BAR(0), mpt->pci_cfg.IO_BAR, 4);
884 pci_write_config(mpt->dev, PCIR_BAR(1), mpt->pci_cfg.Mem0_BAR[0], 4);
885 pci_write_config(mpt->dev, PCIR_BAR(2), mpt->pci_cfg.Mem0_BAR[1], 4);
886 pci_write_config(mpt->dev, PCIR_BAR(3), mpt->pci_cfg.Mem1_BAR[0], 4);
887 pci_write_config(mpt->dev, PCIR_BAR(4), mpt->pci_cfg.Mem1_BAR[1], 4);
888 pci_write_config(mpt->dev, PCIR_BIOS, mpt->pci_cfg.ROM_BAR, 4);
889 pci_write_config(mpt->dev, PCIR_INTLINE, mpt->pci_cfg.IntLine, 1);
890 pci_write_config(mpt->dev, 0x44, mpt->pci_cfg.PMCSR, 4);
891}
892
893static void
894mpt_pci_intr(void *arg)
895{
896 struct mpt_softc *mpt;
897
898 mpt = (struct mpt_softc *)arg;
899 MPT_LOCK(mpt);
900 mpt_intr(mpt);
901 MPT_UNLOCK(mpt);
902}
| 530
531 /* Initialize the hardware */
532 if (mpt->disabled == 0) {
533 MPT_LOCK(mpt);
534 if (mpt_attach(mpt) != 0) {
535 MPT_UNLOCK(mpt);
536 goto bad;
537 }
538 MPT_UNLOCK(mpt);
539 } else {
540 mpt_prt(mpt, "device disabled at user request\n");
541 goto bad;
542 }
543
544 mpt->eh = EVENTHANDLER_REGISTER(shutdown_post_sync, mpt_pci_shutdown,
545 dev, SHUTDOWN_PRI_DEFAULT);
546
547 if (mpt->eh == NULL) {
548 mpt_prt(mpt, "shutdown event registration failed\n");
549 MPT_LOCK(mpt);
550 (void) mpt_detach(mpt);
551 MPT_UNLOCK(mpt);
552 goto bad;
553 }
554 KASSERT(MPT_OWNED(mpt) == 0, ("leaving attach with device locked"));
555 return (0);
556
557bad:
558 mpt_dma_mem_free(mpt);
559 mpt_free_bus_resources(mpt);
560 mpt_unlink_peer(mpt);
561
562 MPT_LOCK_DESTROY(mpt);
563
564 /*
565 * but return zero to preserve unit numbering
566 */
567 return (0);
568}
569
570/*
571 * Free bus resources
572 */
573static void
574mpt_free_bus_resources(struct mpt_softc *mpt)
575{
576 if (mpt->ih) {
577 bus_teardown_intr(mpt->dev, mpt->pci_irq, mpt->ih);
578 mpt->ih = 0;
579 }
580
581 if (mpt->pci_irq) {
582 bus_release_resource(mpt->dev, SYS_RES_IRQ, 0, mpt->pci_irq);
583 mpt->pci_irq = 0;
584 }
585
586 if (mpt->pci_pio_reg) {
587 bus_release_resource(mpt->dev, SYS_RES_IOPORT, mpt->pci_pio_rid,
588 mpt->pci_pio_reg);
589 mpt->pci_pio_reg = 0;
590 }
591 if (mpt->pci_reg) {
592 bus_release_resource(mpt->dev, SYS_RES_MEMORY, mpt->pci_mem_rid,
593 mpt->pci_reg);
594 mpt->pci_reg = 0;
595 }
596 MPT_LOCK_DESTROY(mpt);
597}
598
599
600/*
601 * Disconnect ourselves from the system.
602 */
603static int
604mpt_pci_detach(device_t dev)
605{
606 struct mpt_softc *mpt;
607
608 mpt = (struct mpt_softc*)device_get_softc(dev);
609
610 if (mpt) {
611 MPT_LOCK(mpt);
612 mpt_disable_ints(mpt);
613 mpt_detach(mpt);
614 mpt_reset(mpt, /*reinit*/FALSE);
615 mpt_dma_mem_free(mpt);
616 mpt_free_bus_resources(mpt);
617 mpt_raid_free_mem(mpt);
618 if (mpt->eh != NULL) {
619 EVENTHANDLER_DEREGISTER(shutdown_final, mpt->eh);
620 }
621 MPT_UNLOCK(mpt);
622 }
623 return(0);
624}
625
626
627/*
628 * Disable the hardware
629 */
630static int
631mpt_pci_shutdown(device_t dev)
632{
633 struct mpt_softc *mpt;
634
635 mpt = (struct mpt_softc *)device_get_softc(dev);
636 if (mpt) {
637 int r;
638 MPT_LOCK(mpt);
639 r = mpt_shutdown(mpt);
640 MPT_UNLOCK(mpt);
641 return (r);
642 }
643 return(0);
644}
645
646static int
647mpt_dma_mem_alloc(struct mpt_softc *mpt)
648{
649 int i, error, nsegs;
650 uint8_t *vptr;
651 uint32_t pptr, end;
652 size_t len;
653 struct mpt_map_info mi;
654
655 /* Check if we alreay have allocated the reply memory */
656 if (mpt->reply_phys != 0) {
657 return 0;
658 }
659
660 len = sizeof (request_t) * MPT_MAX_REQUESTS(mpt);
661#ifdef RELENG_4
662 mpt->request_pool = (request_t *)malloc(len, M_DEVBUF, M_WAITOK);
663 if (mpt->request_pool == NULL) {
664 mpt_prt(mpt, "cannot allocate request pool\n");
665 return (1);
666 }
667 memset(mpt->request_pool, 0, len);
668#else
669 mpt->request_pool = (request_t *)malloc(len, M_DEVBUF, M_WAITOK|M_ZERO);
670 if (mpt->request_pool == NULL) {
671 mpt_prt(mpt, "cannot allocate request pool\n");
672 return (1);
673 }
674#endif
675
676 /*
677 * Create a parent dma tag for this device.
678 *
679 * Align at byte boundaries,
680 * Limit to 32-bit addressing for request/reply queues.
681 */
682 if (mpt_dma_tag_create(mpt, /*parent*/NULL, /*alignment*/1,
683 /*boundary*/0, /*lowaddr*/BUS_SPACE_MAXADDR,
684 /*highaddr*/BUS_SPACE_MAXADDR, /*filter*/NULL, /*filterarg*/NULL,
685 /*maxsize*/BUS_SPACE_MAXSIZE_32BIT,
686 /*nsegments*/BUS_SPACE_MAXSIZE_32BIT,
687 /*maxsegsz*/BUS_SPACE_UNRESTRICTED, /*flags*/0,
688 &mpt->parent_dmat) != 0) {
689 mpt_prt(mpt, "cannot create parent dma tag\n");
690 return (1);
691 }
692
693 /* Create a child tag for reply buffers */
694 if (mpt_dma_tag_create(mpt, mpt->parent_dmat, PAGE_SIZE, 0,
695 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR,
696 NULL, NULL, 2 * PAGE_SIZE, 1, BUS_SPACE_MAXSIZE_32BIT, 0,
697 &mpt->reply_dmat) != 0) {
698 mpt_prt(mpt, "cannot create a dma tag for replies\n");
699 return (1);
700 }
701
702 /* Allocate some DMA accessable memory for replies */
703 if (bus_dmamem_alloc(mpt->reply_dmat, (void **)&mpt->reply,
704 BUS_DMA_NOWAIT, &mpt->reply_dmap) != 0) {
705 mpt_prt(mpt, "cannot allocate %lu bytes of reply memory\n",
706 (u_long) (2 * PAGE_SIZE));
707 return (1);
708 }
709
710 mi.mpt = mpt;
711 mi.error = 0;
712
713 /* Load and lock it into "bus space" */
714 bus_dmamap_load(mpt->reply_dmat, mpt->reply_dmap, mpt->reply,
715 2 * PAGE_SIZE, mpt_map_rquest, &mi, 0);
716
717 if (mi.error) {
718 mpt_prt(mpt, "error %d loading dma map for DMA reply queue\n",
719 mi.error);
720 return (1);
721 }
722 mpt->reply_phys = mi.phys;
723
724 /* Create a child tag for data buffers */
725
726 /*
727 * XXX: we should say that nsegs is 'unrestricted, but that
728 * XXX: tickles a horrible bug in the busdma code. Instead,
729 * XXX: we'll derive a reasonable segment limit from MAXPHYS
730 */
731 nsegs = (MAXPHYS / PAGE_SIZE) + 1;
732 if (mpt_dma_tag_create(mpt, mpt->parent_dmat, 1,
733 0, BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR,
734 NULL, NULL, MAXBSIZE, nsegs, BUS_SPACE_MAXSIZE_32BIT, 0,
735 &mpt->buffer_dmat) != 0) {
736 mpt_prt(mpt, "cannot create a dma tag for data buffers\n");
737 return (1);
738 }
739
740 /* Create a child tag for request buffers */
741 if (mpt_dma_tag_create(mpt, mpt->parent_dmat, PAGE_SIZE, 0,
742 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR,
743 NULL, NULL, MPT_REQ_MEM_SIZE(mpt), 1, BUS_SPACE_MAXSIZE_32BIT, 0,
744 &mpt->request_dmat) != 0) {
745 mpt_prt(mpt, "cannot create a dma tag for requests\n");
746 return (1);
747 }
748
749 /* Allocate some DMA accessable memory for requests */
750 if (bus_dmamem_alloc(mpt->request_dmat, (void **)&mpt->request,
751 BUS_DMA_NOWAIT, &mpt->request_dmap) != 0) {
752 mpt_prt(mpt, "cannot allocate %d bytes of request memory\n",
753 MPT_REQ_MEM_SIZE(mpt));
754 return (1);
755 }
756
757 mi.mpt = mpt;
758 mi.error = 0;
759
760 /* Load and lock it into "bus space" */
761 bus_dmamap_load(mpt->request_dmat, mpt->request_dmap, mpt->request,
762 MPT_REQ_MEM_SIZE(mpt), mpt_map_rquest, &mi, 0);
763
764 if (mi.error) {
765 mpt_prt(mpt, "error %d loading dma map for DMA request queue\n",
766 mi.error);
767 return (1);
768 }
769 mpt->request_phys = mi.phys;
770
771 /*
772 * Now create per-request dma maps
773 */
774 i = 0;
775 pptr = mpt->request_phys;
776 vptr = mpt->request;
777 end = pptr + MPT_REQ_MEM_SIZE(mpt);
778 while(pptr < end) {
779 request_t *req = &mpt->request_pool[i];
780 req->index = i++;
781
782 /* Store location of Request Data */
783 req->req_pbuf = pptr;
784 req->req_vbuf = vptr;
785
786 pptr += MPT_REQUEST_AREA;
787 vptr += MPT_REQUEST_AREA;
788
789 req->sense_pbuf = (pptr - MPT_SENSE_SIZE);
790 req->sense_vbuf = (vptr - MPT_SENSE_SIZE);
791
792 error = bus_dmamap_create(mpt->buffer_dmat, 0, &req->dmap);
793 if (error) {
794 mpt_prt(mpt, "error %d creating per-cmd DMA maps\n",
795 error);
796 return (1);
797 }
798 }
799
800 return (0);
801}
802
803
804
805/* Deallocate memory that was allocated by mpt_dma_mem_alloc
806 */
807static void
808mpt_dma_mem_free(struct mpt_softc *mpt)
809{
810 int i;
811
812 /* Make sure we aren't double destroying */
813 if (mpt->reply_dmat == 0) {
814 mpt_lprt(mpt, MPT_PRT_DEBUG, "already released dma memory\n");
815 return;
816 }
817
818 for (i = 0; i < MPT_MAX_REQUESTS(mpt); i++) {
819 bus_dmamap_destroy(mpt->buffer_dmat, mpt->request_pool[i].dmap);
820 }
821 bus_dmamap_unload(mpt->request_dmat, mpt->request_dmap);
822 bus_dmamem_free(mpt->request_dmat, mpt->request, mpt->request_dmap);
823 bus_dma_tag_destroy(mpt->request_dmat);
824 bus_dma_tag_destroy(mpt->buffer_dmat);
825 bus_dmamap_unload(mpt->reply_dmat, mpt->reply_dmap);
826 bus_dmamem_free(mpt->reply_dmat, mpt->reply, mpt->reply_dmap);
827 bus_dma_tag_destroy(mpt->reply_dmat);
828 bus_dma_tag_destroy(mpt->parent_dmat);
829 mpt->reply_dmat = 0;
830 free(mpt->request_pool, M_DEVBUF);
831 mpt->request_pool = 0;
832
833}
834
835
836
837/* Reads modifiable (via PCI transactions) config registers */
838static void
839mpt_read_config_regs(struct mpt_softc *mpt)
840{
841 mpt->pci_cfg.Command = pci_read_config(mpt->dev, PCIR_COMMAND, 2);
842 mpt->pci_cfg.LatencyTimer_LineSize =
843 pci_read_config(mpt->dev, PCIR_CACHELNSZ, 2);
844 mpt->pci_cfg.IO_BAR = pci_read_config(mpt->dev, PCIR_BAR(0), 4);
845 mpt->pci_cfg.Mem0_BAR[0] = pci_read_config(mpt->dev, PCIR_BAR(1), 4);
846 mpt->pci_cfg.Mem0_BAR[1] = pci_read_config(mpt->dev, PCIR_BAR(2), 4);
847 mpt->pci_cfg.Mem1_BAR[0] = pci_read_config(mpt->dev, PCIR_BAR(3), 4);
848 mpt->pci_cfg.Mem1_BAR[1] = pci_read_config(mpt->dev, PCIR_BAR(4), 4);
849 mpt->pci_cfg.ROM_BAR = pci_read_config(mpt->dev, PCIR_BIOS, 4);
850 mpt->pci_cfg.IntLine = pci_read_config(mpt->dev, PCIR_INTLINE, 1);
851 mpt->pci_cfg.PMCSR = pci_read_config(mpt->dev, 0x44, 4);
852}
853
854/* Sets modifiable config registers */
855void
856mpt_set_config_regs(struct mpt_softc *mpt)
857{
858 uint32_t val;
859
860#define MPT_CHECK(reg, offset, size) \
861 val = pci_read_config(mpt->dev, offset, size); \
862 if (mpt->pci_cfg.reg != val) { \
863 mpt_prt(mpt, \
864 "Restoring " #reg " to 0x%X from 0x%X\n", \
865 mpt->pci_cfg.reg, val); \
866 }
867
868 if (mpt->verbose >= MPT_PRT_DEBUG) {
869 MPT_CHECK(Command, PCIR_COMMAND, 2);
870 MPT_CHECK(LatencyTimer_LineSize, PCIR_CACHELNSZ, 2);
871 MPT_CHECK(IO_BAR, PCIR_BAR(0), 4);
872 MPT_CHECK(Mem0_BAR[0], PCIR_BAR(1), 4);
873 MPT_CHECK(Mem0_BAR[1], PCIR_BAR(2), 4);
874 MPT_CHECK(Mem1_BAR[0], PCIR_BAR(3), 4);
875 MPT_CHECK(Mem1_BAR[1], PCIR_BAR(4), 4);
876 MPT_CHECK(ROM_BAR, PCIR_BIOS, 4);
877 MPT_CHECK(IntLine, PCIR_INTLINE, 1);
878 MPT_CHECK(PMCSR, 0x44, 4);
879 }
880#undef MPT_CHECK
881
882 pci_write_config(mpt->dev, PCIR_COMMAND, mpt->pci_cfg.Command, 2);
883 pci_write_config(mpt->dev, PCIR_CACHELNSZ,
884 mpt->pci_cfg.LatencyTimer_LineSize, 2);
885 pci_write_config(mpt->dev, PCIR_BAR(0), mpt->pci_cfg.IO_BAR, 4);
886 pci_write_config(mpt->dev, PCIR_BAR(1), mpt->pci_cfg.Mem0_BAR[0], 4);
887 pci_write_config(mpt->dev, PCIR_BAR(2), mpt->pci_cfg.Mem0_BAR[1], 4);
888 pci_write_config(mpt->dev, PCIR_BAR(3), mpt->pci_cfg.Mem1_BAR[0], 4);
889 pci_write_config(mpt->dev, PCIR_BAR(4), mpt->pci_cfg.Mem1_BAR[1], 4);
890 pci_write_config(mpt->dev, PCIR_BIOS, mpt->pci_cfg.ROM_BAR, 4);
891 pci_write_config(mpt->dev, PCIR_INTLINE, mpt->pci_cfg.IntLine, 1);
892 pci_write_config(mpt->dev, 0x44, mpt->pci_cfg.PMCSR, 4);
893}
894
895static void
896mpt_pci_intr(void *arg)
897{
898 struct mpt_softc *mpt;
899
900 mpt = (struct mpt_softc *)arg;
901 MPT_LOCK(mpt);
902 mpt_intr(mpt);
903 MPT_UNLOCK(mpt);
904}
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