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isp.c (56008) isp.c (57146)
1/* $FreeBSD: head/sys/dev/isp/isp.c 56008 2000-01-15 01:52:01Z mjacob $ */
1/* $FreeBSD: head/sys/dev/isp/isp.c 57146 2000-02-11 19:31:32Z mjacob $ */
2/*
3 * Machine and OS Independent (well, as best as possible)
4 * code for the Qlogic ISP SCSI adapters.
5 *
6 * Copyright (c) 1997, 1998, 1999 by Matthew Jacob
7 * NASA/Ames Research Center
8 * All rights reserved.
9 *

--- 80 unchanged lines hidden (view full) ---

90static void isp_dumpregs __P((struct ispsoftc *, const char *));
91static void isp_mboxcmd __P((struct ispsoftc *, mbreg_t *));
92
93static void isp_update __P((struct ispsoftc *));
94static void isp_update_bus __P((struct ispsoftc *, int));
95static void isp_setdfltparm __P((struct ispsoftc *, int));
96static int isp_read_nvram __P((struct ispsoftc *));
97static void isp_rdnvram_word __P((struct ispsoftc *, int, u_int16_t *));
2/*
3 * Machine and OS Independent (well, as best as possible)
4 * code for the Qlogic ISP SCSI adapters.
5 *
6 * Copyright (c) 1997, 1998, 1999 by Matthew Jacob
7 * NASA/Ames Research Center
8 * All rights reserved.
9 *

--- 80 unchanged lines hidden (view full) ---

90static void isp_dumpregs __P((struct ispsoftc *, const char *));
91static void isp_mboxcmd __P((struct ispsoftc *, mbreg_t *));
92
93static void isp_update __P((struct ispsoftc *));
94static void isp_update_bus __P((struct ispsoftc *, int));
95static void isp_setdfltparm __P((struct ispsoftc *, int));
96static int isp_read_nvram __P((struct ispsoftc *));
97static void isp_rdnvram_word __P((struct ispsoftc *, int, u_int16_t *));
98static void isp_parse_nvram_1020 __P((struct ispsoftc *, u_int8_t *));
99static void isp_parse_nvram_1080 __P((struct ispsoftc *, int, u_int8_t *));
100static void isp_parse_nvram_12160 __P((struct ispsoftc *, int, u_int8_t *));
101static void isp_parse_nvram_2100 __P((struct ispsoftc *, u_int8_t *));
98
102
103
99/*
100 * Reset Hardware.
101 *
102 * Hit the chip over the head, download new f/w if available and set it running.
103 *
104 * Locking done elsewhere.
105 */
106void

--- 76 unchanged lines hidden (view full) ---

183 */
184 } else if (IS_ULTRA2(isp)) {
185 static char *m = "%s: bus %d is in %s Mode\n";
186 u_int16_t l;
187 sdparam *sdp = isp->isp_param;
188
189 isp->isp_clock = 100;
190
104/*
105 * Reset Hardware.
106 *
107 * Hit the chip over the head, download new f/w if available and set it running.
108 *
109 * Locking done elsewhere.
110 */
111void

--- 76 unchanged lines hidden (view full) ---

188 */
189 } else if (IS_ULTRA2(isp)) {
190 static char *m = "%s: bus %d is in %s Mode\n";
191 u_int16_t l;
192 sdparam *sdp = isp->isp_param;
193
194 isp->isp_clock = 100;
195
191 revname = "1080";
196 if (IS_1280(isp))
197 revname = "1280";
198 else if (IS_1080(isp))
199 revname = "1080";
200 else if (IS_12160(isp))
201 revname = "12160";
202 else
203 revname = "<UNKLVD>";
204
192 l = ISP_READ(isp, SXP_PINS_DIFF) & ISP1080_MODE_MASK;
193 switch (l) {
194 case ISP1080_LVD_MODE:
195 sdp->isp_lvdmode = 1;
196 CFGPRINTF(m, isp->isp_name, 0, "LVD");
197 break;
198 case ISP1080_HVD_MODE:
199 sdp->isp_diffmode = 1;

--- 4 unchanged lines hidden (view full) ---

204 CFGPRINTF(m, isp->isp_name, 0, "Single-Ended");
205 break;
206 default:
207 CFGPRINTF("%s: unknown mode on bus %d (0x%x)\n",
208 isp->isp_name, 0, l);
209 break;
210 }
211
205 l = ISP_READ(isp, SXP_PINS_DIFF) & ISP1080_MODE_MASK;
206 switch (l) {
207 case ISP1080_LVD_MODE:
208 sdp->isp_lvdmode = 1;
209 CFGPRINTF(m, isp->isp_name, 0, "LVD");
210 break;
211 case ISP1080_HVD_MODE:
212 sdp->isp_diffmode = 1;

--- 4 unchanged lines hidden (view full) ---

217 CFGPRINTF(m, isp->isp_name, 0, "Single-Ended");
218 break;
219 default:
220 CFGPRINTF("%s: unknown mode on bus %d (0x%x)\n",
221 isp->isp_name, 0, l);
222 break;
223 }
224
212 if (IS_1280(isp)) {
225 if (IS_DUALBUS(isp)) {
213 sdp++;
226 sdp++;
214 revname[1] = '2';
215 l = ISP_READ(isp, SXP_PINS_DIFF|SXP_BANK1_SELECT);
216 l &= ISP1080_MODE_MASK;
217 switch(l) {
218 case ISP1080_LVD_MODE:
219 sdp->isp_lvdmode = 1;
220 CFGPRINTF(m, isp->isp_name, 1, "LVD");
221 break;
222 case ISP1080_HVD_MODE:

--- 574 unchanged lines hidden (view full) ---

797 * do not, and only guess that 4.55.0 <= x < 5.0.0 (initiator
798 * only) and x >= 7.55 (initiator/target) has fast posting.
799 */
800
801 mbs.param[0] = MBOX_SET_FW_FEATURES;
802 mbs.param[1] = 0;
803 if (IS_ULTRA2(isp))
804 mbs.param[1] |= FW_FEATURE_LVD_NOTIFY;
227 l = ISP_READ(isp, SXP_PINS_DIFF|SXP_BANK1_SELECT);
228 l &= ISP1080_MODE_MASK;
229 switch(l) {
230 case ISP1080_LVD_MODE:
231 sdp->isp_lvdmode = 1;
232 CFGPRINTF(m, isp->isp_name, 1, "LVD");
233 break;
234 case ISP1080_HVD_MODE:

--- 574 unchanged lines hidden (view full) ---

809 * do not, and only guess that 4.55.0 <= x < 5.0.0 (initiator
810 * only) and x >= 7.55 (initiator/target) has fast posting.
811 */
812
813 mbs.param[0] = MBOX_SET_FW_FEATURES;
814 mbs.param[1] = 0;
815 if (IS_ULTRA2(isp))
816 mbs.param[1] |= FW_FEATURE_LVD_NOTIFY;
817 if (IS_ULTRA2(isp) || IS_1240(isp))
818 mbs.param[1] |= FW_FEATURE_FAST_POST;
805#ifndef ISP_NO_FASTPOST_SCSI
819#ifndef ISP_NO_FASTPOST_SCSI
806 if ((ISP_FW_REVX(isp->isp_fwrev) >= ISP_FW_REV(4, 55, 0) &&
820 else if ((ISP_FW_REVX(isp->isp_fwrev) >= ISP_FW_REV(4, 55, 0) &&
807 (ISP_FW_REVX(isp->isp_fwrev) < ISP_FW_REV(5, 0, 0))) ||
808 (ISP_FW_REVX(isp->isp_fwrev) >= ISP_FW_REV(7, 55, 0))) {
809 mbs.param[1] |= FW_FEATURE_FAST_POST;
810 }
811#endif
812 if (mbs.param[1] != 0) {
813 u_int16_t sfeat = mbs.param[1];
814 isp_mboxcmd(isp, &mbs);

--- 238 unchanged lines hidden (view full) ---

1053 if (icbp->icb_execthrottle < 1) {
1054 PRINTF("%s: bad execution throttle of %d- using 16\n",
1055 isp->isp_name, fcp->isp_execthrottle);
1056 icbp->icb_execthrottle = ICB_DFLT_THROTTLE;
1057 }
1058 icbp->icb_retry_delay = fcp->isp_retry_delay;
1059 icbp->icb_retry_count = fcp->isp_retry_count;
1060 icbp->icb_hardaddr = loopid;
821 (ISP_FW_REVX(isp->isp_fwrev) < ISP_FW_REV(5, 0, 0))) ||
822 (ISP_FW_REVX(isp->isp_fwrev) >= ISP_FW_REV(7, 55, 0))) {
823 mbs.param[1] |= FW_FEATURE_FAST_POST;
824 }
825#endif
826 if (mbs.param[1] != 0) {
827 u_int16_t sfeat = mbs.param[1];
828 isp_mboxcmd(isp, &mbs);

--- 238 unchanged lines hidden (view full) ---

1067 if (icbp->icb_execthrottle < 1) {
1068 PRINTF("%s: bad execution throttle of %d- using 16\n",
1069 isp->isp_name, fcp->isp_execthrottle);
1070 icbp->icb_execthrottle = ICB_DFLT_THROTTLE;
1071 }
1072 icbp->icb_retry_delay = fcp->isp_retry_delay;
1073 icbp->icb_retry_count = fcp->isp_retry_count;
1074 icbp->icb_hardaddr = loopid;
1075#ifdef PRET_A_PORTE
1076 if (IS_2200(isp)) {
1077 icbp->icb_fwoptions |= ICBOPT_EXTENDED;
1078 /*
1079 * Prefer or force Point-To-Point instead Loop?
1080 */
1081 if (isp->isp_confopts & ISP_CFG_NPORT)
1082 icbp->icb_xfwoptions = ICBXOPT_PTP_2_LOOP;
1083 else
1084 icbp->icb_xfwoptions = ICBXOPT_LOOP_2_PTP;
1085 }
1086#endif
1061 icbp->icb_logintime = 60; /* 60 second login timeout */
1062
1063 if (fcp->isp_nodewwn) {
1064 u_int64_t pn;
1065 MAKE_NODE_NAME_FROM_WWN(icbp->icb_nodename, fcp->isp_nodewwn);
1066 if (fcp->isp_portwwn) {
1067 pn = fcp->isp_portwwn;
1068 } else {

--- 163 unchanged lines hidden (view full) ---

1232 int waitdelay;
1233{
1234 static char *toponames[] = {
1235 "Private Loop",
1236 "FL Port",
1237 "N-Port to N-Port",
1238 "F Port"
1239 };
1087 icbp->icb_logintime = 60; /* 60 second login timeout */
1088
1089 if (fcp->isp_nodewwn) {
1090 u_int64_t pn;
1091 MAKE_NODE_NAME_FROM_WWN(icbp->icb_nodename, fcp->isp_nodewwn);
1092 if (fcp->isp_portwwn) {
1093 pn = fcp->isp_portwwn;
1094 } else {

--- 163 unchanged lines hidden (view full) ---

1258 int waitdelay;
1259{
1260 static char *toponames[] = {
1261 "Private Loop",
1262 "FL Port",
1263 "N-Port to N-Port",
1264 "F Port"
1265 };
1240 char *tname;
1241 mbreg_t mbs;
1242 int count, topo = -1;
1243 u_int8_t lwfs;
1244 fcparam *fcp;
1245#if defined(ISP2100_FABRIC)
1246 isp_pdb_t pdb;
1247#endif
1248 fcp = isp->isp_param;

--- 28 unchanged lines hidden (view full) ---

1277 */
1278 mbs.param[0] = MBOX_GET_LOOP_ID;
1279 isp_mboxcmd(isp, &mbs);
1280 if (mbs.param[0] != MBOX_COMMAND_COMPLETE) {
1281 PRINTF("%s: GET LOOP ID failed\n", isp->isp_name);
1282 return (-1);
1283 }
1284 fcp->isp_loopid = mbs.param[1];
1266 mbreg_t mbs;
1267 int count, topo = -1;
1268 u_int8_t lwfs;
1269 fcparam *fcp;
1270#if defined(ISP2100_FABRIC)
1271 isp_pdb_t pdb;
1272#endif
1273 fcp = isp->isp_param;

--- 28 unchanged lines hidden (view full) ---

1302 */
1303 mbs.param[0] = MBOX_GET_LOOP_ID;
1304 isp_mboxcmd(isp, &mbs);
1305 if (mbs.param[0] != MBOX_COMMAND_COMPLETE) {
1306 PRINTF("%s: GET LOOP ID failed\n", isp->isp_name);
1307 return (-1);
1308 }
1309 fcp->isp_loopid = mbs.param[1];
1285 if (isp->isp_type == ISP_HA_FC_2200) {
1286 if (ISP_FW_REVX(isp->isp_fwrev) >= ISP_FW_REV(2, 0, 14)) {
1287 topo = (int) mbs.param[6];
1288 }
1289 } else if (isp->isp_type == ISP_HA_FC_2100) {
1290 if (ISP_FW_REVX(isp->isp_fwrev) >= ISP_FW_REV(1, 17, 26)) {
1291 topo = (int) mbs.param[6];
1292 }
1310 if (IS_2200(isp)) {
1311 topo = (int) mbs.param[6];
1312 if (topo < 0 || topo > 3)
1313 topo = 0;
1314 } else {
1315 topo = 0;
1293 }
1316 }
1294 if (topo < 0 || topo > 3)
1295 tname = "unknown";
1296 else
1297 tname = toponames[topo];
1298
1299 /*
1300 * If we're not on a fabric, the low 8 bits will be our AL_PA.
1301 * If we're on a fabric, the low 8 bits will still be our AL_PA.
1302 */
1303 fcp->isp_alpa = mbs.param[2];
1304#if defined(ISP2100_FABRIC)
1305 fcp->isp_onfabric = 0;
1306 if (isp_getpdb(isp, FL_PORT_ID, &pdb) == 0) {
1317
1318 /*
1319 * If we're not on a fabric, the low 8 bits will be our AL_PA.
1320 * If we're on a fabric, the low 8 bits will still be our AL_PA.
1321 */
1322 fcp->isp_alpa = mbs.param[2];
1323#if defined(ISP2100_FABRIC)
1324 fcp->isp_onfabric = 0;
1325 if (isp_getpdb(isp, FL_PORT_ID, &pdb) == 0) {
1326
1327 if (IS_2100(isp))
1328 topo = 1;
1329
1307 fcp->isp_portid = mbs.param[2] | (((int)mbs.param[3]) << 16);
1308 fcp->isp_onfabric = 1;
1309 CFGPRINTF("%s: Loop ID %d, AL_PA 0x%x, Port ID 0x%x Loop State "
1330 fcp->isp_portid = mbs.param[2] | (((int)mbs.param[3]) << 16);
1331 fcp->isp_onfabric = 1;
1332 CFGPRINTF("%s: Loop ID %d, AL_PA 0x%x, Port ID 0x%x Loop State "
1310 "0x%x topology %s\n", isp->isp_name, fcp->isp_loopid,
1311 fcp->isp_alpa, fcp->isp_portid, fcp->isp_loopstate, tname);
1333 "0x%x topology '%s'\n", isp->isp_name, fcp->isp_loopid,
1334 fcp->isp_alpa, fcp->isp_portid, fcp->isp_loopstate,
1335 toponames[topo]);
1312
1313 /*
1314 * Make sure we're logged out of all fabric devices.
1315 */
1316 for (count = FC_SNS_ID+1; count < MAX_FC_TARG; count++) {
1317 struct lportdb *lp = &fcp->portdb[count];
1318 if (lp->valid == 0 || lp->fabdev == 0)
1319 continue;
1320 PRINTF("%s: logging out target %d at Loop ID %d "
1321 "(port id 0x%x)\n", isp->isp_name, count,
1322 lp->loopid, lp->portid);
1323 mbs.param[0] = MBOX_FABRIC_LOGOUT;
1324 mbs.param[1] = lp->loopid << 8;
1325 mbs.param[2] = 0;
1326 mbs.param[3] = 0;
1327 isp_mboxcmd(isp, &mbs);
1328 }
1329 } else
1330#endif
1336
1337 /*
1338 * Make sure we're logged out of all fabric devices.
1339 */
1340 for (count = FC_SNS_ID+1; count < MAX_FC_TARG; count++) {
1341 struct lportdb *lp = &fcp->portdb[count];
1342 if (lp->valid == 0 || lp->fabdev == 0)
1343 continue;
1344 PRINTF("%s: logging out target %d at Loop ID %d "
1345 "(port id 0x%x)\n", isp->isp_name, count,
1346 lp->loopid, lp->portid);
1347 mbs.param[0] = MBOX_FABRIC_LOGOUT;
1348 mbs.param[1] = lp->loopid << 8;
1349 mbs.param[2] = 0;
1350 mbs.param[3] = 0;
1351 isp_mboxcmd(isp, &mbs);
1352 }
1353 } else
1354#endif
1331 CFGPRINTF("%s: Loop ID %d, ALPA 0x%x Loop State 0x%x topology %s\n",
1355 CFGPRINTF("%s: Loop ID %d, ALPA 0x%x Loop State 0x%x topology '%s'\n",
1332 isp->isp_name, fcp->isp_loopid, fcp->isp_alpa, fcp->isp_loopstate,
1356 isp->isp_name, fcp->isp_loopid, fcp->isp_alpa, fcp->isp_loopstate,
1333 tname);
1357 toponames[topo]);
1334 return (0);
1335}
1336
1337/*
1338 * Compare two local port db entities and return 1 if they're the same, else 0.
1339 */
1340
1341static int

--- 1364 unchanged lines hidden (view full) ---

2706 isp_mark_getpdb_all(isp);
2707 /*
2708 * Not correct, but it will force us to rescan the loop.
2709 */
2710 ((fcparam *) isp->isp_param)->isp_loopstate = LOOP_PDB_RCVD;
2711 isp_async(isp, ISPASYNC_CHANGE_NOTIFY, NULL);
2712 break;
2713
1358 return (0);
1359}
1360
1361/*
1362 * Compare two local port db entities and return 1 if they're the same, else 0.
1363 */
1364
1365static int

--- 1364 unchanged lines hidden (view full) ---

2730 isp_mark_getpdb_all(isp);
2731 /*
2732 * Not correct, but it will force us to rescan the loop.
2733 */
2734 ((fcparam *) isp->isp_param)->isp_loopstate = LOOP_PDB_RCVD;
2735 isp_async(isp, ISPASYNC_CHANGE_NOTIFY, NULL);
2736 break;
2737
2738 case ASYNC_PTPMODE:
2739 PRINTF("%s: Point-to-Point mode\n", isp->isp_name);
2740 break;
2741
2742 case ASYNC_CONNMODE:
2743 mbox = ISP_READ(isp, OUTMAILBOX1);
2744 switch (mbox) {
2745 case ISP_CONN_LOOP:
2746 PRINTF("%s: Point-to-Point -> Loop mode\n",
2747 isp->isp_name);
2748 break;
2749 case ISP_CONN_PTP:
2750 PRINTF("%s: Loop -> Point-to-Point mode\n",
2751 isp->isp_name);
2752 break;
2753 case ISP_CONN_BADLIP:
2754 PRINTF("%s: Point-to-Point -> Loop mode (1)\n",
2755 isp->isp_name);
2756 break;
2757 case ISP_CONN_FATAL:
2758 PRINTF("%s: FATAL CONNECTION ERROR\n", isp->isp_name);
2759 isp_restart(isp);
2760 /* no point continuing after this */
2761 return (-1);
2762
2763 case ISP_CONN_LOOPBACK:
2764 PRINTF("%s: Looped Back in Point-to-Point mode\n",
2765 isp->isp_name);
2766 }
2767 break;
2768
2714 default:
2715 PRINTF("%s: unknown async code 0x%x\n", isp->isp_name, mbox);
2716 break;
2717 }
2718 return (fast_post_handle);
2719}
2720
2721/*

--- 716 unchanged lines hidden (view full) ---

3438 case MBOX_GET_ASYNC_DATA_SETUP_TIME:
3439 case MBOX_GET_RESET_DELAY_PARAMS:
3440 case MBOX_SET_RESET_DELAY_PARAMS:
3441 mbp->param[2] = ISP_READ(isp, OUTMAILBOX2);
3442 break;
3443 }
3444 }
3445
2769 default:
2770 PRINTF("%s: unknown async code 0x%x\n", isp->isp_name, mbox);
2771 break;
2772 }
2773 return (fast_post_handle);
2774}
2775
2776/*

--- 716 unchanged lines hidden (view full) ---

3493 case MBOX_GET_ASYNC_DATA_SETUP_TIME:
3494 case MBOX_GET_RESET_DELAY_PARAMS:
3495 case MBOX_SET_RESET_DELAY_PARAMS:
3496 mbp->param[2] = ISP_READ(isp, OUTMAILBOX2);
3497 break;
3498 }
3499 }
3500
3501 if (IS_2200(isp)) {
3502 if (opcode == MBOX_GET_LOOP_ID) {
3503 mbp->param[6] = ISP_READ(isp, OUTMAILBOX6);
3504 }
3505 }
3506
3446 switch (outparam) {
3447 case 8: mbp->param[7] = ISP_READ(isp, OUTMAILBOX7);
3448 case 7: mbp->param[6] = ISP_READ(isp, OUTMAILBOX6);
3449 case 6: mbp->param[5] = ISP_READ(isp, OUTMAILBOX5);
3450 case 5: mbp->param[4] = ISP_READ(isp, OUTMAILBOX4);
3451 case 4: mbp->param[3] = ISP_READ(isp, OUTMAILBOX3);
3452 case 3: mbp->param[2] = ISP_READ(isp, OUTMAILBOX2);
3453 case 2: mbp->param[1] = ISP_READ(isp, OUTMAILBOX1);

--- 559 unchanged lines hidden (view full) ---

4013 XS_SETERR(xs, HBA_BUSRESET);
4014 XS_CMD_DONE(xs);
4015 }
4016}
4017
4018/*
4019 * NVRAM Routines
4020 */
3507 switch (outparam) {
3508 case 8: mbp->param[7] = ISP_READ(isp, OUTMAILBOX7);
3509 case 7: mbp->param[6] = ISP_READ(isp, OUTMAILBOX6);
3510 case 6: mbp->param[5] = ISP_READ(isp, OUTMAILBOX5);
3511 case 5: mbp->param[4] = ISP_READ(isp, OUTMAILBOX4);
3512 case 4: mbp->param[3] = ISP_READ(isp, OUTMAILBOX3);
3513 case 3: mbp->param[2] = ISP_READ(isp, OUTMAILBOX2);
3514 case 2: mbp->param[1] = ISP_READ(isp, OUTMAILBOX1);

--- 559 unchanged lines hidden (view full) ---

4074 XS_SETERR(xs, HBA_BUSRESET);
4075 XS_CMD_DONE(xs);
4076 }
4077}
4078
4079/*
4080 * NVRAM Routines
4081 */
4021
4022static int
4023isp_read_nvram(isp)
4024 struct ispsoftc *isp;
4025{
4082static int
4083isp_read_nvram(isp)
4084 struct ispsoftc *isp;
4085{
4026 static char *tru = "true";
4027 static char *not = "false";
4028 int i, amt;
4029 u_int8_t csum, minversion;
4030 union {
4031 u_int8_t _x[ISP2100_NVRAM_SIZE];
4032 u_int16_t _s[ISP2100_NVRAM_SIZE>>1];
4033 } _n;
4034#define nvram_data _n._x
4035#define nvram_words _n._s

--- 36 unchanged lines hidden (view full) ---

4072 return (-1);
4073 }
4074 if (ISP_NVRAM_VERSION(nvram_data) < minversion) {
4075 PRINTF("%s: version %d NVRAM not understood\n", isp->isp_name,
4076 ISP_NVRAM_VERSION(nvram_data));
4077 return (-1);
4078 }
4079
4086 int i, amt;
4087 u_int8_t csum, minversion;
4088 union {
4089 u_int8_t _x[ISP2100_NVRAM_SIZE];
4090 u_int16_t _s[ISP2100_NVRAM_SIZE>>1];
4091 } _n;
4092#define nvram_data _n._x
4093#define nvram_words _n._s

--- 36 unchanged lines hidden (view full) ---

4130 return (-1);
4131 }
4132 if (ISP_NVRAM_VERSION(nvram_data) < minversion) {
4133 PRINTF("%s: version %d NVRAM not understood\n", isp->isp_name,
4134 ISP_NVRAM_VERSION(nvram_data));
4135 return (-1);
4136 }
4137
4080 if (IS_ULTRA2(isp)) {
4081 int bus;
4082 sdparam *sdp = (sdparam *) isp->isp_param;
4083 for (bus = 0; bus < (IS_DUALBUS(isp)? 2 : 1); bus++, sdp++) {
4084 sdp->isp_fifo_threshold =
4085 ISP1080_NVRAM_FIFO_THRESHOLD(nvram_data);
4086
4087 sdp->isp_initiator_id =
4088 ISP1080_NVRAM_INITIATOR_ID(nvram_data, bus);
4089
4090 sdp->isp_bus_reset_delay =
4091 ISP1080_NVRAM_BUS_RESET_DELAY(nvram_data, bus);
4092
4093 sdp->isp_retry_count =
4094 ISP1080_NVRAM_BUS_RETRY_COUNT(nvram_data, bus);
4095
4096 sdp->isp_retry_delay =
4097 ISP1080_NVRAM_BUS_RETRY_DELAY(nvram_data, bus);
4098
4099 sdp->isp_async_data_setup =
4100 ISP1080_NVRAM_ASYNC_DATA_SETUP_TIME(nvram_data,
4101 bus);
4102
4103 sdp->isp_req_ack_active_neg =
4104 ISP1080_NVRAM_REQ_ACK_ACTIVE_NEGATION(nvram_data,
4105 bus);
4106
4107 sdp->isp_data_line_active_neg =
4108 ISP1080_NVRAM_DATA_LINE_ACTIVE_NEGATION(nvram_data,
4109 bus);
4110
4111 sdp->isp_data_dma_burst_enabl =
4112 ISP1080_NVRAM_BURST_ENABLE(nvram_data);
4113
4114 sdp->isp_cmd_dma_burst_enable =
4115 ISP1080_NVRAM_BURST_ENABLE(nvram_data);
4116
4117 sdp->isp_selection_timeout =
4118 ISP1080_NVRAM_SELECTION_TIMEOUT(nvram_data, bus);
4119
4120 sdp->isp_max_queue_depth =
4121 ISP1080_NVRAM_MAX_QUEUE_DEPTH(nvram_data, bus);
4122
4123 if (isp->isp_dblev >= 3) {
4124 PRINTF("%s: ISP1080 bus %d NVRAM values:\n",
4125 isp->isp_name, bus);
4126 PRINTF(" Initiator ID = %d\n",
4127 sdp->isp_initiator_id);
4128 PRINTF(" Fifo Threshold = 0x%x\n",
4129 sdp->isp_fifo_threshold);
4130 PRINTF(" Bus Reset Delay = %d\n",
4131 sdp->isp_bus_reset_delay);
4132 PRINTF(" Retry Count = %d\n",
4133 sdp->isp_retry_count);
4134 PRINTF(" Retry Delay = %d\n",
4135 sdp->isp_retry_delay);
4136 PRINTF(" Tag Age Limit = %d\n",
4137 sdp->isp_tag_aging);
4138 PRINTF(" Selection Timeout = %d\n",
4139 sdp->isp_selection_timeout);
4140 PRINTF(" Max Queue Depth = %d\n",
4141 sdp->isp_max_queue_depth);
4142 PRINTF(" Async Data Setup = 0x%x\n",
4143 sdp->isp_async_data_setup);
4144 PRINTF(" REQ/ACK Active Negation = %s\n",
4145 sdp->isp_req_ack_active_neg? tru : not);
4146 PRINTF(" Data Line Active Negation = %s\n",
4147 sdp->isp_data_line_active_neg? tru : not);
4148 PRINTF(" Cmd DMA Burst Enable = %s\n",
4149 sdp->isp_cmd_dma_burst_enable? tru : not);
4150 }
4151 for (i = 0; i < MAX_TARGETS; i++) {
4152 sdp->isp_devparam[i].dev_enable =
4153 ISP1080_NVRAM_TGT_DEVICE_ENABLE(nvram_data, i, bus);
4154 sdp->isp_devparam[i].exc_throttle =
4155 ISP1080_NVRAM_TGT_EXEC_THROTTLE(nvram_data, i, bus);
4156 sdp->isp_devparam[i].sync_offset =
4157 ISP1080_NVRAM_TGT_SYNC_OFFSET(nvram_data, i, bus);
4158 sdp->isp_devparam[i].sync_period =
4159 ISP1080_NVRAM_TGT_SYNC_PERIOD(nvram_data, i, bus);
4160 sdp->isp_devparam[i].dev_flags = 0;
4161 if (ISP1080_NVRAM_TGT_RENEG(nvram_data, i, bus))
4162 sdp->isp_devparam[i].dev_flags |= DPARM_RENEG;
4163 if (ISP1080_NVRAM_TGT_QFRZ(nvram_data, i, bus)) {
4164 PRINTF("%s: not supporting QFRZ option "
4165 "for target %d bus %d\n",
4166 isp->isp_name, i, bus);
4167 }
4168 sdp->isp_devparam[i].dev_flags |= DPARM_ARQ;
4169 if (ISP1080_NVRAM_TGT_ARQ(nvram_data, i, bus) == 0) {
4170 PRINTF("%s: not disabling ARQ option "
4171 "for target %d bus %d\n",
4172 isp->isp_name, i, bus);
4173 }
4174 if (ISP1080_NVRAM_TGT_TQING(nvram_data, i, bus))
4175 sdp->isp_devparam[i].dev_flags |= DPARM_TQING;
4176 if (ISP1080_NVRAM_TGT_SYNC(nvram_data, i, bus))
4177 sdp->isp_devparam[i].dev_flags |= DPARM_SYNC;
4178 if (ISP1080_NVRAM_TGT_WIDE(nvram_data, i, bus))
4179 sdp->isp_devparam[i].dev_flags |= DPARM_WIDE;
4180 if (ISP1080_NVRAM_TGT_PARITY(nvram_data, i, bus))
4181 sdp->isp_devparam[i].dev_flags |= DPARM_PARITY;
4182 if (ISP1080_NVRAM_TGT_DISC(nvram_data, i, bus))
4183 sdp->isp_devparam[i].dev_flags |= DPARM_DISC;
4184 sdp->isp_devparam[i].cur_dflags = 0;
4185 if (isp->isp_dblev >= 3) {
4186 PRINTF(" Target %d: Ena %d Throttle "
4187 "%d Offset %d Period %d Flags "
4188 "0x%x\n", i,
4189 sdp->isp_devparam[i].dev_enable,
4190 sdp->isp_devparam[i].exc_throttle,
4191 sdp->isp_devparam[i].sync_offset,
4192 sdp->isp_devparam[i].sync_period,
4193 sdp->isp_devparam[i].dev_flags);
4194 }
4195 }
4196 }
4138 if (IS_ULTRA3(isp)) {
4139 isp_parse_nvram_12160(isp, 0, nvram_data);
4140 isp_parse_nvram_12160(isp, 1, nvram_data);
4141 } else if (IS_1080(isp)) {
4142 isp_parse_nvram_1080(isp, 0, nvram_data);
4143 } else if (IS_1280(isp) || IS_1240(isp)) {
4144 isp_parse_nvram_1080(isp, 0, nvram_data);
4145 isp_parse_nvram_1080(isp, 1, nvram_data);
4197 } else if (IS_SCSI(isp)) {
4146 } else if (IS_SCSI(isp)) {
4198 sdparam *sdp = (sdparam *) isp->isp_param;
4199
4200 sdp->isp_fifo_threshold =
4201 ISP_NVRAM_FIFO_THRESHOLD(nvram_data) |
4202 (ISP_NVRAM_FIFO_THRESHOLD_128(nvram_data) << 2);
4203
4204 sdp->isp_initiator_id =
4205 ISP_NVRAM_INITIATOR_ID(nvram_data);
4206
4207 sdp->isp_bus_reset_delay =
4208 ISP_NVRAM_BUS_RESET_DELAY(nvram_data);
4209
4210 sdp->isp_retry_count =
4211 ISP_NVRAM_BUS_RETRY_COUNT(nvram_data);
4212
4213 sdp->isp_retry_delay =
4214 ISP_NVRAM_BUS_RETRY_DELAY(nvram_data);
4215
4216 sdp->isp_async_data_setup =
4217 ISP_NVRAM_ASYNC_DATA_SETUP_TIME(nvram_data);
4218
4219 if (isp->isp_type >= ISP_HA_SCSI_1040) {
4220 if (sdp->isp_async_data_setup < 9) {
4221 sdp->isp_async_data_setup = 9;
4222 }
4223 } else {
4224 if (sdp->isp_async_data_setup != 6) {
4225 sdp->isp_async_data_setup = 6;
4226 }
4227 }
4228
4229 sdp->isp_req_ack_active_neg =
4230 ISP_NVRAM_REQ_ACK_ACTIVE_NEGATION(nvram_data);
4231
4232 sdp->isp_data_line_active_neg =
4233 ISP_NVRAM_DATA_LINE_ACTIVE_NEGATION(nvram_data);
4234
4235 sdp->isp_data_dma_burst_enabl =
4236 ISP_NVRAM_DATA_DMA_BURST_ENABLE(nvram_data);
4237
4238 sdp->isp_cmd_dma_burst_enable =
4239 ISP_NVRAM_CMD_DMA_BURST_ENABLE(nvram_data);
4240
4241 sdp->isp_tag_aging =
4242 ISP_NVRAM_TAG_AGE_LIMIT(nvram_data);
4243
4244 sdp->isp_selection_timeout =
4245 ISP_NVRAM_SELECTION_TIMEOUT(nvram_data);
4246
4247 sdp->isp_max_queue_depth =
4248 ISP_NVRAM_MAX_QUEUE_DEPTH(nvram_data);
4249
4250 isp->isp_fast_mttr = ISP_NVRAM_FAST_MTTR_ENABLE(nvram_data);
4251 if (isp->isp_dblev > 2) {
4252 PRINTF("%s: NVRAM values:\n", isp->isp_name);
4253 PRINTF(" Fifo Threshold = 0x%x\n",
4254 sdp->isp_fifo_threshold);
4255 PRINTF(" Bus Reset Delay = %d\n",
4256 sdp->isp_bus_reset_delay);
4257 PRINTF(" Retry Count = %d\n",
4258 sdp->isp_retry_count);
4259 PRINTF(" Retry Delay = %d\n",
4260 sdp->isp_retry_delay);
4261 PRINTF(" Tag Age Limit = %d\n",
4262 sdp->isp_tag_aging);
4263 PRINTF(" Selection Timeout = %d\n",
4264 sdp->isp_selection_timeout);
4265 PRINTF(" Max Queue Depth = %d\n",
4266 sdp->isp_max_queue_depth);
4267 PRINTF(" Async Data Setup = 0x%x\n",
4268 sdp->isp_async_data_setup);
4269 PRINTF(" REQ/ACK Active Negation = %s\n",
4270 sdp->isp_req_ack_active_neg? tru : not);
4271 PRINTF(" Data Line Active Negation = %s\n",
4272 sdp->isp_data_line_active_neg? tru : not);
4273 PRINTF(" Data DMA Burst Enable = %s\n",
4274 sdp->isp_data_dma_burst_enabl? tru : not);
4275 PRINTF(" Cmd DMA Burst Enable = %s\n",
4276 sdp->isp_cmd_dma_burst_enable? tru : not);
4277 PRINTF(" Fast MTTR = %s\n",
4278 isp->isp_fast_mttr? tru : not);
4279 }
4280 for (i = 0; i < MAX_TARGETS; i++) {
4281 sdp->isp_devparam[i].dev_enable =
4282 ISP_NVRAM_TGT_DEVICE_ENABLE(nvram_data, i);
4283 sdp->isp_devparam[i].exc_throttle =
4284 ISP_NVRAM_TGT_EXEC_THROTTLE(nvram_data, i);
4285 sdp->isp_devparam[i].sync_offset =
4286 ISP_NVRAM_TGT_SYNC_OFFSET(nvram_data, i);
4287 sdp->isp_devparam[i].sync_period =
4288 ISP_NVRAM_TGT_SYNC_PERIOD(nvram_data, i);
4289
4290 if (isp->isp_type < ISP_HA_SCSI_1040) {
4291 /*
4292 * If we're not ultra, we can't possibly
4293 * be a shorter period than this.
4294 */
4295 if (sdp->isp_devparam[i].sync_period < 0x19) {
4296 sdp->isp_devparam[i].sync_period =
4297 0x19;
4298 }
4299 if (sdp->isp_devparam[i].sync_offset > 0xc) {
4300 sdp->isp_devparam[i].sync_offset =
4301 0x0c;
4302 }
4303 } else {
4304 if (sdp->isp_devparam[i].sync_offset > 0x8) {
4305 sdp->isp_devparam[i].sync_offset = 0x8;
4306 }
4307 }
4308 sdp->isp_devparam[i].dev_flags = 0;
4309 if (ISP_NVRAM_TGT_RENEG(nvram_data, i))
4310 sdp->isp_devparam[i].dev_flags |= DPARM_RENEG;
4311 if (ISP_NVRAM_TGT_QFRZ(nvram_data, i)) {
4312 PRINTF("%s: not supporting QFRZ option for "
4313 "target %d\n", isp->isp_name, i);
4314 }
4315 sdp->isp_devparam[i].dev_flags |= DPARM_ARQ;
4316 if (ISP_NVRAM_TGT_ARQ(nvram_data, i) == 0) {
4317 PRINTF("%s: not disabling ARQ option for "
4318 "target %d\n", isp->isp_name, i);
4319 }
4320 if (ISP_NVRAM_TGT_TQING(nvram_data, i))
4321 sdp->isp_devparam[i].dev_flags |= DPARM_TQING;
4322 if (ISP_NVRAM_TGT_SYNC(nvram_data, i))
4323 sdp->isp_devparam[i].dev_flags |= DPARM_SYNC;
4324 if (ISP_NVRAM_TGT_WIDE(nvram_data, i))
4325 sdp->isp_devparam[i].dev_flags |= DPARM_WIDE;
4326 if (ISP_NVRAM_TGT_PARITY(nvram_data, i))
4327 sdp->isp_devparam[i].dev_flags |= DPARM_PARITY;
4328 if (ISP_NVRAM_TGT_DISC(nvram_data, i))
4329 sdp->isp_devparam[i].dev_flags |= DPARM_DISC;
4330 sdp->isp_devparam[i].cur_dflags = 0; /* we don't know */
4331 if (isp->isp_dblev > 2) {
4332 PRINTF(" Target %d: Enabled %d Throttle %d "
4333 "Offset %d Period %d Flags 0x%x\n", i,
4334 sdp->isp_devparam[i].dev_enable,
4335 sdp->isp_devparam[i].exc_throttle,
4336 sdp->isp_devparam[i].sync_offset,
4337 sdp->isp_devparam[i].sync_period,
4338 sdp->isp_devparam[i].dev_flags);
4339 }
4340 }
4147 isp_parse_nvram_1020(isp, nvram_data);
4341 } else {
4148 } else {
4342 fcparam *fcp = (fcparam *) isp->isp_param;
4343 union {
4344 struct {
4345#if BYTE_ORDER == BIG_ENDIAN
4346 u_int32_t hi32;
4347 u_int32_t lo32;
4348#else
4349 u_int32_t lo32;
4350 u_int32_t hi32;
4351#endif
4352 } wd;
4353 u_int64_t full64;
4354 } wwnstore;
4355
4356 wwnstore.full64 = ISP2100_NVRAM_NODE_NAME(nvram_data);
4357 /*
4358 * Broken PTI cards with nothing in the top nibble. Pah.
4359 */
4360 if ((wwnstore.wd.hi32 >> 28) == 0) {
4361 wwnstore.wd.hi32 |= (2 << 28);
4362 CFGPRINTF("%s: (corrected) Adapter WWN 0x%08x%08x\n",
4363 isp->isp_name, wwnstore.wd.hi32, wwnstore.wd.lo32);
4364 } else {
4365 CFGPRINTF("%s: Adapter WWN 0x%08x%08x\n", isp->isp_name,
4366 wwnstore.wd.hi32, wwnstore.wd.lo32);
4367 }
4368 fcp->isp_nodewwn = wwnstore.full64;
4369
4370 /*
4371 * If the Node WWN has 2 in the top nibble, we can
4372 * authoritatively construct a Port WWN by adding
4373 * our unit number (plus one to make it nonzero) and
4374 * putting it into bits 59..56. If the top nibble isn't
4375 * 2, then we just set them identically.
4376 */
4377 if ((fcp->isp_nodewwn >> 60) == 2) {
4378 fcp->isp_portwwn = fcp->isp_nodewwn |
4379 (((u_int64_t)(isp->isp_unit+1)) << 56);
4380 } else {
4381 fcp->isp_portwwn = fcp->isp_nodewwn;
4382 }
4383 wwnstore.full64 = ISP2100_NVRAM_BOOT_NODE_NAME(nvram_data);
4384 if (wwnstore.full64 != 0) {
4385 PRINTF("%s: BOOT DEVICE WWN 0x%08x%08x\n",
4386 isp->isp_name, wwnstore.wd.hi32, wwnstore.wd.lo32);
4387 }
4388 fcp->isp_maxalloc =
4389 ISP2100_NVRAM_MAXIOCBALLOCATION(nvram_data);
4390 fcp->isp_maxfrmlen =
4391 ISP2100_NVRAM_MAXFRAMELENGTH(nvram_data);
4392 fcp->isp_retry_delay =
4393 ISP2100_NVRAM_RETRY_DELAY(nvram_data);
4394 fcp->isp_retry_count =
4395 ISP2100_NVRAM_RETRY_COUNT(nvram_data);
4396 fcp->isp_loopid =
4397 ISP2100_NVRAM_HARDLOOPID(nvram_data);
4398 fcp->isp_execthrottle =
4399 ISP2100_NVRAM_EXECUTION_THROTTLE(nvram_data);
4400 fcp->isp_fwoptions = ISP2100_NVRAM_OPTIONS(nvram_data);
4401 if (isp->isp_dblev > 2) {
4402 PRINTF("%s: NVRAM values:\n", isp->isp_name);
4403 PRINTF(" Max IOCB Allocation = %d\n",
4404 fcp->isp_maxalloc);
4405 PRINTF(" Max Frame Length = %d\n",
4406 fcp->isp_maxfrmlen);
4407 PRINTF(" Execution Throttle = %d\n",
4408 fcp->isp_execthrottle);
4409 PRINTF(" Retry Count = %d\n",
4410 fcp->isp_retry_count);
4411 PRINTF(" Retry Delay = %d\n",
4412 fcp->isp_retry_delay);
4413 PRINTF(" Hard Loop ID = %d\n",
4414 fcp->isp_loopid);
4415 PRINTF(" Options = 0x%x\n",
4416 fcp->isp_fwoptions);
4417 PRINTF(" HBA Options = 0x%x\n",
4418 ISP2100_NVRAM_HBA_OPTIONS(nvram_data));
4419 }
4149 isp_parse_nvram_2100(isp, nvram_data);
4420 }
4421 IDPRINTF(3, ("%s: NVRAM is valid\n", isp->isp_name));
4422 return (0);
4150 }
4151 IDPRINTF(3, ("%s: NVRAM is valid\n", isp->isp_name));
4152 return (0);
4153#undef nvram_data
4154#undef nvram_words
4423}
4424
4425static void
4426isp_rdnvram_word(isp, wo, rp)
4427 struct ispsoftc *isp;
4428 int wo;
4429 u_int16_t *rp;
4430{

--- 53 unchanged lines hidden (view full) ---

4484 SYS_DELAY(2);
4485 }
4486 ISP_WRITE(isp, BIU_NVRAM, 0);
4487 SYS_DELAY(2);
4488#if BYTE_ORDER == BIG_ENDIAN
4489 *rp = ((*rp >> 8) | ((*rp & 0xff) << 8));
4490#endif
4491}
4155}
4156
4157static void
4158isp_rdnvram_word(isp, wo, rp)
4159 struct ispsoftc *isp;
4160 int wo;
4161 u_int16_t *rp;
4162{

--- 53 unchanged lines hidden (view full) ---

4216 SYS_DELAY(2);
4217 }
4218 ISP_WRITE(isp, BIU_NVRAM, 0);
4219 SYS_DELAY(2);
4220#if BYTE_ORDER == BIG_ENDIAN
4221 *rp = ((*rp >> 8) | ((*rp & 0xff) << 8));
4222#endif
4223}
4224
4225static void
4226isp_parse_nvram_1020(isp, nvram_data)
4227 struct ispsoftc *isp;
4228 u_int8_t *nvram_data;
4229{
4230 int i;
4231 static char *tru = "true";
4232 static char *not = "false";
4233 sdparam *sdp = (sdparam *) isp->isp_param;
4234
4235 sdp->isp_fifo_threshold =
4236 ISP_NVRAM_FIFO_THRESHOLD(nvram_data) |
4237 (ISP_NVRAM_FIFO_THRESHOLD_128(nvram_data) << 2);
4238
4239 sdp->isp_initiator_id =
4240 ISP_NVRAM_INITIATOR_ID(nvram_data);
4241
4242 sdp->isp_bus_reset_delay =
4243 ISP_NVRAM_BUS_RESET_DELAY(nvram_data);
4244
4245 sdp->isp_retry_count =
4246 ISP_NVRAM_BUS_RETRY_COUNT(nvram_data);
4247
4248 sdp->isp_retry_delay =
4249 ISP_NVRAM_BUS_RETRY_DELAY(nvram_data);
4250
4251 sdp->isp_async_data_setup =
4252 ISP_NVRAM_ASYNC_DATA_SETUP_TIME(nvram_data);
4253
4254 if (isp->isp_type >= ISP_HA_SCSI_1040) {
4255 if (sdp->isp_async_data_setup < 9) {
4256 sdp->isp_async_data_setup = 9;
4257 }
4258 } else {
4259 if (sdp->isp_async_data_setup != 6) {
4260 sdp->isp_async_data_setup = 6;
4261 }
4262 }
4263
4264 sdp->isp_req_ack_active_neg =
4265 ISP_NVRAM_REQ_ACK_ACTIVE_NEGATION(nvram_data);
4266
4267 sdp->isp_data_line_active_neg =
4268 ISP_NVRAM_DATA_LINE_ACTIVE_NEGATION(nvram_data);
4269
4270 sdp->isp_data_dma_burst_enabl =
4271 ISP_NVRAM_DATA_DMA_BURST_ENABLE(nvram_data);
4272
4273 sdp->isp_cmd_dma_burst_enable =
4274 ISP_NVRAM_CMD_DMA_BURST_ENABLE(nvram_data);
4275
4276 sdp->isp_tag_aging =
4277 ISP_NVRAM_TAG_AGE_LIMIT(nvram_data);
4278
4279 sdp->isp_selection_timeout =
4280 ISP_NVRAM_SELECTION_TIMEOUT(nvram_data);
4281
4282 sdp->isp_max_queue_depth =
4283 ISP_NVRAM_MAX_QUEUE_DEPTH(nvram_data);
4284
4285 isp->isp_fast_mttr = ISP_NVRAM_FAST_MTTR_ENABLE(nvram_data);
4286 if (isp->isp_dblev > 2) {
4287 PRINTF("%s: NVRAM values:\n", isp->isp_name);
4288 PRINTF(" Fifo Threshold = 0x%x\n",
4289 sdp->isp_fifo_threshold);
4290 PRINTF(" Bus Reset Delay = %d\n",
4291 sdp->isp_bus_reset_delay);
4292 PRINTF(" Retry Count = %d\n",
4293 sdp->isp_retry_count);
4294 PRINTF(" Retry Delay = %d\n",
4295 sdp->isp_retry_delay);
4296 PRINTF(" Tag Age Limit = %d\n",
4297 sdp->isp_tag_aging);
4298 PRINTF(" Selection Timeout = %d\n",
4299 sdp->isp_selection_timeout);
4300 PRINTF(" Max Queue Depth = %d\n",
4301 sdp->isp_max_queue_depth);
4302 PRINTF(" Async Data Setup = 0x%x\n",
4303 sdp->isp_async_data_setup);
4304 PRINTF(" REQ/ACK Active Negation = %s\n",
4305 sdp->isp_req_ack_active_neg? tru : not);
4306 PRINTF(" Data Line Active Negation = %s\n",
4307 sdp->isp_data_line_active_neg? tru : not);
4308 PRINTF(" Data DMA Burst Enable = %s\n",
4309 sdp->isp_data_dma_burst_enabl? tru : not);
4310 PRINTF(" Cmd DMA Burst Enable = %s\n",
4311 sdp->isp_cmd_dma_burst_enable? tru : not);
4312 PRINTF(" Fast MTTR = %s\n",
4313 isp->isp_fast_mttr? tru : not);
4314 }
4315 for (i = 0; i < MAX_TARGETS; i++) {
4316 sdp->isp_devparam[i].dev_enable =
4317 ISP_NVRAM_TGT_DEVICE_ENABLE(nvram_data, i);
4318 sdp->isp_devparam[i].exc_throttle =
4319 ISP_NVRAM_TGT_EXEC_THROTTLE(nvram_data, i);
4320 sdp->isp_devparam[i].sync_offset =
4321 ISP_NVRAM_TGT_SYNC_OFFSET(nvram_data, i);
4322 sdp->isp_devparam[i].sync_period =
4323 ISP_NVRAM_TGT_SYNC_PERIOD(nvram_data, i);
4324
4325 if (isp->isp_type < ISP_HA_SCSI_1040) {
4326 /*
4327 * If we're not ultra, we can't possibly
4328 * be a shorter period than this.
4329 */
4330 if (sdp->isp_devparam[i].sync_period < 0x19) {
4331 sdp->isp_devparam[i].sync_period =
4332 0x19;
4333 }
4334 if (sdp->isp_devparam[i].sync_offset > 0xc) {
4335 sdp->isp_devparam[i].sync_offset =
4336 0x0c;
4337 }
4338 } else {
4339 if (sdp->isp_devparam[i].sync_offset > 0x8) {
4340 sdp->isp_devparam[i].sync_offset = 0x8;
4341 }
4342 }
4343 sdp->isp_devparam[i].dev_flags = 0;
4344 if (ISP_NVRAM_TGT_RENEG(nvram_data, i))
4345 sdp->isp_devparam[i].dev_flags |= DPARM_RENEG;
4346 if (ISP_NVRAM_TGT_QFRZ(nvram_data, i)) {
4347 PRINTF("%s: not supporting QFRZ option for "
4348 "target %d\n", isp->isp_name, i);
4349 }
4350 sdp->isp_devparam[i].dev_flags |= DPARM_ARQ;
4351 if (ISP_NVRAM_TGT_ARQ(nvram_data, i) == 0) {
4352 PRINTF("%s: not disabling ARQ option for "
4353 "target %d\n", isp->isp_name, i);
4354 }
4355 if (ISP_NVRAM_TGT_TQING(nvram_data, i))
4356 sdp->isp_devparam[i].dev_flags |= DPARM_TQING;
4357 if (ISP_NVRAM_TGT_SYNC(nvram_data, i))
4358 sdp->isp_devparam[i].dev_flags |= DPARM_SYNC;
4359 if (ISP_NVRAM_TGT_WIDE(nvram_data, i))
4360 sdp->isp_devparam[i].dev_flags |= DPARM_WIDE;
4361 if (ISP_NVRAM_TGT_PARITY(nvram_data, i))
4362 sdp->isp_devparam[i].dev_flags |= DPARM_PARITY;
4363 if (ISP_NVRAM_TGT_DISC(nvram_data, i))
4364 sdp->isp_devparam[i].dev_flags |= DPARM_DISC;
4365 sdp->isp_devparam[i].cur_dflags = 0; /* we don't know */
4366 if (isp->isp_dblev > 2) {
4367 PRINTF(" Target %d: Enabled %d Throttle %d "
4368 "Offset %d Period %d Flags 0x%x\n", i,
4369 sdp->isp_devparam[i].dev_enable,
4370 sdp->isp_devparam[i].exc_throttle,
4371 sdp->isp_devparam[i].sync_offset,
4372 sdp->isp_devparam[i].sync_period,
4373 sdp->isp_devparam[i].dev_flags);
4374 }
4375 }
4376}
4377
4378static void
4379isp_parse_nvram_1080(isp, bus, nvram_data)
4380 struct ispsoftc *isp;
4381 int bus;
4382 u_int8_t *nvram_data;
4383{
4384 static char *tru = "true";
4385 static char *not = "false";
4386 int i;
4387 sdparam *sdp = (sdparam *) isp->isp_param;
4388 sdp += bus;
4389
4390 sdp->isp_fifo_threshold =
4391 ISP1080_NVRAM_FIFO_THRESHOLD(nvram_data);
4392
4393 sdp->isp_initiator_id =
4394 ISP1080_NVRAM_INITIATOR_ID(nvram_data, bus);
4395
4396 sdp->isp_bus_reset_delay =
4397 ISP1080_NVRAM_BUS_RESET_DELAY(nvram_data, bus);
4398
4399 sdp->isp_retry_count =
4400 ISP1080_NVRAM_BUS_RETRY_COUNT(nvram_data, bus);
4401
4402 sdp->isp_retry_delay =
4403 ISP1080_NVRAM_BUS_RETRY_DELAY(nvram_data, bus);
4404
4405 sdp->isp_async_data_setup =
4406 ISP1080_NVRAM_ASYNC_DATA_SETUP_TIME(nvram_data,
4407 bus);
4408
4409 sdp->isp_req_ack_active_neg =
4410 ISP1080_NVRAM_REQ_ACK_ACTIVE_NEGATION(nvram_data,
4411 bus);
4412
4413 sdp->isp_data_line_active_neg =
4414 ISP1080_NVRAM_DATA_LINE_ACTIVE_NEGATION(nvram_data,
4415 bus);
4416
4417 sdp->isp_data_dma_burst_enabl =
4418 ISP1080_NVRAM_BURST_ENABLE(nvram_data);
4419
4420 sdp->isp_cmd_dma_burst_enable =
4421 ISP1080_NVRAM_BURST_ENABLE(nvram_data);
4422
4423 sdp->isp_selection_timeout =
4424 ISP1080_NVRAM_SELECTION_TIMEOUT(nvram_data, bus);
4425
4426 sdp->isp_max_queue_depth =
4427 ISP1080_NVRAM_MAX_QUEUE_DEPTH(nvram_data, bus);
4428
4429 if (isp->isp_dblev >= 3) {
4430 PRINTF("%s: ISP1080 bus %d NVRAM values:\n",
4431 isp->isp_name, bus);
4432 PRINTF(" Initiator ID = %d\n",
4433 sdp->isp_initiator_id);
4434 PRINTF(" Fifo Threshold = 0x%x\n",
4435 sdp->isp_fifo_threshold);
4436 PRINTF(" Bus Reset Delay = %d\n",
4437 sdp->isp_bus_reset_delay);
4438 PRINTF(" Retry Count = %d\n",
4439 sdp->isp_retry_count);
4440 PRINTF(" Retry Delay = %d\n",
4441 sdp->isp_retry_delay);
4442 PRINTF(" Tag Age Limit = %d\n",
4443 sdp->isp_tag_aging);
4444 PRINTF(" Selection Timeout = %d\n",
4445 sdp->isp_selection_timeout);
4446 PRINTF(" Max Queue Depth = %d\n",
4447 sdp->isp_max_queue_depth);
4448 PRINTF(" Async Data Setup = 0x%x\n",
4449 sdp->isp_async_data_setup);
4450 PRINTF(" REQ/ACK Active Negation = %s\n",
4451 sdp->isp_req_ack_active_neg? tru : not);
4452 PRINTF(" Data Line Active Negation = %s\n",
4453 sdp->isp_data_line_active_neg? tru : not);
4454 PRINTF(" Cmd DMA Burst Enable = %s\n",
4455 sdp->isp_cmd_dma_burst_enable? tru : not);
4456 }
4457 for (i = 0; i < MAX_TARGETS; i++) {
4458 sdp->isp_devparam[i].dev_enable =
4459 ISP1080_NVRAM_TGT_DEVICE_ENABLE(nvram_data, i, bus);
4460 sdp->isp_devparam[i].exc_throttle =
4461 ISP1080_NVRAM_TGT_EXEC_THROTTLE(nvram_data, i, bus);
4462 sdp->isp_devparam[i].sync_offset =
4463 ISP1080_NVRAM_TGT_SYNC_OFFSET(nvram_data, i, bus);
4464 sdp->isp_devparam[i].sync_period =
4465 ISP1080_NVRAM_TGT_SYNC_PERIOD(nvram_data, i, bus);
4466 sdp->isp_devparam[i].dev_flags = 0;
4467 if (ISP1080_NVRAM_TGT_RENEG(nvram_data, i, bus))
4468 sdp->isp_devparam[i].dev_flags |= DPARM_RENEG;
4469 if (ISP1080_NVRAM_TGT_QFRZ(nvram_data, i, bus)) {
4470 PRINTF("%s: not supporting QFRZ option "
4471 "for target %d bus %d\n",
4472 isp->isp_name, i, bus);
4473 }
4474 sdp->isp_devparam[i].dev_flags |= DPARM_ARQ;
4475 if (ISP1080_NVRAM_TGT_ARQ(nvram_data, i, bus) == 0) {
4476 PRINTF("%s: not disabling ARQ option "
4477 "for target %d bus %d\n",
4478 isp->isp_name, i, bus);
4479 }
4480 if (ISP1080_NVRAM_TGT_TQING(nvram_data, i, bus))
4481 sdp->isp_devparam[i].dev_flags |= DPARM_TQING;
4482 if (ISP1080_NVRAM_TGT_SYNC(nvram_data, i, bus))
4483 sdp->isp_devparam[i].dev_flags |= DPARM_SYNC;
4484 if (ISP1080_NVRAM_TGT_WIDE(nvram_data, i, bus))
4485 sdp->isp_devparam[i].dev_flags |= DPARM_WIDE;
4486 if (ISP1080_NVRAM_TGT_PARITY(nvram_data, i, bus))
4487 sdp->isp_devparam[i].dev_flags |= DPARM_PARITY;
4488 if (ISP1080_NVRAM_TGT_DISC(nvram_data, i, bus))
4489 sdp->isp_devparam[i].dev_flags |= DPARM_DISC;
4490 sdp->isp_devparam[i].cur_dflags = 0;
4491 if (isp->isp_dblev >= 3) {
4492 PRINTF(" Target %d: Ena %d Throttle "
4493 "%d Offset %d Period %d Flags "
4494 "0x%x\n", i,
4495 sdp->isp_devparam[i].dev_enable,
4496 sdp->isp_devparam[i].exc_throttle,
4497 sdp->isp_devparam[i].sync_offset,
4498 sdp->isp_devparam[i].sync_period,
4499 sdp->isp_devparam[i].dev_flags);
4500 }
4501 }
4502}
4503
4504static void
4505isp_parse_nvram_12160(isp, bus, nvram_data)
4506 struct ispsoftc *isp;
4507 int bus;
4508 u_int8_t *nvram_data;
4509{
4510 static char *tru = "true";
4511 static char *not = "false";
4512 sdparam *sdp = (sdparam *) isp->isp_param;
4513 int i;
4514
4515 sdp += bus;
4516
4517 sdp->isp_fifo_threshold =
4518 ISP12160_NVRAM_FIFO_THRESHOLD(nvram_data);
4519
4520 sdp->isp_initiator_id =
4521 ISP12160_NVRAM_INITIATOR_ID(nvram_data, bus);
4522
4523 sdp->isp_bus_reset_delay =
4524 ISP12160_NVRAM_BUS_RESET_DELAY(nvram_data, bus);
4525
4526 sdp->isp_retry_count =
4527 ISP12160_NVRAM_BUS_RETRY_COUNT(nvram_data, bus);
4528
4529 sdp->isp_retry_delay =
4530 ISP12160_NVRAM_BUS_RETRY_DELAY(nvram_data, bus);
4531
4532 sdp->isp_async_data_setup =
4533 ISP12160_NVRAM_ASYNC_DATA_SETUP_TIME(nvram_data,
4534 bus);
4535
4536 sdp->isp_req_ack_active_neg =
4537 ISP12160_NVRAM_REQ_ACK_ACTIVE_NEGATION(nvram_data,
4538 bus);
4539
4540 sdp->isp_data_line_active_neg =
4541 ISP12160_NVRAM_DATA_LINE_ACTIVE_NEGATION(nvram_data,
4542 bus);
4543
4544 sdp->isp_data_dma_burst_enabl =
4545 ISP12160_NVRAM_BURST_ENABLE(nvram_data);
4546
4547 sdp->isp_cmd_dma_burst_enable =
4548 ISP12160_NVRAM_BURST_ENABLE(nvram_data);
4549
4550 sdp->isp_selection_timeout =
4551 ISP12160_NVRAM_SELECTION_TIMEOUT(nvram_data, bus);
4552
4553 sdp->isp_max_queue_depth =
4554 ISP12160_NVRAM_MAX_QUEUE_DEPTH(nvram_data, bus);
4555
4556 if (isp->isp_dblev >= 3) {
4557 PRINTF("%s: ISP12160 bus %d NVRAM values:\n",
4558 isp->isp_name, bus);
4559 PRINTF(" Initiator ID = %d\n",
4560 sdp->isp_initiator_id);
4561 PRINTF(" Fifo Threshold = 0x%x\n",
4562 sdp->isp_fifo_threshold);
4563 PRINTF(" Bus Reset Delay = %d\n",
4564 sdp->isp_bus_reset_delay);
4565 PRINTF(" Retry Count = %d\n",
4566 sdp->isp_retry_count);
4567 PRINTF(" Retry Delay = %d\n",
4568 sdp->isp_retry_delay);
4569 PRINTF(" Tag Age Limit = %d\n",
4570 sdp->isp_tag_aging);
4571 PRINTF(" Selection Timeout = %d\n",
4572 sdp->isp_selection_timeout);
4573 PRINTF(" Max Queue Depth = %d\n",
4574 sdp->isp_max_queue_depth);
4575 PRINTF(" Async Data Setup = 0x%x\n",
4576 sdp->isp_async_data_setup);
4577 PRINTF(" REQ/ACK Active Negation = %s\n",
4578 sdp->isp_req_ack_active_neg? tru : not);
4579 PRINTF(" Data Line Active Negation = %s\n",
4580 sdp->isp_data_line_active_neg? tru : not);
4581 PRINTF(" Cmd DMA Burst Enable = %s\n",
4582 sdp->isp_cmd_dma_burst_enable? tru : not);
4583 }
4584
4585 for (i = 0; i < MAX_TARGETS; i++) {
4586 sdp->isp_devparam[i].dev_enable =
4587 ISP12160_NVRAM_TGT_DEVICE_ENABLE(nvram_data, i, bus);
4588 sdp->isp_devparam[i].exc_throttle =
4589 ISP12160_NVRAM_TGT_EXEC_THROTTLE(nvram_data, i, bus);
4590 sdp->isp_devparam[i].sync_offset =
4591 ISP12160_NVRAM_TGT_SYNC_OFFSET(nvram_data, i, bus);
4592 sdp->isp_devparam[i].sync_period =
4593 ISP12160_NVRAM_TGT_SYNC_PERIOD(nvram_data, i, bus);
4594 sdp->isp_devparam[i].dev_flags = 0;
4595 if (ISP12160_NVRAM_TGT_RENEG(nvram_data, i, bus))
4596 sdp->isp_devparam[i].dev_flags |= DPARM_RENEG;
4597 if (ISP12160_NVRAM_TGT_QFRZ(nvram_data, i, bus)) {
4598 PRINTF("%s: not supporting QFRZ option "
4599 "for target %d bus %d\n", isp->isp_name, i, bus);
4600 }
4601 sdp->isp_devparam[i].dev_flags |= DPARM_ARQ;
4602 if (ISP12160_NVRAM_TGT_ARQ(nvram_data, i, bus) == 0) {
4603 PRINTF("%s: not disabling ARQ option "
4604 "for target %d bus %d\n", isp->isp_name, i, bus);
4605 }
4606 if (ISP12160_NVRAM_TGT_TQING(nvram_data, i, bus))
4607 sdp->isp_devparam[i].dev_flags |= DPARM_TQING;
4608 if (ISP12160_NVRAM_TGT_SYNC(nvram_data, i, bus))
4609 sdp->isp_devparam[i].dev_flags |= DPARM_SYNC;
4610 if (ISP12160_NVRAM_TGT_WIDE(nvram_data, i, bus))
4611 sdp->isp_devparam[i].dev_flags |= DPARM_WIDE;
4612 if (ISP12160_NVRAM_TGT_PARITY(nvram_data, i, bus))
4613 sdp->isp_devparam[i].dev_flags |= DPARM_PARITY;
4614 if (ISP12160_NVRAM_TGT_DISC(nvram_data, i, bus))
4615 sdp->isp_devparam[i].dev_flags |= DPARM_DISC;
4616 sdp->isp_devparam[i].cur_dflags = 0;
4617 if (isp->isp_dblev >= 3) {
4618 PRINTF(" Target %d: Ena %d Throttle %d Offset %d "
4619 "Period %d Flags 0x%x\n", i,
4620 sdp->isp_devparam[i].dev_enable,
4621 sdp->isp_devparam[i].exc_throttle,
4622 sdp->isp_devparam[i].sync_offset,
4623 sdp->isp_devparam[i].sync_period,
4624 sdp->isp_devparam[i].dev_flags);
4625 }
4626 }
4627}
4628
4629static void
4630isp_parse_nvram_2100(isp, nvram_data)
4631 struct ispsoftc *isp;
4632 u_int8_t *nvram_data;
4633{
4634 fcparam *fcp = (fcparam *) isp->isp_param;
4635 union {
4636 struct {
4637#if BYTE_ORDER == BIG_ENDIAN
4638 u_int32_t hi32;
4639 u_int32_t lo32;
4640#else
4641 u_int32_t lo32;
4642 u_int32_t hi32;
4643#endif
4644 } wd;
4645 u_int64_t full64;
4646 } wwnstore;
4647
4648 wwnstore.full64 = ISP2100_NVRAM_NODE_NAME(nvram_data);
4649
4650 /*
4651 * Broken PTI cards with nothing in the top nibble. Pah.
4652 */
4653 if ((wwnstore.wd.hi32 >> 28) == 0) {
4654 wwnstore.wd.hi32 |= (2 << 28);
4655 CFGPRINTF("%s: (corrected) Adapter WWN 0x%08x%08x\n",
4656 isp->isp_name, wwnstore.wd.hi32, wwnstore.wd.lo32);
4657 } else {
4658 CFGPRINTF("%s: Adapter WWN 0x%08x%08x\n", isp->isp_name,
4659 wwnstore.wd.hi32, wwnstore.wd.lo32);
4660 }
4661 fcp->isp_nodewwn = wwnstore.full64;
4662
4663 /*
4664 * If the Node WWN has 2 in the top nibble, we can
4665 * authoritatively construct a Port WWN by adding
4666 * our unit number (plus one to make it nonzero) and
4667 * putting it into bits 59..56. If the top nibble isn't
4668 * 2, then we just set them identically.
4669 */
4670 if ((fcp->isp_nodewwn >> 60) == 2) {
4671 fcp->isp_portwwn = fcp->isp_nodewwn |
4672 (((u_int64_t)(isp->isp_unit+1)) << 56);
4673 } else {
4674 fcp->isp_portwwn = fcp->isp_nodewwn;
4675 }
4676 wwnstore.full64 = ISP2100_NVRAM_BOOT_NODE_NAME(nvram_data);
4677 if (wwnstore.full64 != 0) {
4678 PRINTF("%s: BOOT DEVICE WWN 0x%08x%08x\n",
4679 isp->isp_name, wwnstore.wd.hi32, wwnstore.wd.lo32);
4680 }
4681 fcp->isp_maxalloc =
4682 ISP2100_NVRAM_MAXIOCBALLOCATION(nvram_data);
4683 fcp->isp_maxfrmlen =
4684 ISP2100_NVRAM_MAXFRAMELENGTH(nvram_data);
4685 fcp->isp_retry_delay =
4686 ISP2100_NVRAM_RETRY_DELAY(nvram_data);
4687 fcp->isp_retry_count =
4688 ISP2100_NVRAM_RETRY_COUNT(nvram_data);
4689 fcp->isp_loopid =
4690 ISP2100_NVRAM_HARDLOOPID(nvram_data);
4691 fcp->isp_execthrottle =
4692 ISP2100_NVRAM_EXECUTION_THROTTLE(nvram_data);
4693 fcp->isp_fwoptions = ISP2100_NVRAM_OPTIONS(nvram_data);
4694 if (isp->isp_dblev > 2) {
4695 PRINTF("%s: NVRAM values:\n", isp->isp_name);
4696 PRINTF(" Max IOCB Allocation = %d\n",
4697 fcp->isp_maxalloc);
4698 PRINTF(" Max Frame Length = %d\n",
4699 fcp->isp_maxfrmlen);
4700 PRINTF(" Execution Throttle = %d\n",
4701 fcp->isp_execthrottle);
4702 PRINTF(" Retry Count = %d\n",
4703 fcp->isp_retry_count);
4704 PRINTF(" Retry Delay = %d\n",
4705 fcp->isp_retry_delay);
4706 PRINTF(" Hard Loop ID = %d\n",
4707 fcp->isp_loopid);
4708 PRINTF(" Options = 0x%x\n",
4709 fcp->isp_fwoptions);
4710 PRINTF(" HBA Options = 0x%x\n",
4711 ISP2100_NVRAM_HBA_OPTIONS(nvram_data));
4712 }
4713}