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if_igb.c (217556) if_igb.c (218530)
1/******************************************************************************
2
3 Copyright (c) 2001-2010, Intel Corporation
4 All rights reserved.
5
6 Redistribution and use in source and binary forms, with or without
7 modification, are permitted provided that the following conditions are met:
8

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25 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30 POSSIBILITY OF SUCH DAMAGE.
31
32******************************************************************************/
1/******************************************************************************
2
3 Copyright (c) 2001-2010, Intel Corporation
4 All rights reserved.
5
6 Redistribution and use in source and binary forms, with or without
7 modification, are permitted provided that the following conditions are met:
8

--- 16 unchanged lines hidden (view full) ---

25 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30 POSSIBILITY OF SUCH DAMAGE.
31
32******************************************************************************/
33/*$FreeBSD: head/sys/dev/e1000/if_igb.c 217556 2011-01-18 21:14:23Z mdf $*/
33/*$FreeBSD: head/sys/dev/e1000/if_igb.c 218530 2011-02-11 01:00:26Z jfv $*/
34
35
36#ifdef HAVE_KERNEL_OPTION_HEADERS
37#include "opt_device_polling.h"
38#include "opt_inet.h"
39#include "opt_altq.h"
40#endif
41

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94/*********************************************************************
95 * Set this to one to display debug statistics
96 *********************************************************************/
97int igb_display_debug_stats = 0;
98
99/*********************************************************************
100 * Driver version:
101 *********************************************************************/
34
35
36#ifdef HAVE_KERNEL_OPTION_HEADERS
37#include "opt_device_polling.h"
38#include "opt_inet.h"
39#include "opt_altq.h"
40#endif
41

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94/*********************************************************************
95 * Set this to one to display debug statistics
96 *********************************************************************/
97int igb_display_debug_stats = 0;
98
99/*********************************************************************
100 * Driver version:
101 *********************************************************************/
102char igb_driver_version[] = "version - 2.0.7";
102char igb_driver_version[] = "version - 2.1.3";
103
104
105/*********************************************************************
106 * PCI Device ID Table
107 *
108 * Used by probe to select devices to load on
109 * Last field stores an index into e1000_strings
110 * Last entry must be all 0s

--- 25 unchanged lines hidden (view full) ---

136 { 0x8086, E1000_DEV_ID_82580_SERDES, PCI_ANY_ID, PCI_ANY_ID, 0},
137 { 0x8086, E1000_DEV_ID_82580_SGMII, PCI_ANY_ID, PCI_ANY_ID, 0},
138 { 0x8086, E1000_DEV_ID_82580_COPPER_DUAL,
139 PCI_ANY_ID, PCI_ANY_ID, 0},
140 { 0x8086, E1000_DEV_ID_82580_QUAD_FIBER,
141 PCI_ANY_ID, PCI_ANY_ID, 0},
142 { 0x8086, E1000_DEV_ID_DH89XXCC_SERDES, PCI_ANY_ID, PCI_ANY_ID, 0},
143 { 0x8086, E1000_DEV_ID_DH89XXCC_SGMII, PCI_ANY_ID, PCI_ANY_ID, 0},
103
104
105/*********************************************************************
106 * PCI Device ID Table
107 *
108 * Used by probe to select devices to load on
109 * Last field stores an index into e1000_strings
110 * Last entry must be all 0s

--- 25 unchanged lines hidden (view full) ---

136 { 0x8086, E1000_DEV_ID_82580_SERDES, PCI_ANY_ID, PCI_ANY_ID, 0},
137 { 0x8086, E1000_DEV_ID_82580_SGMII, PCI_ANY_ID, PCI_ANY_ID, 0},
138 { 0x8086, E1000_DEV_ID_82580_COPPER_DUAL,
139 PCI_ANY_ID, PCI_ANY_ID, 0},
140 { 0x8086, E1000_DEV_ID_82580_QUAD_FIBER,
141 PCI_ANY_ID, PCI_ANY_ID, 0},
142 { 0x8086, E1000_DEV_ID_DH89XXCC_SERDES, PCI_ANY_ID, PCI_ANY_ID, 0},
143 { 0x8086, E1000_DEV_ID_DH89XXCC_SGMII, PCI_ANY_ID, PCI_ANY_ID, 0},
144 { 0x8086, E1000_DEV_ID_DH89XXCC_SFP, PCI_ANY_ID, PCI_ANY_ID, 0},
145 { 0x8086, E1000_DEV_ID_DH89XXCC_BACKPLANE,
146 PCI_ANY_ID, PCI_ANY_ID, 0},
147 { 0x8086, E1000_DEV_ID_I350_COPPER, PCI_ANY_ID, PCI_ANY_ID, 0},
148 { 0x8086, E1000_DEV_ID_I350_FIBER, PCI_ANY_ID, PCI_ANY_ID, 0},
149 { 0x8086, E1000_DEV_ID_I350_SERDES, PCI_ANY_ID, PCI_ANY_ID, 0},
150 { 0x8086, E1000_DEV_ID_I350_SGMII, PCI_ANY_ID, PCI_ANY_ID, 0},
151 { 0x8086, E1000_DEV_ID_I350_VF, PCI_ANY_ID, PCI_ANY_ID, 0},
144 /* required last entry */
145 { 0, 0, 0, 0, 0}
146};
147
148/*********************************************************************
149 * Table of branding strings for all supported NICs.
150 *********************************************************************/
151

--- 348 unchanged lines hidden (view full) ---

500 ** Allocate and Setup Queues
501 */
502 if (igb_allocate_queues(adapter)) {
503 error = ENOMEM;
504 goto err_pci;
505 }
506
507 /* Allocate the appropriate stats memory */
152 /* required last entry */
153 { 0, 0, 0, 0, 0}
154};
155
156/*********************************************************************
157 * Table of branding strings for all supported NICs.
158 *********************************************************************/
159

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508 ** Allocate and Setup Queues
509 */
510 if (igb_allocate_queues(adapter)) {
511 error = ENOMEM;
512 goto err_pci;
513 }
514
515 /* Allocate the appropriate stats memory */
508 if (adapter->hw.mac.type == e1000_vfadapt) {
516 if (adapter->vf_ifp) {
509 adapter->stats =
510 (struct e1000_vf_stats *)malloc(sizeof \
511 (struct e1000_vf_stats), M_DEVBUF, M_NOWAIT | M_ZERO);
512 igb_vf_init_stats(adapter);
513 } else
514 adapter->stats =
515 (struct e1000_hw_stats *)malloc(sizeof \
516 (struct e1000_hw_stats), M_DEVBUF, M_NOWAIT | M_ZERO);

--- 270 unchanged lines hidden (view full) ---

787 IGB_TX_LOCK_ASSERT(txr);
788
789 if ((ifp->if_drv_flags & (IFF_DRV_RUNNING|IFF_DRV_OACTIVE)) !=
790 IFF_DRV_RUNNING)
791 return;
792 if (!adapter->link_active)
793 return;
794
517 adapter->stats =
518 (struct e1000_vf_stats *)malloc(sizeof \
519 (struct e1000_vf_stats), M_DEVBUF, M_NOWAIT | M_ZERO);
520 igb_vf_init_stats(adapter);
521 } else
522 adapter->stats =
523 (struct e1000_hw_stats *)malloc(sizeof \
524 (struct e1000_hw_stats), M_DEVBUF, M_NOWAIT | M_ZERO);

--- 270 unchanged lines hidden (view full) ---

795 IGB_TX_LOCK_ASSERT(txr);
796
797 if ((ifp->if_drv_flags & (IFF_DRV_RUNNING|IFF_DRV_OACTIVE)) !=
798 IFF_DRV_RUNNING)
799 return;
800 if (!adapter->link_active)
801 return;
802
795 /* Call cleanup if number of TX descriptors low */
796 if (txr->tx_avail <= IGB_TX_CLEANUP_THRESHOLD)
797 igb_txeof(txr);
798
799 while (!IFQ_DRV_IS_EMPTY(&ifp->if_snd)) {
803 while (!IFQ_DRV_IS_EMPTY(&ifp->if_snd)) {
804 /* Cleanup if TX descriptors are low */
805 if (txr->tx_avail <= IGB_TX_CLEANUP_THRESHOLD)
806 igb_txeof(txr);
800 if (txr->tx_avail <= IGB_TX_OP_THRESHOLD) {
801 ifp->if_drv_flags |= IFF_DRV_OACTIVE;
802 break;
803 }
804 IFQ_DRV_DEQUEUE(&ifp->if_snd, m_head);
805 if (m_head == NULL)
806 break;
807 /*

--- 78 unchanged lines hidden (view full) ---

886
887 if ((ifp->if_drv_flags & (IFF_DRV_RUNNING | IFF_DRV_OACTIVE)) !=
888 IFF_DRV_RUNNING || adapter->link_active == 0) {
889 if (m != NULL)
890 err = drbr_enqueue(ifp, txr->br, m);
891 return (err);
892 }
893
807 if (txr->tx_avail <= IGB_TX_OP_THRESHOLD) {
808 ifp->if_drv_flags |= IFF_DRV_OACTIVE;
809 break;
810 }
811 IFQ_DRV_DEQUEUE(&ifp->if_snd, m_head);
812 if (m_head == NULL)
813 break;
814 /*

--- 78 unchanged lines hidden (view full) ---

893
894 if ((ifp->if_drv_flags & (IFF_DRV_RUNNING | IFF_DRV_OACTIVE)) !=
895 IFF_DRV_RUNNING || adapter->link_active == 0) {
896 if (m != NULL)
897 err = drbr_enqueue(ifp, txr->br, m);
898 return (err);
899 }
900
894 /* Call cleanup if number of TX descriptors low */
895 if (txr->tx_avail <= IGB_TX_CLEANUP_THRESHOLD)
896 igb_txeof(txr);
897
898 enq = 0;
899 if (m == NULL) {
900 next = drbr_dequeue(ifp, txr->br);
901 } else if (drbr_needs_enqueue(ifp, txr->br)) {
902 if ((err = drbr_enqueue(ifp, txr->br, m)) != 0)
903 return (err);
904 next = drbr_dequeue(ifp, txr->br);
905 } else
906 next = m;
907
908 /* Process the queue */
909 while (next != NULL) {
901 enq = 0;
902 if (m == NULL) {
903 next = drbr_dequeue(ifp, txr->br);
904 } else if (drbr_needs_enqueue(ifp, txr->br)) {
905 if ((err = drbr_enqueue(ifp, txr->br, m)) != 0)
906 return (err);
907 next = drbr_dequeue(ifp, txr->br);
908 } else
909 next = m;
910
911 /* Process the queue */
912 while (next != NULL) {
913 /* Call cleanup if number of TX descriptors low */
914 if (txr->tx_avail <= IGB_TX_CLEANUP_THRESHOLD)
915 igb_txeof(txr);
916 if (txr->tx_avail <= IGB_TX_OP_THRESHOLD) {
917 ifp->if_drv_flags |= IFF_DRV_OACTIVE;
918 break;
919 }
910 if ((err = igb_xmit(txr, &next)) != 0) {
911 if (next != NULL)
912 err = drbr_enqueue(ifp, txr->br, next);
913 break;
914 }
915 enq++;
916 drbr_stats_update(ifp, next->m_pkthdr.len, next->m_flags);
917 ETHER_BPF_MTAP(ifp, next);
918 if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0)
919 break;
920 if ((err = igb_xmit(txr, &next)) != 0) {
921 if (next != NULL)
922 err = drbr_enqueue(ifp, txr->br, next);
923 break;
924 }
925 enq++;
926 drbr_stats_update(ifp, next->m_pkthdr.len, next->m_flags);
927 ETHER_BPF_MTAP(ifp, next);
928 if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0)
929 break;
920 if (txr->tx_avail <= IGB_TX_OP_THRESHOLD) {
921 ifp->if_drv_flags |= IFF_DRV_OACTIVE;
922 break;
923 }
924 next = drbr_dequeue(ifp, txr->br);
925 }
926 if (enq > 0) {
927 /* Set the watchdog */
928 txr->queue_status = IGB_QUEUE_WORKING;
929 txr->watchdog_time = ticks;
930 }
931 return (err);

--- 273 unchanged lines hidden (view full) ---

1205
1206 /* Prepare receive descriptors and buffers */
1207 if (igb_setup_receive_structures(adapter)) {
1208 device_printf(dev, "Could not setup receive structures\n");
1209 return;
1210 }
1211 igb_initialize_receive_units(adapter);
1212
930 next = drbr_dequeue(ifp, txr->br);
931 }
932 if (enq > 0) {
933 /* Set the watchdog */
934 txr->queue_status = IGB_QUEUE_WORKING;
935 txr->watchdog_time = ticks;
936 }
937 return (err);

--- 273 unchanged lines hidden (view full) ---

1211
1212 /* Prepare receive descriptors and buffers */
1213 if (igb_setup_receive_structures(adapter)) {
1214 device_printf(dev, "Could not setup receive structures\n");
1215 return;
1216 }
1217 igb_initialize_receive_units(adapter);
1218
1213 /* Use real VLAN Filter support? */
1214 if (ifp->if_capenable & IFCAP_VLAN_HWTAGGING) {
1215 if (ifp->if_capenable & IFCAP_VLAN_HWFILTER)
1216 /* Use real VLAN Filter support */
1217 igb_setup_vlan_hw_support(adapter);
1218 else {
1219 u32 ctrl;
1220 ctrl = E1000_READ_REG(&adapter->hw, E1000_CTRL);
1221 ctrl |= E1000_CTRL_VME;
1222 E1000_WRITE_REG(&adapter->hw, E1000_CTRL, ctrl);
1223 }
1224 }
1219 /* Enable VLAN support */
1220 if (ifp->if_capenable & IFCAP_VLAN_HWTAGGING)
1221 igb_setup_vlan_hw_support(adapter);
1225
1226 /* Don't lose promiscuous settings */
1227 igb_set_promisc(adapter);
1228
1229 ifp->if_drv_flags |= IFF_DRV_RUNNING;
1230 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
1231
1232 callout_reset(&adapter->timer, hz, igb_local_timer, adapter);

--- 48 unchanged lines hidden (view full) ---

1281
1282 IGB_TX_LOCK(txr);
1283 if (igb_txeof(txr))
1284 more = TRUE;
1285#if __FreeBSD_version >= 800000
1286 if (!drbr_empty(ifp, txr->br))
1287 igb_mq_start_locked(ifp, txr, NULL);
1288#else
1222
1223 /* Don't lose promiscuous settings */
1224 igb_set_promisc(adapter);
1225
1226 ifp->if_drv_flags |= IFF_DRV_RUNNING;
1227 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
1228
1229 callout_reset(&adapter->timer, hz, igb_local_timer, adapter);

--- 48 unchanged lines hidden (view full) ---

1278
1279 IGB_TX_LOCK(txr);
1280 if (igb_txeof(txr))
1281 more = TRUE;
1282#if __FreeBSD_version >= 800000
1283 if (!drbr_empty(ifp, txr->br))
1284 igb_mq_start_locked(ifp, txr, NULL);
1285#else
1289 if (!IFQ_DRV_IS_EMPTY(&ifp->if_snd))
1290 igb_start_locked(txr, ifp);
1286 igb_start_locked(txr, ifp);
1291#endif
1292 IGB_TX_UNLOCK(txr);
1287#endif
1288 IGB_TX_UNLOCK(txr);
1293 if (more) {
1289 if (more || (ifp->if_drv_flags & IFF_DRV_OACTIVE)) {
1294 taskqueue_enqueue(que->tq, &que->que_task);
1295 return;
1296 }
1297 }
1298
1299#ifdef DEVICE_POLLING
1300 if (ifp->if_capenable & IFCAP_POLLING)
1301 return;

--- 104 unchanged lines hidden (view full) ---

1406 IGB_TX_LOCK(txr);
1407 do {
1408 more = igb_txeof(txr);
1409 } while (loop-- && more);
1410#if __FreeBSD_version >= 800000
1411 if (!drbr_empty(ifp, txr->br))
1412 igb_mq_start_locked(ifp, txr, NULL);
1413#else
1290 taskqueue_enqueue(que->tq, &que->que_task);
1291 return;
1292 }
1293 }
1294
1295#ifdef DEVICE_POLLING
1296 if (ifp->if_capenable & IFCAP_POLLING)
1297 return;

--- 104 unchanged lines hidden (view full) ---

1402 IGB_TX_LOCK(txr);
1403 do {
1404 more = igb_txeof(txr);
1405 } while (loop-- && more);
1406#if __FreeBSD_version >= 800000
1407 if (!drbr_empty(ifp, txr->br))
1408 igb_mq_start_locked(ifp, txr, NULL);
1409#else
1414 if (!IFQ_DRV_IS_EMPTY(&ifp->if_snd))
1415 igb_start_locked(txr, ifp);
1410 igb_start_locked(txr, ifp);
1416#endif
1417 IGB_TX_UNLOCK(txr);
1418 return POLL_RETURN_COUNT(rx_done);
1419}
1420#endif /* DEVICE_POLLING */
1421
1422/*********************************************************************
1423 *

--- 67 unchanged lines hidden (view full) ---

1491 /* Reset state */
1492 txr->bytes = 0;
1493 txr->packets = 0;
1494 rxr->bytes = 0;
1495 rxr->packets = 0;
1496
1497no_calc:
1498 /* Schedule a clean task if needed*/
1411#endif
1412 IGB_TX_UNLOCK(txr);
1413 return POLL_RETURN_COUNT(rx_done);
1414}
1415#endif /* DEVICE_POLLING */
1416
1417/*********************************************************************
1418 *

--- 67 unchanged lines hidden (view full) ---

1486 /* Reset state */
1487 txr->bytes = 0;
1488 txr->packets = 0;
1489 rxr->bytes = 0;
1490 rxr->packets = 0;
1491
1492no_calc:
1493 /* Schedule a clean task if needed*/
1499 if (more_tx || more_rx)
1494 if (more_tx || more_rx ||
1495 (adapter->ifp->if_drv_flags & IFF_DRV_OACTIVE))
1500 taskqueue_enqueue(que->tq, &que->que_task);
1501 else
1502 /* Reenable this interrupt */
1503 E1000_WRITE_REG(&adapter->hw, E1000_EIMS, que->eims);
1504 return;
1505}
1506
1507

--- 157 unchanged lines hidden (view full) ---

1665
1666
1667 /* Set basic descriptor constants */
1668 cmd_type_len |= E1000_ADVTXD_DTYP_DATA;
1669 cmd_type_len |= E1000_ADVTXD_DCMD_IFCS | E1000_ADVTXD_DCMD_DEXT;
1670 if (m_head->m_flags & M_VLANTAG)
1671 cmd_type_len |= E1000_ADVTXD_DCMD_VLE;
1672
1496 taskqueue_enqueue(que->tq, &que->que_task);
1497 else
1498 /* Reenable this interrupt */
1499 E1000_WRITE_REG(&adapter->hw, E1000_EIMS, que->eims);
1500 return;
1501}
1502
1503

--- 157 unchanged lines hidden (view full) ---

1661
1662
1663 /* Set basic descriptor constants */
1664 cmd_type_len |= E1000_ADVTXD_DTYP_DATA;
1665 cmd_type_len |= E1000_ADVTXD_DCMD_IFCS | E1000_ADVTXD_DCMD_DEXT;
1666 if (m_head->m_flags & M_VLANTAG)
1667 cmd_type_len |= E1000_ADVTXD_DCMD_VLE;
1668
1673 /*
1674 * Force a cleanup if number of TX descriptors
1675 * available hits the threshold
1676 */
1677 if (txr->tx_avail <= IGB_TX_CLEANUP_THRESHOLD) {
1678 igb_txeof(txr);
1679 /* Now do we at least have a minimal? */
1680 if (txr->tx_avail <= IGB_TX_OP_THRESHOLD) {
1681 txr->no_desc_avail++;
1682 return (ENOBUFS);
1683 }
1684 }
1685
1686 /*
1687 * Map the packet for DMA.
1688 *
1689 * Capture the first descriptor index,
1690 * this descriptor will have the index
1691 * of the EOP which is the only one that
1692 * now gets a DONE bit writeback.
1693 */

--- 131 unchanged lines hidden (view full) ---

1825
1826static void
1827igb_set_promisc(struct adapter *adapter)
1828{
1829 struct ifnet *ifp = adapter->ifp;
1830 struct e1000_hw *hw = &adapter->hw;
1831 u32 reg;
1832
1669 /*
1670 * Map the packet for DMA.
1671 *
1672 * Capture the first descriptor index,
1673 * this descriptor will have the index
1674 * of the EOP which is the only one that
1675 * now gets a DONE bit writeback.
1676 */

--- 131 unchanged lines hidden (view full) ---

1808
1809static void
1810igb_set_promisc(struct adapter *adapter)
1811{
1812 struct ifnet *ifp = adapter->ifp;
1813 struct e1000_hw *hw = &adapter->hw;
1814 u32 reg;
1815
1833 if (hw->mac.type == e1000_vfadapt) {
1816 if (adapter->vf_ifp) {
1834 e1000_promisc_set_vf(hw, e1000_promisc_enabled);
1835 return;
1836 }
1837
1838 reg = E1000_READ_REG(hw, E1000_RCTL);
1839 if (ifp->if_flags & IFF_PROMISC) {
1840 reg |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
1841 E1000_WRITE_REG(hw, E1000_RCTL, reg);

--- 5 unchanged lines hidden (view full) ---

1847}
1848
1849static void
1850igb_disable_promisc(struct adapter *adapter)
1851{
1852 struct e1000_hw *hw = &adapter->hw;
1853 u32 reg;
1854
1817 e1000_promisc_set_vf(hw, e1000_promisc_enabled);
1818 return;
1819 }
1820
1821 reg = E1000_READ_REG(hw, E1000_RCTL);
1822 if (ifp->if_flags & IFF_PROMISC) {
1823 reg |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
1824 E1000_WRITE_REG(hw, E1000_RCTL, reg);

--- 5 unchanged lines hidden (view full) ---

1830}
1831
1832static void
1833igb_disable_promisc(struct adapter *adapter)
1834{
1835 struct e1000_hw *hw = &adapter->hw;
1836 u32 reg;
1837
1855 if (hw->mac.type == e1000_vfadapt) {
1838 if (adapter->vf_ifp) {
1856 e1000_promisc_set_vf(hw, e1000_promisc_disabled);
1857 return;
1858 }
1859 reg = E1000_READ_REG(hw, E1000_RCTL);
1860 reg &= (~E1000_RCTL_UPE);
1861 reg &= (~E1000_RCTL_MPE);
1862 E1000_WRITE_REG(hw, E1000_RCTL, reg);
1863}

--- 237 unchanged lines hidden (view full) ---

2101 adapter->hw.revision_id = pci_read_config(dev, PCIR_REVID, 1);
2102 adapter->hw.subsystem_vendor_id =
2103 pci_read_config(dev, PCIR_SUBVEND_0, 2);
2104 adapter->hw.subsystem_device_id =
2105 pci_read_config(dev, PCIR_SUBDEV_0, 2);
2106
2107 /* Set MAC type early for PCI setup */
2108 e1000_set_mac_type(&adapter->hw);
1839 e1000_promisc_set_vf(hw, e1000_promisc_disabled);
1840 return;
1841 }
1842 reg = E1000_READ_REG(hw, E1000_RCTL);
1843 reg &= (~E1000_RCTL_UPE);
1844 reg &= (~E1000_RCTL_MPE);
1845 E1000_WRITE_REG(hw, E1000_RCTL, reg);
1846}

--- 237 unchanged lines hidden (view full) ---

2084 adapter->hw.revision_id = pci_read_config(dev, PCIR_REVID, 1);
2085 adapter->hw.subsystem_vendor_id =
2086 pci_read_config(dev, PCIR_SUBVEND_0, 2);
2087 adapter->hw.subsystem_device_id =
2088 pci_read_config(dev, PCIR_SUBDEV_0, 2);
2089
2090 /* Set MAC type early for PCI setup */
2091 e1000_set_mac_type(&adapter->hw);
2092
2093 /* Are we a VF device? */
2094 if ((adapter->hw.mac.type == e1000_vfadapt) ||
2095 (adapter->hw.mac.type == e1000_vfadapt_i350))
2096 adapter->vf_ifp = 1;
2097 else
2098 adapter->vf_ifp = 0;
2109}
2110
2111static int
2112igb_allocate_pci_resources(struct adapter *adapter)
2113{
2114 device_t dev = adapter->dev;
2115 int rid;
2116

--- 153 unchanged lines hidden (view full) ---

2270static void
2271igb_configure_queues(struct adapter *adapter)
2272{
2273 struct e1000_hw *hw = &adapter->hw;
2274 struct igb_queue *que;
2275 u32 tmp, ivar = 0, newitr = 0;
2276
2277 /* First turn on RSS capability */
2099}
2100
2101static int
2102igb_allocate_pci_resources(struct adapter *adapter)
2103{
2104 device_t dev = adapter->dev;
2105 int rid;
2106

--- 153 unchanged lines hidden (view full) ---

2260static void
2261igb_configure_queues(struct adapter *adapter)
2262{
2263 struct e1000_hw *hw = &adapter->hw;
2264 struct igb_queue *que;
2265 u32 tmp, ivar = 0, newitr = 0;
2266
2267 /* First turn on RSS capability */
2278 if (adapter->hw.mac.type > e1000_82575)
2268 if (adapter->hw.mac.type != e1000_82575)
2279 E1000_WRITE_REG(hw, E1000_GPIE,
2280 E1000_GPIE_MSIX_MODE | E1000_GPIE_EIAME |
2281 E1000_GPIE_PBA | E1000_GPIE_NSICR);
2282
2283 /* Turn on MSIX */
2284 switch (adapter->hw.mac.type) {
2285 case e1000_82580:
2269 E1000_WRITE_REG(hw, E1000_GPIE,
2270 E1000_GPIE_MSIX_MODE | E1000_GPIE_EIAME |
2271 E1000_GPIE_PBA | E1000_GPIE_NSICR);
2272
2273 /* Turn on MSIX */
2274 switch (adapter->hw.mac.type) {
2275 case e1000_82580:
2276 case e1000_i350:
2286 case e1000_vfadapt:
2277 case e1000_vfadapt:
2278 case e1000_vfadapt_i350:
2287 /* RX entries */
2288 for (int i = 0; i < adapter->num_queues; i++) {
2289 u32 index = i >> 1;
2290 ivar = E1000_READ_REG_ARRAY(hw, E1000_IVAR0, index);
2291 que = &adapter->queues[i];
2292 if (i & 1) {
2293 ivar &= 0xFF00FFFF;
2294 ivar |= (que->msix | E1000_IVAR_VALID) << 16;

--- 11 unchanged lines hidden (view full) ---

2306 if (i & 1) {
2307 ivar &= 0x00FFFFFF;
2308 ivar |= (que->msix | E1000_IVAR_VALID) << 24;
2309 } else {
2310 ivar &= 0xFFFF00FF;
2311 ivar |= (que->msix | E1000_IVAR_VALID) << 8;
2312 }
2313 E1000_WRITE_REG_ARRAY(hw, E1000_IVAR0, index, ivar);
2279 /* RX entries */
2280 for (int i = 0; i < adapter->num_queues; i++) {
2281 u32 index = i >> 1;
2282 ivar = E1000_READ_REG_ARRAY(hw, E1000_IVAR0, index);
2283 que = &adapter->queues[i];
2284 if (i & 1) {
2285 ivar &= 0xFF00FFFF;
2286 ivar |= (que->msix | E1000_IVAR_VALID) << 16;

--- 11 unchanged lines hidden (view full) ---

2298 if (i & 1) {
2299 ivar &= 0x00FFFFFF;
2300 ivar |= (que->msix | E1000_IVAR_VALID) << 24;
2301 } else {
2302 ivar &= 0xFFFF00FF;
2303 ivar |= (que->msix | E1000_IVAR_VALID) << 8;
2304 }
2305 E1000_WRITE_REG_ARRAY(hw, E1000_IVAR0, index, ivar);
2314 adapter->eims_mask |= que->eims;
2306 adapter->que_mask |= que->eims;
2315 }
2316
2317 /* And for the link interrupt */
2318 ivar = (adapter->linkvec | E1000_IVAR_VALID) << 8;
2319 adapter->link_mask = 1 << adapter->linkvec;
2307 }
2308
2309 /* And for the link interrupt */
2310 ivar = (adapter->linkvec | E1000_IVAR_VALID) << 8;
2311 adapter->link_mask = 1 << adapter->linkvec;
2320 adapter->eims_mask |= adapter->link_mask;
2321 E1000_WRITE_REG(hw, E1000_IVAR_MISC, ivar);
2322 break;
2323 case e1000_82576:
2324 /* RX entries */
2325 for (int i = 0; i < adapter->num_queues; i++) {
2326 u32 index = i & 0x7; /* Each IVAR has two entries */
2327 ivar = E1000_READ_REG_ARRAY(hw, E1000_IVAR0, index);
2328 que = &adapter->queues[i];
2329 if (i < 8) {
2330 ivar &= 0xFFFFFF00;
2331 ivar |= que->msix | E1000_IVAR_VALID;
2332 } else {
2333 ivar &= 0xFF00FFFF;
2334 ivar |= (que->msix | E1000_IVAR_VALID) << 16;
2335 }
2336 E1000_WRITE_REG_ARRAY(hw, E1000_IVAR0, index, ivar);
2312 E1000_WRITE_REG(hw, E1000_IVAR_MISC, ivar);
2313 break;
2314 case e1000_82576:
2315 /* RX entries */
2316 for (int i = 0; i < adapter->num_queues; i++) {
2317 u32 index = i & 0x7; /* Each IVAR has two entries */
2318 ivar = E1000_READ_REG_ARRAY(hw, E1000_IVAR0, index);
2319 que = &adapter->queues[i];
2320 if (i < 8) {
2321 ivar &= 0xFFFFFF00;
2322 ivar |= que->msix | E1000_IVAR_VALID;
2323 } else {
2324 ivar &= 0xFF00FFFF;
2325 ivar |= (que->msix | E1000_IVAR_VALID) << 16;
2326 }
2327 E1000_WRITE_REG_ARRAY(hw, E1000_IVAR0, index, ivar);
2337 adapter->eims_mask |= que->eims;
2328 adapter->que_mask |= que->eims;
2338 }
2339 /* TX entries */
2340 for (int i = 0; i < adapter->num_queues; i++) {
2341 u32 index = i & 0x7; /* Each IVAR has two entries */
2342 ivar = E1000_READ_REG_ARRAY(hw, E1000_IVAR0, index);
2343 que = &adapter->queues[i];
2344 if (i < 8) {
2345 ivar &= 0xFFFF00FF;
2346 ivar |= (que->msix | E1000_IVAR_VALID) << 8;
2347 } else {
2348 ivar &= 0x00FFFFFF;
2349 ivar |= (que->msix | E1000_IVAR_VALID) << 24;
2350 }
2351 E1000_WRITE_REG_ARRAY(hw, E1000_IVAR0, index, ivar);
2329 }
2330 /* TX entries */
2331 for (int i = 0; i < adapter->num_queues; i++) {
2332 u32 index = i & 0x7; /* Each IVAR has two entries */
2333 ivar = E1000_READ_REG_ARRAY(hw, E1000_IVAR0, index);
2334 que = &adapter->queues[i];
2335 if (i < 8) {
2336 ivar &= 0xFFFF00FF;
2337 ivar |= (que->msix | E1000_IVAR_VALID) << 8;
2338 } else {
2339 ivar &= 0x00FFFFFF;
2340 ivar |= (que->msix | E1000_IVAR_VALID) << 24;
2341 }
2342 E1000_WRITE_REG_ARRAY(hw, E1000_IVAR0, index, ivar);
2352 adapter->eims_mask |= que->eims;
2343 adapter->que_mask |= que->eims;
2353 }
2354
2355 /* And for the link interrupt */
2356 ivar = (adapter->linkvec | E1000_IVAR_VALID) << 8;
2357 adapter->link_mask = 1 << adapter->linkvec;
2344 }
2345
2346 /* And for the link interrupt */
2347 ivar = (adapter->linkvec | E1000_IVAR_VALID) << 8;
2348 adapter->link_mask = 1 << adapter->linkvec;
2358 adapter->eims_mask |= adapter->link_mask;
2359 E1000_WRITE_REG(hw, E1000_IVAR_MISC, ivar);
2360 break;
2361
2362 case e1000_82575:
2363 /* enable MSI-X support*/
2364 tmp = E1000_READ_REG(hw, E1000_CTRL_EXT);
2365 tmp |= E1000_CTRL_EXT_PBA_CLR;
2366 /* Auto-Mask interrupts upon ICR read. */

--- 4 unchanged lines hidden (view full) ---

2371 /* Queues */
2372 for (int i = 0; i < adapter->num_queues; i++) {
2373 que = &adapter->queues[i];
2374 tmp = E1000_EICR_RX_QUEUE0 << i;
2375 tmp |= E1000_EICR_TX_QUEUE0 << i;
2376 que->eims = tmp;
2377 E1000_WRITE_REG_ARRAY(hw, E1000_MSIXBM(0),
2378 i, que->eims);
2349 E1000_WRITE_REG(hw, E1000_IVAR_MISC, ivar);
2350 break;
2351
2352 case e1000_82575:
2353 /* enable MSI-X support*/
2354 tmp = E1000_READ_REG(hw, E1000_CTRL_EXT);
2355 tmp |= E1000_CTRL_EXT_PBA_CLR;
2356 /* Auto-Mask interrupts upon ICR read. */

--- 4 unchanged lines hidden (view full) ---

2361 /* Queues */
2362 for (int i = 0; i < adapter->num_queues; i++) {
2363 que = &adapter->queues[i];
2364 tmp = E1000_EICR_RX_QUEUE0 << i;
2365 tmp |= E1000_EICR_TX_QUEUE0 << i;
2366 que->eims = tmp;
2367 E1000_WRITE_REG_ARRAY(hw, E1000_MSIXBM(0),
2368 i, que->eims);
2379 adapter->eims_mask |= que->eims;
2369 adapter->que_mask |= que->eims;
2380 }
2381
2382 /* Link */
2383 E1000_WRITE_REG(hw, E1000_MSIXBM(adapter->linkvec),
2384 E1000_EIMS_OTHER);
2385 adapter->link_mask |= E1000_EIMS_OTHER;
2370 }
2371
2372 /* Link */
2373 E1000_WRITE_REG(hw, E1000_MSIXBM(adapter->linkvec),
2374 E1000_EIMS_OTHER);
2375 adapter->link_mask |= E1000_EIMS_OTHER;
2386 adapter->eims_mask |= adapter->link_mask;
2387 default:
2388 break;
2389 }
2390
2391 /* Set the starting interrupt rate */
2392 if (igb_max_interrupt_rate > 0)
2393 newitr = (4000000 / igb_max_interrupt_rate) & 0x7FFC;
2394

--- 110 unchanged lines hidden (view full) ---

2505 queues = igb_num_queues;
2506 if (queues > 8) /* max queues */
2507 queues = 8;
2508
2509 /* Can have max of 4 queues on 82575 */
2510 if ((adapter->hw.mac.type == e1000_82575) && (queues > 4))
2511 queues = 4;
2512
2376 default:
2377 break;
2378 }
2379
2380 /* Set the starting interrupt rate */
2381 if (igb_max_interrupt_rate > 0)
2382 newitr = (4000000 / igb_max_interrupt_rate) & 0x7FFC;
2383

--- 110 unchanged lines hidden (view full) ---

2494 queues = igb_num_queues;
2495 if (queues > 8) /* max queues */
2496 queues = 8;
2497
2498 /* Can have max of 4 queues on 82575 */
2499 if ((adapter->hw.mac.type == e1000_82575) && (queues > 4))
2500 queues = 4;
2501
2513 /* Limit the VF adapter to one queue */
2514 if (adapter->hw.mac.type == e1000_vfadapt)
2502 /* Limit the VF devices to one queue */
2503 if (adapter->vf_ifp)
2515 queues = 1;
2516
2517 /*
2518 ** One vector (RX/TX pair) per queue
2519 ** plus an additional for Link interrupt
2520 */
2521 want = queues + 1;
2522 if (msgs >= want)

--- 44 unchanged lines hidden (view full) ---

2567 * the remainder is used for the transmit buffer.
2568 */
2569 switch (hw->mac.type) {
2570 case e1000_82575:
2571 pba = E1000_PBA_32K;
2572 break;
2573 case e1000_82576:
2574 case e1000_vfadapt:
2504 queues = 1;
2505
2506 /*
2507 ** One vector (RX/TX pair) per queue
2508 ** plus an additional for Link interrupt
2509 */
2510 want = queues + 1;
2511 if (msgs >= want)

--- 44 unchanged lines hidden (view full) ---

2556 * the remainder is used for the transmit buffer.
2557 */
2558 switch (hw->mac.type) {
2559 case e1000_82575:
2560 pba = E1000_PBA_32K;
2561 break;
2562 case e1000_82576:
2563 case e1000_vfadapt:
2575 pba = E1000_PBA_64K;
2564 pba = E1000_READ_REG(hw, E1000_RXPBS);
2565 pba &= E1000_RXPBS_SIZE_MASK_82576;
2576 break;
2577 case e1000_82580:
2566 break;
2567 case e1000_82580:
2568 case e1000_i350:
2569 case e1000_vfadapt_i350:
2570 pba = E1000_READ_REG(hw, E1000_RXPBS);
2571 pba = e1000_rxpbs_adjust_82580(pba);
2572 break;
2578 pba = E1000_PBA_35K;
2579 default:
2580 break;
2581 }
2582
2583 /* Special needs in case of Jumbo frames */
2584 if ((hw->mac.type == e1000_82575) && (ifp->if_mtu > ETHERMTU)) {
2585 u32 tx_space, min_tx, min_rx;

--- 55 unchanged lines hidden (view full) ---

2641
2642 /* Issue a global reset */
2643 e1000_reset_hw(hw);
2644 E1000_WRITE_REG(hw, E1000_WUC, 0);
2645
2646 if (e1000_init_hw(hw) < 0)
2647 device_printf(dev, "Hardware Initialization Failed\n");
2648
2573 pba = E1000_PBA_35K;
2574 default:
2575 break;
2576 }
2577
2578 /* Special needs in case of Jumbo frames */
2579 if ((hw->mac.type == e1000_82575) && (ifp->if_mtu > ETHERMTU)) {
2580 u32 tx_space, min_tx, min_rx;

--- 55 unchanged lines hidden (view full) ---

2636
2637 /* Issue a global reset */
2638 e1000_reset_hw(hw);
2639 E1000_WRITE_REG(hw, E1000_WUC, 0);
2640
2641 if (e1000_init_hw(hw) < 0)
2642 device_printf(dev, "Hardware Initialization Failed\n");
2643
2649 if (hw->mac.type == e1000_82580) {
2644 /* Setup DMA Coalescing */
2645 if (hw->mac.type == e1000_i350) {
2650 u32 reg;
2651
2652 hwm = (pba << 10) - (2 * adapter->max_frame_size);
2653 /*
2654 * 0x80000000 - enable DMA COAL
2655 * 0x10000000 - use L0s as low power
2656 * 0x20000000 - use L1 as low power
2657 * X << 16 - exit dma coal when rx data exceeds X kB

--- 515 unchanged lines hidden (view full) ---

3173
3174 txdctl |= IGB_TX_PTHRESH;
3175 txdctl |= IGB_TX_HTHRESH << 8;
3176 txdctl |= IGB_TX_WTHRESH << 16;
3177 txdctl |= E1000_TXDCTL_QUEUE_ENABLE;
3178 E1000_WRITE_REG(hw, E1000_TXDCTL(i), txdctl);
3179 }
3180
2646 u32 reg;
2647
2648 hwm = (pba << 10) - (2 * adapter->max_frame_size);
2649 /*
2650 * 0x80000000 - enable DMA COAL
2651 * 0x10000000 - use L0s as low power
2652 * 0x20000000 - use L1 as low power
2653 * X << 16 - exit dma coal when rx data exceeds X kB

--- 515 unchanged lines hidden (view full) ---

3169
3170 txdctl |= IGB_TX_PTHRESH;
3171 txdctl |= IGB_TX_HTHRESH << 8;
3172 txdctl |= IGB_TX_WTHRESH << 16;
3173 txdctl |= E1000_TXDCTL_QUEUE_ENABLE;
3174 E1000_WRITE_REG(hw, E1000_TXDCTL(i), txdctl);
3175 }
3176
3181 if (adapter->hw.mac.type == e1000_vfadapt)
3177 if (adapter->vf_ifp)
3182 return;
3183
3184 e1000_config_collision_dist(hw);
3185
3186 /* Program the Transmit Control Register */
3187 tctl = E1000_READ_REG(hw, E1000_TCTL);
3188 tctl &= ~E1000_TCTL_CT;
3189 tctl |= (E1000_TCTL_PSP | E1000_TCTL_RTLC | E1000_TCTL_EN |

--- 389 unchanged lines hidden (view full) ---

3579 ** work outstanding or the first return
3580 ** would have been taken, so none processed
3581 ** for too long indicates a hang.
3582 */
3583 if ((!processed) && ((ticks - txr->watchdog_time) > IGB_WATCHDOG))
3584 txr->queue_status = IGB_QUEUE_HUNG;
3585
3586 /*
3178 return;
3179
3180 e1000_config_collision_dist(hw);
3181
3182 /* Program the Transmit Control Register */
3183 tctl = E1000_READ_REG(hw, E1000_TCTL);
3184 tctl &= ~E1000_TCTL_CT;
3185 tctl |= (E1000_TCTL_PSP | E1000_TCTL_RTLC | E1000_TCTL_EN |

--- 389 unchanged lines hidden (view full) ---

3575 ** work outstanding or the first return
3576 ** would have been taken, so none processed
3577 ** for too long indicates a hang.
3578 */
3579 if ((!processed) && ((ticks - txr->watchdog_time) > IGB_WATCHDOG))
3580 txr->queue_status = IGB_QUEUE_HUNG;
3581
3582 /*
3587 * If we have enough room, clear IFF_DRV_OACTIVE
3583 * If we have a minimum free, clear IFF_DRV_OACTIVE
3588 * to tell the stack that it is OK to send packets.
3589 */
3584 * to tell the stack that it is OK to send packets.
3585 */
3590 if (txr->tx_avail > IGB_TX_CLEANUP_THRESHOLD) {
3586 if (txr->tx_avail > IGB_TX_OP_THRESHOLD)
3591 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
3587 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
3592 /* All clean, turn off the watchdog */
3593 if (txr->tx_avail == adapter->num_tx_desc) {
3594 txr->queue_status = IGB_QUEUE_IDLE;
3595 return (FALSE);
3596 }
3597 }
3598
3588
3589 /* All clean, turn off the watchdog */
3590 if (txr->tx_avail == adapter->num_tx_desc) {
3591 txr->queue_status = IGB_QUEUE_IDLE;
3592 return (FALSE);
3593 }
3594
3599 return (TRUE);
3600}
3601
3602
3603/*********************************************************************
3604 *
3605 * Refresh mbuf buffers for RX descriptor rings
3606 * - now keeps its own state so discards due to resource

--- 951 unchanged lines hidden (view full) ---

4558 if ((vtag == 0) || (vtag > 4095)) /* Invalid */
4559 return;
4560
4561 IGB_CORE_LOCK(adapter);
4562 index = (vtag >> 5) & 0x7F;
4563 bit = vtag & 0x1F;
4564 adapter->shadow_vfta[index] |= (1 << bit);
4565 ++adapter->num_vlans;
3595 return (TRUE);
3596}
3597
3598
3599/*********************************************************************
3600 *
3601 * Refresh mbuf buffers for RX descriptor rings
3602 * - now keeps its own state so discards due to resource

--- 951 unchanged lines hidden (view full) ---

4554 if ((vtag == 0) || (vtag > 4095)) /* Invalid */
4555 return;
4556
4557 IGB_CORE_LOCK(adapter);
4558 index = (vtag >> 5) & 0x7F;
4559 bit = vtag & 0x1F;
4560 adapter->shadow_vfta[index] |= (1 << bit);
4561 ++adapter->num_vlans;
4566 /* Re-init to load the changes */
4562 /* Change hw filter setting */
4567 if (ifp->if_capenable & IFCAP_VLAN_HWFILTER)
4563 if (ifp->if_capenable & IFCAP_VLAN_HWFILTER)
4568 igb_init_locked(adapter);
4564 igb_setup_vlan_hw_support(adapter);
4569 IGB_CORE_UNLOCK(adapter);
4570}
4571
4572/*
4573 * This routine is run via an vlan
4574 * unconfig EVENT
4575 */
4576static void

--- 8 unchanged lines hidden (view full) ---

4585 if ((vtag == 0) || (vtag > 4095)) /* Invalid */
4586 return;
4587
4588 IGB_CORE_LOCK(adapter);
4589 index = (vtag >> 5) & 0x7F;
4590 bit = vtag & 0x1F;
4591 adapter->shadow_vfta[index] &= ~(1 << bit);
4592 --adapter->num_vlans;
4565 IGB_CORE_UNLOCK(adapter);
4566}
4567
4568/*
4569 * This routine is run via an vlan
4570 * unconfig EVENT
4571 */
4572static void

--- 8 unchanged lines hidden (view full) ---

4581 if ((vtag == 0) || (vtag > 4095)) /* Invalid */
4582 return;
4583
4584 IGB_CORE_LOCK(adapter);
4585 index = (vtag >> 5) & 0x7F;
4586 bit = vtag & 0x1F;
4587 adapter->shadow_vfta[index] &= ~(1 << bit);
4588 --adapter->num_vlans;
4593 /* Re-init to load the changes */
4589 /* Change hw filter setting */
4594 if (ifp->if_capenable & IFCAP_VLAN_HWFILTER)
4590 if (ifp->if_capenable & IFCAP_VLAN_HWFILTER)
4595 igb_init_locked(adapter);
4591 igb_setup_vlan_hw_support(adapter);
4596 IGB_CORE_UNLOCK(adapter);
4597}
4598
4599static void
4600igb_setup_vlan_hw_support(struct adapter *adapter)
4601{
4602 struct e1000_hw *hw = &adapter->hw;
4592 IGB_CORE_UNLOCK(adapter);
4593}
4594
4595static void
4596igb_setup_vlan_hw_support(struct adapter *adapter)
4597{
4598 struct e1000_hw *hw = &adapter->hw;
4599 struct ifnet *ifp = adapter->ifp;
4603 u32 reg;
4604
4600 u32 reg;
4601
4605 /*
4606 ** We get here thru init_locked, meaning
4607 ** a soft reset, this has already cleared
4608 ** the VFTA and other state, so if there
4609 ** have been no vlan's registered do nothing.
4610 */
4611 if (adapter->num_vlans == 0)
4612 return;
4602 if (adapter->vf_ifp) {
4603 e1000_rlpml_set_vf(hw,
4604 adapter->max_frame_size + VLAN_TAG_SIZE);
4605 return;
4606 }
4613
4607
4608 reg = E1000_READ_REG(hw, E1000_CTRL);
4609 reg |= E1000_CTRL_VME;
4610 E1000_WRITE_REG(hw, E1000_CTRL, reg);
4611
4612 /* Enable the Filter Table */
4613 if (ifp->if_capenable & IFCAP_VLAN_HWFILTER) {
4614 reg = E1000_READ_REG(hw, E1000_RCTL);
4615 reg &= ~E1000_RCTL_CFIEN;
4616 reg |= E1000_RCTL_VFE;
4617 E1000_WRITE_REG(hw, E1000_RCTL, reg);
4618 }
4619
4620 /* Update the frame size */
4621 E1000_WRITE_REG(&adapter->hw, E1000_RLPML,
4622 adapter->max_frame_size + VLAN_TAG_SIZE);
4623
4624 /* Don't bother with table if no vlans */
4625 if ((adapter->num_vlans == 0) ||
4626 ((ifp->if_capenable & IFCAP_VLAN_HWFILTER) == 0))
4627 return;
4614 /*
4615 ** A soft reset zero's out the VFTA, so
4616 ** we need to repopulate it now.
4617 */
4618 for (int i = 0; i < IGB_VFTA_SIZE; i++)
4619 if (adapter->shadow_vfta[i] != 0) {
4628 /*
4629 ** A soft reset zero's out the VFTA, so
4630 ** we need to repopulate it now.
4631 */
4632 for (int i = 0; i < IGB_VFTA_SIZE; i++)
4633 if (adapter->shadow_vfta[i] != 0) {
4620 if (hw->mac.type == e1000_vfadapt)
4634 if (adapter->vf_ifp)
4621 e1000_vfta_set_vf(hw,
4622 adapter->shadow_vfta[i], TRUE);
4623 else
4624 E1000_WRITE_REG_ARRAY(hw, E1000_VFTA,
4625 i, adapter->shadow_vfta[i]);
4626 }
4635 e1000_vfta_set_vf(hw,
4636 adapter->shadow_vfta[i], TRUE);
4637 else
4638 E1000_WRITE_REG_ARRAY(hw, E1000_VFTA,
4639 i, adapter->shadow_vfta[i]);
4640 }
4627
4628 if (hw->mac.type == e1000_vfadapt)
4629 e1000_rlpml_set_vf(hw,
4630 adapter->max_frame_size + VLAN_TAG_SIZE);
4631 else {
4632 reg = E1000_READ_REG(hw, E1000_CTRL);
4633 reg |= E1000_CTRL_VME;
4634 E1000_WRITE_REG(hw, E1000_CTRL, reg);
4635
4636 /* Enable the Filter Table */
4637 reg = E1000_READ_REG(hw, E1000_RCTL);
4638 reg &= ~E1000_RCTL_CFIEN;
4639 reg |= E1000_RCTL_VFE;
4640 E1000_WRITE_REG(hw, E1000_RCTL, reg);
4641
4642 /* Update the frame size */
4643 E1000_WRITE_REG(&adapter->hw, E1000_RLPML,
4644 adapter->max_frame_size + VLAN_TAG_SIZE);
4645 }
4646}
4647
4648static void
4649igb_enable_intr(struct adapter *adapter)
4650{
4651 /* With RSS set up what to auto clear */
4652 if (adapter->msix_mem) {
4641}
4642
4643static void
4644igb_enable_intr(struct adapter *adapter)
4645{
4646 /* With RSS set up what to auto clear */
4647 if (adapter->msix_mem) {
4653 E1000_WRITE_REG(&adapter->hw, E1000_EIAC,
4654 adapter->eims_mask);
4655 E1000_WRITE_REG(&adapter->hw, E1000_EIAM,
4656 adapter->eims_mask);
4657 E1000_WRITE_REG(&adapter->hw, E1000_EIMS,
4658 adapter->eims_mask);
4648 u32 mask = (adapter->que_mask | adapter->link_mask);
4649 E1000_WRITE_REG(&adapter->hw, E1000_EIAC, mask);
4650 E1000_WRITE_REG(&adapter->hw, E1000_EIAM, mask);
4651 E1000_WRITE_REG(&adapter->hw, E1000_EIMS, mask);
4659 E1000_WRITE_REG(&adapter->hw, E1000_IMS,
4660 E1000_IMS_LSC);
4661 } else {
4662 E1000_WRITE_REG(&adapter->hw, E1000_IMS,
4663 IMS_ENABLE_MASK);
4664 }
4665 E1000_WRITE_FLUSH(&adapter->hw);
4666

--- 60 unchanged lines hidden (view full) ---

4727 * the driver is loaded.
4728 *
4729 */
4730static void
4731igb_get_hw_control(struct adapter *adapter)
4732{
4733 u32 ctrl_ext;
4734
4652 E1000_WRITE_REG(&adapter->hw, E1000_IMS,
4653 E1000_IMS_LSC);
4654 } else {
4655 E1000_WRITE_REG(&adapter->hw, E1000_IMS,
4656 IMS_ENABLE_MASK);
4657 }
4658 E1000_WRITE_FLUSH(&adapter->hw);
4659

--- 60 unchanged lines hidden (view full) ---

4720 * the driver is loaded.
4721 *
4722 */
4723static void
4724igb_get_hw_control(struct adapter *adapter)
4725{
4726 u32 ctrl_ext;
4727
4735 if (adapter->hw.mac.type == e1000_vfadapt)
4728 if (adapter->vf_ifp)
4736 return;
4737
4738 /* Let firmware know the driver has taken over */
4739 ctrl_ext = E1000_READ_REG(&adapter->hw, E1000_CTRL_EXT);
4740 E1000_WRITE_REG(&adapter->hw, E1000_CTRL_EXT,
4741 ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
4742}
4743
4744/*
4745 * igb_release_hw_control resets CTRL_EXT:DRV_LOAD bit.
4746 * For ASF and Pass Through versions of f/w this means that the
4747 * driver is no longer loaded.
4748 *
4749 */
4750static void
4751igb_release_hw_control(struct adapter *adapter)
4752{
4753 u32 ctrl_ext;
4754
4729 return;
4730
4731 /* Let firmware know the driver has taken over */
4732 ctrl_ext = E1000_READ_REG(&adapter->hw, E1000_CTRL_EXT);
4733 E1000_WRITE_REG(&adapter->hw, E1000_CTRL_EXT,
4734 ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
4735}
4736
4737/*
4738 * igb_release_hw_control resets CTRL_EXT:DRV_LOAD bit.
4739 * For ASF and Pass Through versions of f/w this means that the
4740 * driver is no longer loaded.
4741 *
4742 */
4743static void
4744igb_release_hw_control(struct adapter *adapter)
4745{
4746 u32 ctrl_ext;
4747
4755 if (adapter->hw.mac.type == e1000_vfadapt)
4748 if (adapter->vf_ifp)
4756 return;
4757
4758 /* Let firmware taken over control of h/w */
4759 ctrl_ext = E1000_READ_REG(&adapter->hw, E1000_CTRL_EXT);
4760 E1000_WRITE_REG(&adapter->hw, E1000_CTRL_EXT,
4761 ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
4762}
4763

--- 62 unchanged lines hidden (view full) ---

4826 struct e1000_hw *hw = &adapter->hw;
4827 struct e1000_hw_stats *stats;
4828
4829 /*
4830 ** The virtual function adapter has only a
4831 ** small controlled set of stats, do only
4832 ** those and return.
4833 */
4749 return;
4750
4751 /* Let firmware taken over control of h/w */
4752 ctrl_ext = E1000_READ_REG(&adapter->hw, E1000_CTRL_EXT);
4753 E1000_WRITE_REG(&adapter->hw, E1000_CTRL_EXT,
4754 ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
4755}
4756

--- 62 unchanged lines hidden (view full) ---

4819 struct e1000_hw *hw = &adapter->hw;
4820 struct e1000_hw_stats *stats;
4821
4822 /*
4823 ** The virtual function adapter has only a
4824 ** small controlled set of stats, do only
4825 ** those and return.
4826 */
4834 if (adapter->hw.mac.type == e1000_vfadapt) {
4827 if (adapter->vf_ifp) {
4835 igb_update_vf_stats_counters(adapter);
4836 return;
4837 }
4838
4839 stats = (struct e1000_hw_stats *)adapter->stats;
4840
4841 if(adapter->hw.phy.media_type == e1000_media_type_copper ||
4842 (E1000_READ_REG(hw, E1000_STATUS) & E1000_STATUS_LU)) {

--- 328 unchanged lines hidden (view full) ---

5171 stat_node = SYSCTL_ADD_NODE(ctx, child, OID_AUTO, "mac_stats",
5172 CTLFLAG_RD, NULL, "MAC Statistics");
5173 stat_list = SYSCTL_CHILDREN(stat_node);
5174
5175 /*
5176 ** VF adapter has a very limited set of stats
5177 ** since its not managing the metal, so to speak.
5178 */
4828 igb_update_vf_stats_counters(adapter);
4829 return;
4830 }
4831
4832 stats = (struct e1000_hw_stats *)adapter->stats;
4833
4834 if(adapter->hw.phy.media_type == e1000_media_type_copper ||
4835 (E1000_READ_REG(hw, E1000_STATUS) & E1000_STATUS_LU)) {

--- 328 unchanged lines hidden (view full) ---

5164 stat_node = SYSCTL_ADD_NODE(ctx, child, OID_AUTO, "mac_stats",
5165 CTLFLAG_RD, NULL, "MAC Statistics");
5166 stat_list = SYSCTL_CHILDREN(stat_node);
5167
5168 /*
5169 ** VF adapter has a very limited set of stats
5170 ** since its not managing the metal, so to speak.
5171 */
5179 if (adapter->hw.mac.type == e1000_vfadapt) {
5172 if (adapter->vf_ifp) {
5180 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "good_pkts_recvd",
5181 CTLFLAG_RD, &stats->gprc,
5182 "Good Packets Received");
5183 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "good_pkts_txd",
5184 CTLFLAG_RD, &stats->gptc,
5185 "Good Packets Transmitted");
5186 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "good_octets_recvd",
5187 CTLFLAG_RD, &stats->gorc,

--- 316 unchanged lines hidden --- 		5173 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "good_pkts_recvd",
5174 CTLFLAG_RD, &stats->gprc,
5175 "Good Packets Received");
5176 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "good_pkts_txd",
5177 CTLFLAG_RD, &stats->gptc,
5178 "Good Packets Transmitted");
5179 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "good_octets_recvd",
5180 CTLFLAG_RD, &stats->gorc,

--- 316 unchanged lines hidden ---