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< /*$FreeBSD: head/sys/dev/e1000/if_em.h 203083 2010-01-27 18:00:24Z jfv $*/
---
> /*$FreeBSD: head/sys/dev/e1000/if_em.h 205869 2010-03-29 23:36:34Z jfv $*/
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< #define EM_MAX_TXD_82543 256
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< #define EM_MAX_RXD_82543 256
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< #define EM_TX_OP_THRESHOLD (adapter->num_tx_desc / 32)
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< #define EM_MAX_INTR 10
---
> #define EM_MAX_LOOP 10
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< /* Code compatilbility between 6 and 7 */
< #ifndef ETHER_BPF_MTAP
< #define ETHER_BPF_MTAP BPF_MTAP
< #endif
<
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< #define EM_BAR_TYPE_IO 0x00000001
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> #define EM_MSIX_LINK 0x01000000 /* For 82574 use */
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< /* Used in for 82547 10Mb Half workaround */
< #define EM_PBA_BYTES_SHIFT 0xA
< #define EM_TX_HEAD_ADDR_SHIFT 7
< #define EM_PBA_TX_MASK 0xFFFF0000
< #define EM_FIFO_HDR 0x10
< #define EM_82547_PKT_THRESH 0x3e0
<
< /* Precision Time Sync (IEEE 1588) defines */
< #define ETHERTYPE_IEEE1588 0x88F7
< #define PICOSECS_PER_TICK 20833
< #define TSYNC_PORT 319 /* UDP port for the protocol */
<
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> /*
> * The transmit ring, one per tx queue
> */
> struct tx_ring {
> struct adapter *adapter;
> struct mtx tx_mtx;
> char mtx_name[16];
> u32 me;
> u32 msix;
> u32 ims;
> bool watchdog_check;
> int watchdog_time;
> struct em_dma_alloc txdma;
> struct e1000_tx_desc *tx_base;
> struct task tx_task;
> struct taskqueue *tq;
> u32 next_avail_desc;
> u32 next_to_clean;
> struct em_buffer *tx_buffers;
> volatile u16 tx_avail;
> u32 tx_tso; /* last tx was tso */
> u16 last_hw_offload;
> #if __FreeBSD_version >= 800000
> struct buf_ring *br;
> #endif
> /* Interrupt resources */
> bus_dma_tag_t txtag;
> void *tag;
> struct resource *res;
> u64 tx_irq;
> u64 no_desc_avail;
> };
>
> /*
> * The Receive ring, one per rx queue
> */
> struct rx_ring {
> struct adapter *adapter;
> u32 me;
> u32 msix;
> u32 ims;
> struct mtx rx_mtx;
> char mtx_name[16];
> u32 payload;
> struct task rx_task;
> struct taskqueue *tq;
> struct e1000_rx_desc *rx_base;
> struct em_dma_alloc rxdma;
> unsigned int next_to_refresh;
> unsigned int next_to_check;
> struct em_buffer *rx_buffers;
> struct mbuf *fmp;
> struct mbuf *lmp;
>
> /* Interrupt resources */
> void *tag;
> struct resource *res;
> bus_dma_tag_t rxtag;
> bus_dmamap_t rx_sparemap;
>
> /* Soft stats */
> u64 rx_irq;
> u64 rx_packets;
> u64 rx_bytes;
> };
>
>
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< #if __FreeBSD_version >= 800000
< struct buf_ring *br;
< #endif
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< struct resource *msix;
---
> struct resource *msix_mem;
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< struct resource *ioport;
< int io_rid;
---
> struct resource *res;
> void *tag;
> u32 linkvec;
> u32 ivars;
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< /* 82574 may use 3 int vectors */
< struct resource *res[3];
< void *tag[3];
< int rid[3];
<
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< struct callout tx_fifo_timer;
< bool watchdog_check;
< int watchdog_time;
< int msi;
---
> int msix;
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< struct mtx tx_mtx;
< struct mtx rx_mtx;
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> u32 ims;
> bool in_detach;
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< struct task rxtx_task;
< struct task rx_task;
< struct task tx_task;
---
> struct task que_task;
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< #if __FreeBSD_version >= 700029
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< u32 num_vlans;
< #endif
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> u16 num_vlans;
> u16 num_queues;
>
> /*
> * Transmit rings:
> * Allocated at run time, an array of rings.
> */
> struct tx_ring *tx_rings;
> int num_tx_desc;
> u32 txd_cmd;
>
> /*
> * Receive rings:
> * Allocated at run time, an array of rings.
> */
> struct rx_ring *rx_rings;
> int num_rx_desc;
> u32 rx_process_limit;
>
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< /*
< * Transmit definitions
< *
< * We have an array of num_tx_desc descriptors (handled
< * by the controller) paired with an array of tx_buffers
< * (at tx_buffer_area).
< * The index of the next available descriptor is next_avail_tx_desc.
< * The number of remaining tx_desc is num_tx_desc_avail.
< */
< struct em_dma_alloc txdma; /* bus_dma glue for tx desc */
< struct e1000_tx_desc *tx_desc_base;
< uint32_t next_avail_tx_desc;
< uint32_t next_tx_to_clean;
< volatile uint16_t num_tx_desc_avail;
< uint16_t num_tx_desc;
< uint16_t last_hw_offload;
< uint32_t txd_cmd;
< struct em_buffer *tx_buffer_area;
< bus_dma_tag_t txtag; /* dma tag for tx */
< uint32_t tx_tso; /* last tx was tso */
<
< /*
< * Receive definitions
< *
< * we have an array of num_rx_desc rx_desc (handled by the
< * controller), and paired with an array of rx_buffers
< * (at rx_buffer_area).
< * The next pair to check on receive is at offset next_rx_desc_to_check
< */
< struct em_dma_alloc rxdma; /* bus_dma glue for rx desc */
< struct e1000_rx_desc *rx_desc_base;
< uint32_t next_rx_desc_to_check;
< uint32_t rx_buffer_len;
< uint16_t num_rx_desc;
< int rx_process_limit;
< struct em_buffer *rx_buffer_area;
< bus_dma_tag_t rxtag;
< bus_dmamap_t rx_sparemap;
<
< /*
< * First/last mbuf pointers, for
< * collecting multisegment RX packets.
< */
< struct mbuf *fmp;
< struct mbuf *lmp;
<
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< unsigned long no_tx_desc_avail1;
< unsigned long no_tx_desc_avail2;
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< unsigned long watchdog_events;
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< unsigned long rx_irq;
< unsigned long tx_irq;
---
> unsigned long watchdog_events;
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< /* 82547 workaround */
< uint32_t tx_fifo_size;
< uint32_t tx_fifo_head;
< uint32_t tx_fifo_head_addr;
< uint64_t tx_fifo_reset_cnt;
< uint64_t tx_fifo_wrk_cnt;
< uint32_t tx_head_addr;
<
< /* For 82544 PCIX Workaround */
< boolean_t pcix_82544;
< boolean_t in_detach;
<
< #ifdef EM_IEEE1588
< /* IEEE 1588 precision time support */
< struct cyclecounter cycles;
< struct nettimer clock;
< struct nettime_compare compare;
< struct hwtstamp_ctrl hwtstamp;
< #endif
<
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< /* ******************************************************************************
---
> /********************************************************************************
440c422
< * ******************************************************************************/
---
> ********************************************************************************/
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< /* For 82544 PCIX Workaround */
< typedef struct _ADDRESS_LENGTH_PAIR
< {
< uint64_t address;
< uint32_t length;
< } ADDRESS_LENGTH_PAIR, *PADDRESS_LENGTH_PAIR;
<
< typedef struct _DESCRIPTOR_PAIR
< {
< ADDRESS_LENGTH_PAIR descriptor[4];
< uint32_t elements;
< } DESC_ARRAY, *PDESC_ARRAY;
<