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e1000_osdep.c (185353) e1000_osdep.c (194865)
1/******************************************************************************
2
1/******************************************************************************
2
3 Copyright (c) 2001-2008, Intel Corporation
3 Copyright (c) 2001-2009, Intel Corporation
4 All rights reserved.
5
6 Redistribution and use in source and binary forms, with or without
7 modification, are permitted provided that the following conditions are met:
8
9 1. Redistributions of source code must retain the above copyright notice,
10 this list of conditions and the following disclaimer.
11

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25 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30 POSSIBILITY OF SUCH DAMAGE.
31
32******************************************************************************/
4 All rights reserved.
5
6 Redistribution and use in source and binary forms, with or without
7 modification, are permitted provided that the following conditions are met:
8
9 1. Redistributions of source code must retain the above copyright notice,
10 this list of conditions and the following disclaimer.
11

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25 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30 POSSIBILITY OF SUCH DAMAGE.
31
32******************************************************************************/
33/*$FreeBSD: head/sys/dev/e1000/e1000_osdep.c 185353 2008-11-26 23:57:23Z jfv $*/
33/*$FreeBSD: head/sys/dev/e1000/e1000_osdep.c 194865 2009-06-24 17:41:29Z jfv $*/
34
35#include "e1000_api.h"
36
37/*
38 * NOTE: the following routines using the e1000
39 * naming style are provided to the shared
40 * code but are OS specific
41 */
42
43void
34
35#include "e1000_api.h"
36
37/*
38 * NOTE: the following routines using the e1000
39 * naming style are provided to the shared
40 * code but are OS specific
41 */
42
43void
44e1000_write_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
44e1000_write_pci_cfg(struct e1000_hw *hw, u32 reg, u16 *value)
45{
46 pci_write_config(((struct e1000_osdep *)hw->back)->dev, reg, *value, 2);
47}
48
49void
45{
46 pci_write_config(((struct e1000_osdep *)hw->back)->dev, reg, *value, 2);
47}
48
49void
50e1000_read_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
50e1000_read_pci_cfg(struct e1000_hw *hw, u32 reg, u16 *value)
51{
52 *value = pci_read_config(((struct e1000_osdep *)hw->back)->dev, reg, 2);
53}
54
55void
56e1000_pci_set_mwi(struct e1000_hw *hw)
57{
58 pci_write_config(((struct e1000_osdep *)hw->back)->dev, PCIR_COMMAND,

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65 pci_write_config(((struct e1000_osdep *)hw->back)->dev, PCIR_COMMAND,
66 (hw->bus.pci_cmd_word & ~CMD_MEM_WRT_INVALIDATE), 2);
67}
68
69/*
70 * Read the PCI Express capabilities
71 */
72int32_t
51{
52 *value = pci_read_config(((struct e1000_osdep *)hw->back)->dev, reg, 2);
53}
54
55void
56e1000_pci_set_mwi(struct e1000_hw *hw)
57{
58 pci_write_config(((struct e1000_osdep *)hw->back)->dev, PCIR_COMMAND,

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65 pci_write_config(((struct e1000_osdep *)hw->back)->dev, PCIR_COMMAND,
66 (hw->bus.pci_cmd_word & ~CMD_MEM_WRT_INVALIDATE), 2);
67}
68
69/*
70 * Read the PCI Express capabilities
71 */
72int32_t
73e1000_read_pcie_cap_reg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
73e1000_read_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value)
74{
74{
75 u32 result;
75 device_t dev = ((struct e1000_osdep *)hw->back)->dev;
76 u32 offset;
76
77
77 pci_find_extcap(((struct e1000_osdep *)hw->back)->dev,
78 reg, &result);
79 *value = (u16)result;
78 pci_find_extcap(dev, PCIY_EXPRESS, &offset);
79 *value = pci_read_config(dev, offset + reg, 2);
80 return (E1000_SUCCESS);
81}
80 return (E1000_SUCCESS);
81}
82
83/*
84 * Write the PCI Express capabilities
85 */
86int32_t
87e1000_write_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value)
88{
89 device_t dev = ((struct e1000_osdep *)hw->back)->dev;
90 u32 offset;
91
92 pci_find_extcap(dev, PCIY_EXPRESS, &offset);
93 pci_write_config(dev, offset + reg, *value, 2);
94 return (E1000_SUCCESS);
95}