e1000_82575.h (213234) | e1000_82575.h (218530) |
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1/****************************************************************************** 2 3 Copyright (c) 2001-2010, Intel Corporation 4 All rights reserved. 5 6 Redistribution and use in source and binary forms, with or without 7 modification, are permitted provided that the following conditions are met: 8 --- 16 unchanged lines hidden (view full) --- 25 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 POSSIBILITY OF SUCH DAMAGE. 31 32******************************************************************************/ | 1/****************************************************************************** 2 3 Copyright (c) 2001-2010, Intel Corporation 4 All rights reserved. 5 6 Redistribution and use in source and binary forms, with or without 7 modification, are permitted provided that the following conditions are met: 8 --- 16 unchanged lines hidden (view full) --- 25 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 POSSIBILITY OF SUCH DAMAGE. 31 32******************************************************************************/ |
33/*$FreeBSD: head/sys/dev/e1000/e1000_82575.h 213234 2010-09-28 00:13:15Z jfv $*/ | 33/*$FreeBSD: head/sys/dev/e1000/e1000_82575.h 218530 2011-02-11 01:00:26Z jfv $*/ |
34 35#ifndef _E1000_82575_H_ 36#define _E1000_82575_H_ 37 38#define ID_LED_DEFAULT_82575_SERDES ((ID_LED_DEF1_DEF2 << 12) | \ 39 (ID_LED_DEF1_DEF2 << 8) | \ 40 (ID_LED_DEF1_DEF2 << 4) | \ 41 (ID_LED_OFF1_ON2)) --- 5 unchanged lines hidden (view full) --- 47 */ 48/* 49 * For 82576, there are an additional set of RARs that begin at an offset 50 * separate from the first set of RARs. 51 */ 52#define E1000_RAR_ENTRIES_82575 16 53#define E1000_RAR_ENTRIES_82576 24 54#define E1000_RAR_ENTRIES_82580 24 | 34 35#ifndef _E1000_82575_H_ 36#define _E1000_82575_H_ 37 38#define ID_LED_DEFAULT_82575_SERDES ((ID_LED_DEF1_DEF2 << 12) | \ 39 (ID_LED_DEF1_DEF2 << 8) | \ 40 (ID_LED_DEF1_DEF2 << 4) | \ 41 (ID_LED_OFF1_ON2)) --- 5 unchanged lines hidden (view full) --- 47 */ 48/* 49 * For 82576, there are an additional set of RARs that begin at an offset 50 * separate from the first set of RARs. 51 */ 52#define E1000_RAR_ENTRIES_82575 16 53#define E1000_RAR_ENTRIES_82576 24 54#define E1000_RAR_ENTRIES_82580 24 |
55#define E1000_RAR_ENTRIES_I350 32 |
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55#define E1000_SW_SYNCH_MB 0x00000100 56#define E1000_STAT_DEV_RST_SET 0x00100000 57#define E1000_CTRL_DEV_RST 0x20000000 58 59#ifdef E1000_BIT_FIELDS 60struct e1000_adv_data_desc { 61 __le64 buffer_addr; /* Address of the descriptor's data buffer */ 62 union { --- 132 unchanged lines hidden (view full) --- 195 __le64 hdr_addr; /* Header buffer address */ 196 } read; 197 struct { 198 struct { 199 union { 200 __le32 data; 201 struct { 202 __le16 pkt_info; /*RSS type, Pkt type*/ | 56#define E1000_SW_SYNCH_MB 0x00000100 57#define E1000_STAT_DEV_RST_SET 0x00100000 58#define E1000_CTRL_DEV_RST 0x20000000 59 60#ifdef E1000_BIT_FIELDS 61struct e1000_adv_data_desc { 62 __le64 buffer_addr; /* Address of the descriptor's data buffer */ 63 union { --- 132 unchanged lines hidden (view full) --- 196 __le64 hdr_addr; /* Header buffer address */ 197 } read; 198 struct { 199 struct { 200 union { 201 __le32 data; 202 struct { 203 __le16 pkt_info; /*RSS type, Pkt type*/ |
203 __le16 hdr_info; /* Split Header, 204 * header buffer len*/ | 204 /* Split Header, header buffer len */ 205 __le16 hdr_info; |
205 } hs_rss; 206 } lo_dword; 207 union { 208 __le32 rss; /* RSS Hash */ 209 struct { 210 __le16 ip_id; /* IP id */ 211 __le16 csum; /* Packet Checksum */ 212 } csum_ip; --- 207 unchanged lines hidden (view full) --- 420#define E1000_VMOLR_AUPE 0x01000000 /* Accept untagged packets */ 421#define E1000_VMOLR_ROMPE 0x02000000 /* Accept overflow multicast */ 422#define E1000_VMOLR_ROPE 0x04000000 /* Accept overflow unicast */ 423#define E1000_VMOLR_BAM 0x08000000 /* Accept Broadcast packets */ 424#define E1000_VMOLR_MPME 0x10000000 /* Multicast promiscuous mode */ 425#define E1000_VMOLR_STRVLAN 0x40000000 /* Vlan stripping enable */ 426#define E1000_VMOLR_STRCRC 0x80000000 /* CRC stripping enable */ 427 | 206 } hs_rss; 207 } lo_dword; 208 union { 209 __le32 rss; /* RSS Hash */ 210 struct { 211 __le16 ip_id; /* IP id */ 212 __le16 csum; /* Packet Checksum */ 213 } csum_ip; --- 207 unchanged lines hidden (view full) --- 421#define E1000_VMOLR_AUPE 0x01000000 /* Accept untagged packets */ 422#define E1000_VMOLR_ROMPE 0x02000000 /* Accept overflow multicast */ 423#define E1000_VMOLR_ROPE 0x04000000 /* Accept overflow unicast */ 424#define E1000_VMOLR_BAM 0x08000000 /* Accept Broadcast packets */ 425#define E1000_VMOLR_MPME 0x10000000 /* Multicast promiscuous mode */ 426#define E1000_VMOLR_STRVLAN 0x40000000 /* Vlan stripping enable */ 427#define E1000_VMOLR_STRCRC 0x80000000 /* CRC stripping enable */ 428 |
429#define E1000_VMOLR_VPE 0x00800000 /* VLAN promiscuous enable */ 430#define E1000_VMOLR_UPE 0x20000000 /* Unicast promisuous enable */ 431#define E1000_DVMOLR_HIDVLAN 0x20000000 /* Vlan hiding enable */ 432#define E1000_DVMOLR_STRVLAN 0x40000000 /* Vlan stripping enable */ 433#define E1000_DVMOLR_STRCRC 0x80000000 /* CRC stripping enable */ |
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428 | 434 |
435#define E1000_PBRWAC_WALPB 0x00000007 /* Wrap around event on LAN Rx PB */ 436#define E1000_PBRWAC_PBE 0x00000008 /* Rx packet buffer empty */ 437 |
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429#define E1000_VLVF_ARRAY_SIZE 32 430#define E1000_VLVF_VLANID_MASK 0x00000FFF 431#define E1000_VLVF_POOLSEL_SHIFT 12 432#define E1000_VLVF_POOLSEL_MASK (0xFF << E1000_VLVF_POOLSEL_SHIFT) 433#define E1000_VLVF_LVLAN 0x00100000 434#define E1000_VLVF_VLANID_ENABLE 0x80000000 435 436#define E1000_VMVIR_VLANA_DEFAULT 0x40000000 /* Always use default VLAN */ --- 13 unchanged lines hidden (view full) --- 450#define E1000_DTXCTL_8023LL 0x0004 451#define E1000_DTXCTL_VLAN_ADDED 0x0008 452#define E1000_DTXCTL_OOS_ENABLE 0x0010 453#define E1000_DTXCTL_MDP_EN 0x0020 454#define E1000_DTXCTL_SPOOF_INT 0x0040 455 456#define ALL_QUEUES 0xFFFF 457 | 438#define E1000_VLVF_ARRAY_SIZE 32 439#define E1000_VLVF_VLANID_MASK 0x00000FFF 440#define E1000_VLVF_POOLSEL_SHIFT 12 441#define E1000_VLVF_POOLSEL_MASK (0xFF << E1000_VLVF_POOLSEL_SHIFT) 442#define E1000_VLVF_LVLAN 0x00100000 443#define E1000_VLVF_VLANID_ENABLE 0x80000000 444 445#define E1000_VMVIR_VLANA_DEFAULT 0x40000000 /* Always use default VLAN */ --- 13 unchanged lines hidden (view full) --- 459#define E1000_DTXCTL_8023LL 0x0004 460#define E1000_DTXCTL_VLAN_ADDED 0x0008 461#define E1000_DTXCTL_OOS_ENABLE 0x0010 462#define E1000_DTXCTL_MDP_EN 0x0020 463#define E1000_DTXCTL_SPOOF_INT 0x0040 464 465#define ALL_QUEUES 0xFFFF 466 |
458/* RX packet buffer size defines */ | 467/* Rx packet buffer size defines */ |
459#define E1000_RXPBS_SIZE_MASK_82576 0x0000007F 460void e1000_vmdq_set_loopback_pf(struct e1000_hw *hw, bool enable); 461void e1000_vmdq_set_anti_spoofing_pf(struct e1000_hw *hw, bool enable, int pf); 462void e1000_vmdq_set_replication_pf(struct e1000_hw *hw, bool enable); 463enum e1000_promisc_type { 464 e1000_promisc_disabled = 0, /* all promisc modes disabled */ 465 e1000_promisc_unicast = 1, /* unicast promiscuous enabled */ 466 e1000_promisc_multicast = 2, /* multicast promiscuous enabled */ 467 e1000_promisc_enabled = 3, /* both uni and multicast promisc */ 468 e1000_num_promisc_types 469}; 470 471void e1000_vfta_set_vf(struct e1000_hw *, u16, bool); 472void e1000_rlpml_set_vf(struct e1000_hw *, u16); 473s32 e1000_promisc_set_vf(struct e1000_hw *, enum e1000_promisc_type type); 474u16 e1000_rxpbs_adjust_82580(u32 data); | 468#define E1000_RXPBS_SIZE_MASK_82576 0x0000007F 469void e1000_vmdq_set_loopback_pf(struct e1000_hw *hw, bool enable); 470void e1000_vmdq_set_anti_spoofing_pf(struct e1000_hw *hw, bool enable, int pf); 471void e1000_vmdq_set_replication_pf(struct e1000_hw *hw, bool enable); 472enum e1000_promisc_type { 473 e1000_promisc_disabled = 0, /* all promisc modes disabled */ 474 e1000_promisc_unicast = 1, /* unicast promiscuous enabled */ 475 e1000_promisc_multicast = 2, /* multicast promiscuous enabled */ 476 e1000_promisc_enabled = 3, /* both uni and multicast promisc */ 477 e1000_num_promisc_types 478}; 479 480void e1000_vfta_set_vf(struct e1000_hw *, u16, bool); 481void e1000_rlpml_set_vf(struct e1000_hw *, u16); 482s32 e1000_promisc_set_vf(struct e1000_hw *, enum e1000_promisc_type type); 483u16 e1000_rxpbs_adjust_82580(u32 data); |
484s32 e1000_set_eee_i350(struct e1000_hw *); |
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475#endif /* _E1000_82575_H_ */ | 485#endif /* _E1000_82575_H_ */ |