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e1000_82571.c (214646) e1000_82571.c (218588)
1/******************************************************************************
2
3 Copyright (c) 2001-2010, Intel Corporation
4 All rights reserved.
5
6 Redistribution and use in source and binary forms, with or without
7 modification, are permitted provided that the following conditions are met:
8

--- 16 unchanged lines hidden (view full) ---

25 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30 POSSIBILITY OF SUCH DAMAGE.
31
32******************************************************************************/
1/******************************************************************************
2
3 Copyright (c) 2001-2010, Intel Corporation
4 All rights reserved.
5
6 Redistribution and use in source and binary forms, with or without
7 modification, are permitted provided that the following conditions are met:
8

--- 16 unchanged lines hidden (view full) ---

25 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30 POSSIBILITY OF SUCH DAMAGE.
31
32******************************************************************************/
33/*$FreeBSD: head/sys/dev/e1000/e1000_82571.c 214646 2010-11-01 20:19:25Z jfv $*/
33/*$FreeBSD: head/sys/dev/e1000/e1000_82571.c 218588 2011-02-12 00:07:40Z jfv $*/
34
35/*
36 * 82571EB Gigabit Ethernet Controller
37 * 82571EB Gigabit Ethernet Controller (Copper)
38 * 82571EB Gigabit Ethernet Controller (Fiber)
39 * 82571EB Dual Port Gigabit Mezzanine Adapter
40 * 82571EB Quad Port Gigabit Mezzanine Adapter
41 * 82571PT Gigabit PT Quad Port Server ExpressModule

--- 35 unchanged lines hidden (view full) ---

77static s32 e1000_get_hw_semaphore_82571(struct e1000_hw *hw);
78static s32 e1000_fix_nvm_checksum_82571(struct e1000_hw *hw);
79static s32 e1000_get_phy_id_82571(struct e1000_hw *hw);
80static void e1000_put_hw_semaphore_82571(struct e1000_hw *hw);
81static s32 e1000_get_hw_semaphore_82573(struct e1000_hw *hw);
82static void e1000_put_hw_semaphore_82573(struct e1000_hw *hw);
83static s32 e1000_get_hw_semaphore_82574(struct e1000_hw *hw);
84static void e1000_put_hw_semaphore_82574(struct e1000_hw *hw);
34
35/*
36 * 82571EB Gigabit Ethernet Controller
37 * 82571EB Gigabit Ethernet Controller (Copper)
38 * 82571EB Gigabit Ethernet Controller (Fiber)
39 * 82571EB Dual Port Gigabit Mezzanine Adapter
40 * 82571EB Quad Port Gigabit Mezzanine Adapter
41 * 82571PT Gigabit PT Quad Port Server ExpressModule

--- 35 unchanged lines hidden (view full) ---

77static s32 e1000_get_hw_semaphore_82571(struct e1000_hw *hw);
78static s32 e1000_fix_nvm_checksum_82571(struct e1000_hw *hw);
79static s32 e1000_get_phy_id_82571(struct e1000_hw *hw);
80static void e1000_put_hw_semaphore_82571(struct e1000_hw *hw);
81static s32 e1000_get_hw_semaphore_82573(struct e1000_hw *hw);
82static void e1000_put_hw_semaphore_82573(struct e1000_hw *hw);
83static s32 e1000_get_hw_semaphore_82574(struct e1000_hw *hw);
84static void e1000_put_hw_semaphore_82574(struct e1000_hw *hw);
85static s32 e1000_set_d0_lplu_state_82574(struct e1000_hw *hw,
86 bool active);
87static s32 e1000_set_d3_lplu_state_82574(struct e1000_hw *hw,
88 bool active);
85static void e1000_initialize_hw_bits_82571(struct e1000_hw *hw);
86static s32 e1000_write_nvm_eewr_82571(struct e1000_hw *hw, u16 offset,
87 u16 words, u16 *data);
88static s32 e1000_read_mac_addr_82571(struct e1000_hw *hw);
89static void e1000_power_down_phy_copper_82571(struct e1000_hw *hw);
90
91/**
92 * e1000_init_phy_params_82571 - Init PHY func ptrs.
93 * @hw: pointer to the HW structure
94 **/
95static s32 e1000_init_phy_params_82571(struct e1000_hw *hw)
96{
97 struct e1000_phy_info *phy = &hw->phy;
89static void e1000_initialize_hw_bits_82571(struct e1000_hw *hw);
90static s32 e1000_write_nvm_eewr_82571(struct e1000_hw *hw, u16 offset,
91 u16 words, u16 *data);
92static s32 e1000_read_mac_addr_82571(struct e1000_hw *hw);
93static void e1000_power_down_phy_copper_82571(struct e1000_hw *hw);
94
95/**
96 * e1000_init_phy_params_82571 - Init PHY func ptrs.
97 * @hw: pointer to the HW structure
98 **/
99static s32 e1000_init_phy_params_82571(struct e1000_hw *hw)
100{
101 struct e1000_phy_info *phy = &hw->phy;
98 struct e1000_dev_spec_82571 *dev_spec = &hw->dev_spec._82571;
99 s32 ret_val = E1000_SUCCESS;
100
101 DEBUGFUNC("e1000_init_phy_params_82571");
102
103 if (hw->phy.media_type != e1000_media_type_copper) {
104 phy->type = e1000_phy_none;
105 goto out;
106 }

--- 17 unchanged lines hidden (view full) ---

124 phy->ops.get_info = e1000_get_phy_info_igp;
125 phy->ops.check_polarity = e1000_check_polarity_igp;
126 phy->ops.force_speed_duplex = e1000_phy_force_speed_duplex_igp;
127 phy->ops.get_cable_length = e1000_get_cable_length_igp_2;
128 phy->ops.read_reg = e1000_read_phy_reg_igp;
129 phy->ops.write_reg = e1000_write_phy_reg_igp;
130 phy->ops.acquire = e1000_get_hw_semaphore_82571;
131 phy->ops.release = e1000_put_hw_semaphore_82571;
102 s32 ret_val = E1000_SUCCESS;
103
104 DEBUGFUNC("e1000_init_phy_params_82571");
105
106 if (hw->phy.media_type != e1000_media_type_copper) {
107 phy->type = e1000_phy_none;
108 goto out;
109 }

--- 17 unchanged lines hidden (view full) ---

127 phy->ops.get_info = e1000_get_phy_info_igp;
128 phy->ops.check_polarity = e1000_check_polarity_igp;
129 phy->ops.force_speed_duplex = e1000_phy_force_speed_duplex_igp;
130 phy->ops.get_cable_length = e1000_get_cable_length_igp_2;
131 phy->ops.read_reg = e1000_read_phy_reg_igp;
132 phy->ops.write_reg = e1000_write_phy_reg_igp;
133 phy->ops.acquire = e1000_get_hw_semaphore_82571;
134 phy->ops.release = e1000_put_hw_semaphore_82571;
132
133 /* This uses above function pointers */
134 ret_val = e1000_get_phy_id_82571(hw);
135
136 /* Verify PHY ID */
137 if (phy->id != IGP01E1000_I_PHY_ID) {
138 ret_val = -E1000_ERR_PHY;
139 DEBUGOUT1("PHY ID unknown: type = 0x%08x\n", phy->id);
140 goto out;
141 }
142 break;
143 case e1000_82573:
144 phy->type = e1000_phy_m88;
145 phy->ops.get_cfg_done = e1000_get_cfg_done_generic;
146 phy->ops.get_info = e1000_get_phy_info_m88;
147 phy->ops.check_polarity = e1000_check_polarity_m88;
148 phy->ops.commit = e1000_phy_sw_reset_generic;
149 phy->ops.force_speed_duplex = e1000_phy_force_speed_duplex_m88;
150 phy->ops.get_cable_length = e1000_get_cable_length_m88;
151 phy->ops.read_reg = e1000_read_phy_reg_m88;
152 phy->ops.write_reg = e1000_write_phy_reg_m88;
153 phy->ops.acquire = e1000_get_hw_semaphore_82571;
154 phy->ops.release = e1000_put_hw_semaphore_82571;
135 break;
136 case e1000_82573:
137 phy->type = e1000_phy_m88;
138 phy->ops.get_cfg_done = e1000_get_cfg_done_generic;
139 phy->ops.get_info = e1000_get_phy_info_m88;
140 phy->ops.check_polarity = e1000_check_polarity_m88;
141 phy->ops.commit = e1000_phy_sw_reset_generic;
142 phy->ops.force_speed_duplex = e1000_phy_force_speed_duplex_m88;
143 phy->ops.get_cable_length = e1000_get_cable_length_m88;
144 phy->ops.read_reg = e1000_read_phy_reg_m88;
145 phy->ops.write_reg = e1000_write_phy_reg_m88;
146 phy->ops.acquire = e1000_get_hw_semaphore_82571;
147 phy->ops.release = e1000_put_hw_semaphore_82571;
155
156 /* This uses above function pointers */
157 ret_val = e1000_get_phy_id_82571(hw);
158
159 /* Verify PHY ID */
160 if (phy->id != M88E1111_I_PHY_ID) {
161 ret_val = -E1000_ERR_PHY;
162 DEBUGOUT1("PHY ID unknown: type = 0x%08x\n", phy->id);
163 goto out;
164 }
165 break;
166 case e1000_82574:
167 case e1000_82583:
148 break;
149 case e1000_82574:
150 case e1000_82583:
168 E1000_MUTEX_INIT(&dev_spec->swflag_mutex);
151 E1000_MUTEX_INIT(&hw->dev_spec._82571.swflag_mutex);
169
170 phy->type = e1000_phy_bm;
171 phy->ops.get_cfg_done = e1000_get_cfg_done_generic;
172 phy->ops.get_info = e1000_get_phy_info_m88;
173 phy->ops.check_polarity = e1000_check_polarity_m88;
174 phy->ops.commit = e1000_phy_sw_reset_generic;
175 phy->ops.force_speed_duplex = e1000_phy_force_speed_duplex_m88;
176 phy->ops.get_cable_length = e1000_get_cable_length_m88;
177 phy->ops.read_reg = e1000_read_phy_reg_bm2;
178 phy->ops.write_reg = e1000_write_phy_reg_bm2;
179 phy->ops.acquire = e1000_get_hw_semaphore_82574;
180 phy->ops.release = e1000_put_hw_semaphore_82574;
152
153 phy->type = e1000_phy_bm;
154 phy->ops.get_cfg_done = e1000_get_cfg_done_generic;
155 phy->ops.get_info = e1000_get_phy_info_m88;
156 phy->ops.check_polarity = e1000_check_polarity_m88;
157 phy->ops.commit = e1000_phy_sw_reset_generic;
158 phy->ops.force_speed_duplex = e1000_phy_force_speed_duplex_m88;
159 phy->ops.get_cable_length = e1000_get_cable_length_m88;
160 phy->ops.read_reg = e1000_read_phy_reg_bm2;
161 phy->ops.write_reg = e1000_write_phy_reg_bm2;
162 phy->ops.acquire = e1000_get_hw_semaphore_82574;
163 phy->ops.release = e1000_put_hw_semaphore_82574;
164 phy->ops.set_d0_lplu_state = e1000_set_d0_lplu_state_82574;
165 phy->ops.set_d3_lplu_state = e1000_set_d3_lplu_state_82574;
166 break;
167 default:
168 ret_val = -E1000_ERR_PHY;
169 goto out;
170 break;
171 }
181
172
182 /* This uses above function pointers */
183 ret_val = e1000_get_phy_id_82571(hw);
184 /* Verify PHY ID */
185 if (phy->id != BME1000_E_PHY_ID_R2) {
173 /* This can only be done after all function pointers are setup. */
174 ret_val = e1000_get_phy_id_82571(hw);
175 if (ret_val) {
176 DEBUGOUT("Error getting PHY ID\n");
177 goto out;
178 }
179
180 /* Verify phy id */
181 switch (hw->mac.type) {
182 case e1000_82571:
183 case e1000_82572:
184 if (phy->id != IGP01E1000_I_PHY_ID)
186 ret_val = -E1000_ERR_PHY;
185 ret_val = -E1000_ERR_PHY;
187 DEBUGOUT1("PHY ID unknown: type = 0x%08x\n", phy->id);
188 goto out;
189 }
190 break;
186 break;
187 case e1000_82573:
188 if (phy->id != M88E1111_I_PHY_ID)
189 ret_val = -E1000_ERR_PHY;
190 break;
191 case e1000_82574:
192 case e1000_82583:
193 if (phy->id != BME1000_E_PHY_ID_R2)
194 ret_val = -E1000_ERR_PHY;
195 break;
191 default:
192 ret_val = -E1000_ERR_PHY;
196 default:
197 ret_val = -E1000_ERR_PHY;
193 goto out;
194 break;
195 }
196
198 break;
199 }
200
201 if (ret_val)
202 DEBUGOUT1("PHY ID unknown: type = 0x%08x\n", phy->id);
203
197out:
198 return ret_val;
199}
200
201/**
202 * e1000_init_nvm_params_82571 - Init NVM func ptrs.
203 * @hw: pointer to the HW structure
204 **/

--- 483 unchanged lines hidden (view full) ---

688{
689 DEBUGFUNC("e1000_put_hw_semaphore_82574");
690
691 e1000_put_hw_semaphore_82573(hw);
692 E1000_MUTEX_UNLOCK(&hw->dev_spec._82571.swflag_mutex);
693}
694
695/**
204out:
205 return ret_val;
206}
207
208/**
209 * e1000_init_nvm_params_82571 - Init NVM func ptrs.
210 * @hw: pointer to the HW structure
211 **/

--- 483 unchanged lines hidden (view full) ---

695{
696 DEBUGFUNC("e1000_put_hw_semaphore_82574");
697
698 e1000_put_hw_semaphore_82573(hw);
699 E1000_MUTEX_UNLOCK(&hw->dev_spec._82571.swflag_mutex);
700}
701
702/**
703 * e1000_set_d0_lplu_state_82574 - Set Low Power Linkup D0 state
704 * @hw: pointer to the HW structure
705 * @active: TRUE to enable LPLU, FALSE to disable
706 *
707 * Sets the LPLU D0 state according to the active flag.
708 * LPLU will not be activated unless the
709 * device autonegotiation advertisement meets standards of
710 * either 10 or 10/100 or 10/100/1000 at all duplexes.
711 * This is a function pointer entry point only called by
712 * PHY setup routines.
713 **/
714static s32 e1000_set_d0_lplu_state_82574(struct e1000_hw *hw, bool active)
715{
716 u16 data = E1000_READ_REG(hw, E1000_POEMB);
717
718 DEBUGFUNC("e1000_set_d0_lplu_state_82574");
719
720 if (active)
721 data |= E1000_PHY_CTRL_D0A_LPLU;
722 else
723 data &= ~E1000_PHY_CTRL_D0A_LPLU;
724
725 E1000_WRITE_REG(hw, E1000_POEMB, data);
726 return E1000_SUCCESS;
727}
728
729/**
730 * e1000_set_d3_lplu_state_82574 - Sets low power link up state for D3
731 * @hw: pointer to the HW structure
732 * @active: boolean used to enable/disable lplu
733 *
734 * The low power link up (lplu) state is set to the power management level D3
735 * when active is TRUE, else clear lplu for D3. LPLU
736 * is used during Dx states where the power conservation is most important.
737 * During driver activity, SmartSpeed should be enabled so performance is
738 * maintained.
739 **/
740static s32 e1000_set_d3_lplu_state_82574(struct e1000_hw *hw, bool active)
741{
742 u16 data = E1000_READ_REG(hw, E1000_POEMB);
743
744 DEBUGFUNC("e1000_set_d3_lplu_state_82574");
745
746 if (!active) {
747 data &= ~E1000_PHY_CTRL_NOND0A_LPLU;
748 } else if ((hw->phy.autoneg_advertised == E1000_ALL_SPEED_DUPLEX) ||
749 (hw->phy.autoneg_advertised == E1000_ALL_NOT_GIG) ||
750 (hw->phy.autoneg_advertised == E1000_ALL_10_SPEED)) {
751 data |= E1000_PHY_CTRL_NOND0A_LPLU;
752 }
753
754 E1000_WRITE_REG(hw, E1000_POEMB, data);
755 return E1000_SUCCESS;
756}
757
758/**
696 * e1000_acquire_nvm_82571 - Request for access to the EEPROM
697 * @hw: pointer to the HW structure
698 *
699 * To gain access to the EEPROM, first we must obtain a hardware semaphore.
700 * Then for non-82573 hardware, set the EEPROM access request bit and wait
701 * for EEPROM access grant bit. If the access grant bit is not set, release
702 * hardware semaphore.
703 **/

--- 330 unchanged lines hidden (view full) ---

1034/**
1035 * e1000_reset_hw_82571 - Reset hardware
1036 * @hw: pointer to the HW structure
1037 *
1038 * This resets the hardware into a known state.
1039 **/
1040static s32 e1000_reset_hw_82571(struct e1000_hw *hw)
1041{
759 * e1000_acquire_nvm_82571 - Request for access to the EEPROM
760 * @hw: pointer to the HW structure
761 *
762 * To gain access to the EEPROM, first we must obtain a hardware semaphore.
763 * Then for non-82573 hardware, set the EEPROM access request bit and wait
764 * for EEPROM access grant bit. If the access grant bit is not set, release
765 * hardware semaphore.
766 **/

--- 330 unchanged lines hidden (view full) ---

1097/**
1098 * e1000_reset_hw_82571 - Reset hardware
1099 * @hw: pointer to the HW structure
1100 *
1101 * This resets the hardware into a known state.
1102 **/
1103static s32 e1000_reset_hw_82571(struct e1000_hw *hw)
1104{
1042 u32 ctrl, ctrl_ext, icr;
1105 u32 ctrl, ctrl_ext;
1043 s32 ret_val;
1044
1045 DEBUGFUNC("e1000_reset_hw_82571");
1046
1047 /*
1048 * Prevent the PCI-E bus from sticking if there is no TLP connection
1049 * on the last TLP read/write transaction when MAC is reset.
1050 */

--- 69 unchanged lines hidden (view full) ---

1120 msec_delay(25);
1121 break;
1122 default:
1123 break;
1124 }
1125
1126 /* Clear any pending interrupt events. */
1127 E1000_WRITE_REG(hw, E1000_IMC, 0xffffffff);
1106 s32 ret_val;
1107
1108 DEBUGFUNC("e1000_reset_hw_82571");
1109
1110 /*
1111 * Prevent the PCI-E bus from sticking if there is no TLP connection
1112 * on the last TLP read/write transaction when MAC is reset.
1113 */

--- 69 unchanged lines hidden (view full) ---

1183 msec_delay(25);
1184 break;
1185 default:
1186 break;
1187 }
1188
1189 /* Clear any pending interrupt events. */
1190 E1000_WRITE_REG(hw, E1000_IMC, 0xffffffff);
1128 icr = E1000_READ_REG(hw, E1000_ICR);
1191 E1000_READ_REG(hw, E1000_ICR);
1129
1130 if (hw->mac.type == e1000_82571) {
1131 /* Install any alternate MAC address into RAR0 */
1132 ret_val = e1000_check_alt_mac_addr_generic(hw);
1133 if (ret_val)
1134 goto out;
1135
1136 e1000_set_laa_state_82571(hw, TRUE);

--- 194 unchanged lines hidden (view full) ---

1331 reg |= (1 << 22);
1332 E1000_WRITE_REG(hw, E1000_GCR, reg);
1333
1334 /*
1335 * Workaround for hardware errata.
1336 * apply workaround for hardware errata documented in errata
1337 * docs Fixes issue where some error prone or unreliable PCIe
1338 * completions are occurring, particularly with ASPM enabled.
1192
1193 if (hw->mac.type == e1000_82571) {
1194 /* Install any alternate MAC address into RAR0 */
1195 ret_val = e1000_check_alt_mac_addr_generic(hw);
1196 if (ret_val)
1197 goto out;
1198
1199 e1000_set_laa_state_82571(hw, TRUE);

--- 194 unchanged lines hidden (view full) ---

1394 reg |= (1 << 22);
1395 E1000_WRITE_REG(hw, E1000_GCR, reg);
1396
1397 /*
1398 * Workaround for hardware errata.
1399 * apply workaround for hardware errata documented in errata
1400 * docs Fixes issue where some error prone or unreliable PCIe
1401 * completions are occurring, particularly with ASPM enabled.
1339 * Without fix, issue can cause tx timeouts.
1402 * Without fix, issue can cause Tx timeouts.
1340 */
1341 reg = E1000_READ_REG(hw, E1000_GCR2);
1342 reg |= 1;
1343 E1000_WRITE_REG(hw, E1000_GCR2, reg);
1344 break;
1345 default:
1346 break;
1347 }

--- 114 unchanged lines hidden (view full) ---

1462 /*
1463 * Read PHY Receive Error counter first, if its is max - all F's then
1464 * read the Base1000T status register If both are max then PHY is hung.
1465 */
1466 ret_val = hw->phy.ops.read_reg(hw, E1000_RECEIVE_ERROR_COUNTER,
1467 &receive_errors);
1468 if (ret_val)
1469 goto out;
1403 */
1404 reg = E1000_READ_REG(hw, E1000_GCR2);
1405 reg |= 1;
1406 E1000_WRITE_REG(hw, E1000_GCR2, reg);
1407 break;
1408 default:
1409 break;
1410 }

--- 114 unchanged lines hidden (view full) ---

1525 /*
1526 * Read PHY Receive Error counter first, if its is max - all F's then
1527 * read the Base1000T status register If both are max then PHY is hung.
1528 */
1529 ret_val = hw->phy.ops.read_reg(hw, E1000_RECEIVE_ERROR_COUNTER,
1530 &receive_errors);
1531 if (ret_val)
1532 goto out;
1470 if (receive_errors == E1000_RECEIVE_ERROR_MAX) {
1533 if (receive_errors == E1000_RECEIVE_ERROR_MAX) {
1471 ret_val = hw->phy.ops.read_reg(hw, E1000_BASE1000T_STATUS,
1472 &status_1kbt);
1473 if (ret_val)
1474 goto out;
1475 if ((status_1kbt & E1000_IDLE_ERROR_COUNT_MASK) ==
1476 E1000_IDLE_ERROR_COUNT_MASK)
1477 phy_hung = TRUE;
1478 }

--- 26 unchanged lines hidden (view full) ---

1505 case e1000_82574:
1506 case e1000_82583:
1507 if (hw->fc.requested_mode == e1000_fc_default)
1508 hw->fc.requested_mode = e1000_fc_full;
1509 break;
1510 default:
1511 break;
1512 }
1534 ret_val = hw->phy.ops.read_reg(hw, E1000_BASE1000T_STATUS,
1535 &status_1kbt);
1536 if (ret_val)
1537 goto out;
1538 if ((status_1kbt & E1000_IDLE_ERROR_COUNT_MASK) ==
1539 E1000_IDLE_ERROR_COUNT_MASK)
1540 phy_hung = TRUE;
1541 }

--- 26 unchanged lines hidden (view full) ---

1568 case e1000_82574:
1569 case e1000_82583:
1570 if (hw->fc.requested_mode == e1000_fc_default)
1571 hw->fc.requested_mode = e1000_fc_full;
1572 break;
1573 default:
1574 break;
1575 }
1576
1513 return e1000_setup_link_generic(hw);
1514}
1515
1516/**
1517 * e1000_setup_copper_link_82571 - Configure copper link settings
1518 * @hw: pointer to the HW structure
1519 *
1520 * Configures the link for auto-neg or forced speed and duplex. Then we check

--- 119 unchanged lines hidden (view full) ---

1640 break;
1641
1642 case e1000_serdes_link_forced_up:
1643 /*
1644 * If we are receiving /C/ ordered sets, re-enable
1645 * auto-negotiation in the TXCW register and disable
1646 * forced link in the Device Control register in an
1647 * attempt to auto-negotiate with our link partner.
1577 return e1000_setup_link_generic(hw);
1578}
1579
1580/**
1581 * e1000_setup_copper_link_82571 - Configure copper link settings
1582 * @hw: pointer to the HW structure
1583 *
1584 * Configures the link for auto-neg or forced speed and duplex. Then we check

--- 119 unchanged lines hidden (view full) ---

1704 break;
1705
1706 case e1000_serdes_link_forced_up:
1707 /*
1708 * If we are receiving /C/ ordered sets, re-enable
1709 * auto-negotiation in the TXCW register and disable
1710 * forced link in the Device Control register in an
1711 * attempt to auto-negotiate with our link partner.
1648 * If the partner code word is null, stop forcing
1712 * If the partner code word is null, stop forcing
1649 * and restart auto negotiation.
1650 */
1651 if ((rxcw & E1000_RXCW_C) || !(rxcw & E1000_RXCW_CW)) {
1652 /* Enable autoneg, and unforce link up */
1653 E1000_WRITE_REG(hw, E1000_TXCW, mac->txcw);
1654 E1000_WRITE_REG(hw, E1000_CTRL,
1655 (ctrl & ~E1000_CTRL_SLU));
1656 mac->serdes_link_state =

--- 343 unchanged lines hidden --- 		1713 * and restart auto negotiation.
1714 */
1715 if ((rxcw & E1000_RXCW_C) || !(rxcw & E1000_RXCW_CW)) {
1716 /* Enable autoneg, and unforce link up */
1717 E1000_WRITE_REG(hw, E1000_TXCW, mac->txcw);
1718 E1000_WRITE_REG(hw, E1000_CTRL,
1719 (ctrl & ~E1000_CTRL_SLU));
1720 mac->serdes_link_state =

--- 343 unchanged lines hidden ---