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e1000_82543.c (176667) e1000_82543.c (177867)
1/*******************************************************************************
1/******************************************************************************
2
3 Copyright (c) 2001-2008, Intel Corporation
4 All rights reserved.
5
6 Redistribution and use in source and binary forms, with or without
7 modification, are permitted provided that the following conditions are met:
8
9 1. Redistributions of source code must retain the above copyright notice,

--- 14 unchanged lines hidden (view full) ---

24 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30 POSSIBILITY OF SUCH DAMAGE.
31
2
3 Copyright (c) 2001-2008, Intel Corporation
4 All rights reserved.
5
6 Redistribution and use in source and binary forms, with or without
7 modification, are permitted provided that the following conditions are met:
8
9 1. Redistributions of source code must retain the above copyright notice,

--- 14 unchanged lines hidden (view full) ---

24 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30 POSSIBILITY OF SUCH DAMAGE.
31
32*******************************************************************************/
33/* $FreeBSD: head/sys/dev/em/e1000_82543.c 176667 2008-02-29 21:50:11Z jfv $ */
32******************************************************************************/
33/*$FreeBSD: head/sys/dev/em/e1000_82543.c 177867 2008-04-02 22:00:36Z jfv $*/
34
34
35
36/* e1000_82543
37 * e1000_82544
38 */
39
40#include "e1000_api.h"
41#include "e1000_82543.h"
42
35/* e1000_82543
36 * e1000_82544
37 */
38
39#include "e1000_api.h"
40#include "e1000_82543.h"
41
43STATIC s32 e1000_init_phy_params_82543(struct e1000_hw *hw);
44STATIC s32 e1000_init_nvm_params_82543(struct e1000_hw *hw);
45STATIC s32 e1000_init_mac_params_82543(struct e1000_hw *hw);
46STATIC s32 e1000_read_phy_reg_82543(struct e1000_hw *hw, u32 offset,
42static s32 e1000_init_phy_params_82543(struct e1000_hw *hw);
43static s32 e1000_init_nvm_params_82543(struct e1000_hw *hw);
44static s32 e1000_init_mac_params_82543(struct e1000_hw *hw);
45static s32 e1000_read_phy_reg_82543(struct e1000_hw *hw, u32 offset,
47 u16 *data);
46 u16 *data);
48STATIC s32 e1000_write_phy_reg_82543(struct e1000_hw *hw, u32 offset,
47static s32 e1000_write_phy_reg_82543(struct e1000_hw *hw, u32 offset,
49 u16 data);
48 u16 data);
50STATIC s32 e1000_phy_force_speed_duplex_82543(struct e1000_hw *hw);
51STATIC s32 e1000_phy_hw_reset_82543(struct e1000_hw *hw);
52STATIC s32 e1000_reset_hw_82543(struct e1000_hw *hw);
53STATIC s32 e1000_init_hw_82543(struct e1000_hw *hw);
54STATIC s32 e1000_setup_link_82543(struct e1000_hw *hw);
55STATIC s32 e1000_setup_copper_link_82543(struct e1000_hw *hw);
56STATIC s32 e1000_setup_fiber_link_82543(struct e1000_hw *hw);
57STATIC s32 e1000_check_for_copper_link_82543(struct e1000_hw *hw);
58STATIC s32 e1000_check_for_fiber_link_82543(struct e1000_hw *hw);
59STATIC s32 e1000_led_on_82543(struct e1000_hw *hw);
60STATIC s32 e1000_led_off_82543(struct e1000_hw *hw);
61STATIC void e1000_write_vfta_82543(struct e1000_hw *hw, u32 offset,
49static s32 e1000_phy_force_speed_duplex_82543(struct e1000_hw *hw);
50static s32 e1000_phy_hw_reset_82543(struct e1000_hw *hw);
51static s32 e1000_reset_hw_82543(struct e1000_hw *hw);
52static s32 e1000_init_hw_82543(struct e1000_hw *hw);
53static s32 e1000_setup_link_82543(struct e1000_hw *hw);
54static s32 e1000_setup_copper_link_82543(struct e1000_hw *hw);
55static s32 e1000_setup_fiber_link_82543(struct e1000_hw *hw);
56static s32 e1000_check_for_copper_link_82543(struct e1000_hw *hw);
57static s32 e1000_check_for_fiber_link_82543(struct e1000_hw *hw);
58static s32 e1000_led_on_82543(struct e1000_hw *hw);
59static s32 e1000_led_off_82543(struct e1000_hw *hw);
60static void e1000_write_vfta_82543(struct e1000_hw *hw, u32 offset,
62 u32 value);
61 u32 value);
63STATIC void e1000_mta_set_82543(struct e1000_hw *hw, u32 hash_value);
64STATIC void e1000_clear_hw_cntrs_82543(struct e1000_hw *hw);
62static void e1000_mta_set_82543(struct e1000_hw *hw, u32 hash_value);
63static void e1000_clear_hw_cntrs_82543(struct e1000_hw *hw);
65static s32 e1000_config_mac_to_phy_82543(struct e1000_hw *hw);
66static bool e1000_init_phy_disabled_82543(struct e1000_hw *hw);
67static void e1000_lower_mdi_clk_82543(struct e1000_hw *hw, u32 *ctrl);
68static s32 e1000_polarity_reversal_workaround_82543(struct e1000_hw *hw);
69static void e1000_raise_mdi_clk_82543(struct e1000_hw *hw, u32 *ctrl);
70static u16 e1000_shift_in_mdi_bits_82543(struct e1000_hw *hw);
71static void e1000_shift_out_mdi_bits_82543(struct e1000_hw *hw, u32 data,
72 u16 count);

--- 7 unchanged lines hidden (view full) ---

80};
81
82/**
83 * e1000_init_phy_params_82543 - Init PHY func ptrs.
84 * @hw: pointer to the HW structure
85 *
86 * This is a function pointer entry point called by the api module.
87 **/
64static s32 e1000_config_mac_to_phy_82543(struct e1000_hw *hw);
65static bool e1000_init_phy_disabled_82543(struct e1000_hw *hw);
66static void e1000_lower_mdi_clk_82543(struct e1000_hw *hw, u32 *ctrl);
67static s32 e1000_polarity_reversal_workaround_82543(struct e1000_hw *hw);
68static void e1000_raise_mdi_clk_82543(struct e1000_hw *hw, u32 *ctrl);
69static u16 e1000_shift_in_mdi_bits_82543(struct e1000_hw *hw);
70static void e1000_shift_out_mdi_bits_82543(struct e1000_hw *hw, u32 data,
71 u16 count);

--- 7 unchanged lines hidden (view full) ---

79};
80
81/**
82 * e1000_init_phy_params_82543 - Init PHY func ptrs.
83 * @hw: pointer to the HW structure
84 *
85 * This is a function pointer entry point called by the api module.
86 **/
88STATIC s32 e1000_init_phy_params_82543(struct e1000_hw *hw)
87static s32 e1000_init_phy_params_82543(struct e1000_hw *hw)
89{
90 struct e1000_phy_info *phy = &hw->phy;
88{
89 struct e1000_phy_info *phy = &hw->phy;
91 struct e1000_functions *func = &hw->func;
92 s32 ret_val = E1000_SUCCESS;
93
94 DEBUGFUNC("e1000_init_phy_params_82543");
95
96 if (hw->phy.media_type != e1000_media_type_copper) {
97 phy->type = e1000_phy_none;
98 goto out;
99 } else {
90 s32 ret_val = E1000_SUCCESS;
91
92 DEBUGFUNC("e1000_init_phy_params_82543");
93
94 if (hw->phy.media_type != e1000_media_type_copper) {
95 phy->type = e1000_phy_none;
96 goto out;
97 } else {
100 func->power_up_phy = e1000_power_up_phy_copper;
101 func->power_down_phy = e1000_power_down_phy_copper;
98 phy->ops.power_up = e1000_power_up_phy_copper;
99 phy->ops.power_down = e1000_power_down_phy_copper;
102 }
103
104 phy->addr = 1;
105 phy->autoneg_mask = AUTONEG_ADVERTISE_SPEED_DEFAULT;
106 phy->reset_delay_us = 10000;
107 phy->type = e1000_phy_m88;
108
109 /* Function Pointers */
100 }
101
102 phy->addr = 1;
103 phy->autoneg_mask = AUTONEG_ADVERTISE_SPEED_DEFAULT;
104 phy->reset_delay_us = 10000;
105 phy->type = e1000_phy_m88;
106
107 /* Function Pointers */
110 func->check_polarity = e1000_check_polarity_m88;
111 func->commit_phy = e1000_phy_sw_reset_generic;
112 func->force_speed_duplex = e1000_phy_force_speed_duplex_82543;
113 func->get_cable_length = e1000_get_cable_length_m88;
114 func->get_cfg_done = e1000_get_cfg_done_generic;
115 func->read_phy_reg = (hw->mac.type == e1000_82543)
108 phy->ops.check_polarity = e1000_check_polarity_m88;
109 phy->ops.commit = e1000_phy_sw_reset_generic;
110 phy->ops.force_speed_duplex = e1000_phy_force_speed_duplex_82543;
111 phy->ops.get_cable_length = e1000_get_cable_length_m88;
112 phy->ops.get_cfg_done = e1000_get_cfg_done_generic;
113 phy->ops.read_reg = (hw->mac.type == e1000_82543)
116 ? e1000_read_phy_reg_82543
117 : e1000_read_phy_reg_m88;
114 ? e1000_read_phy_reg_82543
115 : e1000_read_phy_reg_m88;
118 func->reset_phy = (hw->mac.type == e1000_82543)
116 phy->ops.reset = (hw->mac.type == e1000_82543)
119 ? e1000_phy_hw_reset_82543
120 : e1000_phy_hw_reset_generic;
117 ? e1000_phy_hw_reset_82543
118 : e1000_phy_hw_reset_generic;
121 func->write_phy_reg = (hw->mac.type == e1000_82543)
119 phy->ops.write_reg = (hw->mac.type == e1000_82543)
122 ? e1000_write_phy_reg_82543
123 : e1000_write_phy_reg_m88;
120 ? e1000_write_phy_reg_82543
121 : e1000_write_phy_reg_m88;
124 func->get_phy_info = e1000_get_phy_info_m88;
122 phy->ops.get_info = e1000_get_phy_info_m88;
125
126 /*
127 * The external PHY of the 82543 can be in a funky state.
128 * Resetting helps us read the PHY registers for acquiring
129 * the PHY ID.
130 */
131 if (!e1000_init_phy_disabled_82543(hw)) {
123
124 /*
125 * The external PHY of the 82543 can be in a funky state.
126 * Resetting helps us read the PHY registers for acquiring
127 * the PHY ID.
128 */
129 if (!e1000_init_phy_disabled_82543(hw)) {
132 ret_val = e1000_phy_hw_reset(hw);
130 ret_val = phy->ops.reset(hw);
133 if (ret_val) {
134 DEBUGOUT("Resetting PHY during init failed.\n");
135 goto out;
136 }
137 msec_delay(20);
138 }
139
140 ret_val = e1000_get_phy_id(hw);

--- 25 unchanged lines hidden (view full) ---

166}
167
168/**
169 * e1000_init_nvm_params_82543 - Init NVM func ptrs.
170 * @hw: pointer to the HW structure
171 *
172 * This is a function pointer entry point called by the api module.
173 **/
131 if (ret_val) {
132 DEBUGOUT("Resetting PHY during init failed.\n");
133 goto out;
134 }
135 msec_delay(20);
136 }
137
138 ret_val = e1000_get_phy_id(hw);

--- 25 unchanged lines hidden (view full) ---

164}
165
166/**
167 * e1000_init_nvm_params_82543 - Init NVM func ptrs.
168 * @hw: pointer to the HW structure
169 *
170 * This is a function pointer entry point called by the api module.
171 **/
174STATIC s32 e1000_init_nvm_params_82543(struct e1000_hw *hw)
172static s32 e1000_init_nvm_params_82543(struct e1000_hw *hw)
175{
176 struct e1000_nvm_info *nvm = &hw->nvm;
173{
174 struct e1000_nvm_info *nvm = &hw->nvm;
177 struct e1000_functions *func = &hw->func;
178
179 DEBUGFUNC("e1000_init_nvm_params_82543");
180
181 nvm->type = e1000_nvm_eeprom_microwire;
182 nvm->word_size = 64;
183 nvm->delay_usec = 50;
184 nvm->address_bits = 6;
185 nvm->opcode_bits = 3;
186
187 /* Function Pointers */
175
176 DEBUGFUNC("e1000_init_nvm_params_82543");
177
178 nvm->type = e1000_nvm_eeprom_microwire;
179 nvm->word_size = 64;
180 nvm->delay_usec = 50;
181 nvm->address_bits = 6;
182 nvm->opcode_bits = 3;
183
184 /* Function Pointers */
188 func->read_nvm = e1000_read_nvm_microwire;
189 func->update_nvm = e1000_update_nvm_checksum_generic;
190 func->valid_led_default = e1000_valid_led_default_generic;
191 func->validate_nvm = e1000_validate_nvm_checksum_generic;
192 func->write_nvm = e1000_write_nvm_microwire;
185 nvm->ops.read = e1000_read_nvm_microwire;
186 nvm->ops.update = e1000_update_nvm_checksum_generic;
187 nvm->ops.valid_led_default = e1000_valid_led_default_generic;
188 nvm->ops.validate = e1000_validate_nvm_checksum_generic;
189 nvm->ops.write = e1000_write_nvm_microwire;
193
194 return E1000_SUCCESS;
195}
196
197/**
198 * e1000_init_mac_params_82543 - Init MAC func ptrs.
199 * @hw: pointer to the HW structure
200 *
201 * This is a function pointer entry point called by the api module.
202 **/
190
191 return E1000_SUCCESS;
192}
193
194/**
195 * e1000_init_mac_params_82543 - Init MAC func ptrs.
196 * @hw: pointer to the HW structure
197 *
198 * This is a function pointer entry point called by the api module.
199 **/
203STATIC s32 e1000_init_mac_params_82543(struct e1000_hw *hw)
200static s32 e1000_init_mac_params_82543(struct e1000_hw *hw)
204{
205 struct e1000_mac_info *mac = &hw->mac;
201{
202 struct e1000_mac_info *mac = &hw->mac;
206 struct e1000_functions *func = &hw->func;
207 s32 ret_val;
208
209 DEBUGFUNC("e1000_init_mac_params_82543");
210
211 /* Set media type */
212 switch (hw->device_id) {
213 case E1000_DEV_ID_82543GC_FIBER:
214 case E1000_DEV_ID_82544EI_FIBER:

--- 7 unchanged lines hidden (view full) ---

222 /* Set mta register count */
223 mac->mta_reg_count = 128;
224 /* Set rar entry count */
225 mac->rar_entry_count = E1000_RAR_ENTRIES;
226
227 /* Function pointers */
228
229 /* bus type/speed/width */
203 s32 ret_val;
204
205 DEBUGFUNC("e1000_init_mac_params_82543");
206
207 /* Set media type */
208 switch (hw->device_id) {
209 case E1000_DEV_ID_82543GC_FIBER:
210 case E1000_DEV_ID_82544EI_FIBER:

--- 7 unchanged lines hidden (view full) ---

218 /* Set mta register count */
219 mac->mta_reg_count = 128;
220 /* Set rar entry count */
221 mac->rar_entry_count = E1000_RAR_ENTRIES;
222
223 /* Function pointers */
224
225 /* bus type/speed/width */
230 func->get_bus_info = e1000_get_bus_info_pci_generic;
226 mac->ops.get_bus_info = e1000_get_bus_info_pci_generic;
231 /* reset */
227 /* reset */
232 func->reset_hw = e1000_reset_hw_82543;
228 mac->ops.reset_hw = e1000_reset_hw_82543;
233 /* hw initialization */
229 /* hw initialization */
234 func->init_hw = e1000_init_hw_82543;
230 mac->ops.init_hw = e1000_init_hw_82543;
235 /* link setup */
231 /* link setup */
236 func->setup_link = e1000_setup_link_82543;
232 mac->ops.setup_link = e1000_setup_link_82543;
237 /* physical interface setup */
233 /* physical interface setup */
238 func->setup_physical_interface =
234 mac->ops.setup_physical_interface =
239 (hw->phy.media_type == e1000_media_type_copper)
240 ? e1000_setup_copper_link_82543
241 : e1000_setup_fiber_link_82543;
242 /* check for link */
235 (hw->phy.media_type == e1000_media_type_copper)
236 ? e1000_setup_copper_link_82543
237 : e1000_setup_fiber_link_82543;
238 /* check for link */
243 func->check_for_link =
239 mac->ops.check_for_link =
244 (hw->phy.media_type == e1000_media_type_copper)
245 ? e1000_check_for_copper_link_82543
246 : e1000_check_for_fiber_link_82543;
247 /* link info */
240 (hw->phy.media_type == e1000_media_type_copper)
241 ? e1000_check_for_copper_link_82543
242 : e1000_check_for_fiber_link_82543;
243 /* link info */
248 func->get_link_up_info =
244 mac->ops.get_link_up_info =
249 (hw->phy.media_type == e1000_media_type_copper)
250 ? e1000_get_speed_and_duplex_copper_generic
251 : e1000_get_speed_and_duplex_fiber_serdes_generic;
252 /* multicast address update */
245 (hw->phy.media_type == e1000_media_type_copper)
246 ? e1000_get_speed_and_duplex_copper_generic
247 : e1000_get_speed_and_duplex_fiber_serdes_generic;
248 /* multicast address update */
253 func->update_mc_addr_list = e1000_update_mc_addr_list_generic;
249 mac->ops.update_mc_addr_list = e1000_update_mc_addr_list_generic;
254 /* writing VFTA */
250 /* writing VFTA */
255 func->write_vfta = e1000_write_vfta_82543;
251 mac->ops.write_vfta = e1000_write_vfta_82543;
256 /* clearing VFTA */
252 /* clearing VFTA */
257 func->clear_vfta = e1000_clear_vfta_generic;
253 mac->ops.clear_vfta = e1000_clear_vfta_generic;
258 /* setting MTA */
254 /* setting MTA */
259 func->mta_set = e1000_mta_set_82543;
255 mac->ops.mta_set = e1000_mta_set_82543;
260 /* turn on/off LED */
256 /* turn on/off LED */
261 func->led_on = e1000_led_on_82543;
262 func->led_off = e1000_led_off_82543;
257 mac->ops.led_on = e1000_led_on_82543;
258 mac->ops.led_off = e1000_led_off_82543;
263 /* remove device */
259 /* remove device */
264 func->remove_device = e1000_remove_device_generic;
260 mac->ops.remove_device = e1000_remove_device_generic;
265 /* clear hardware counters */
261 /* clear hardware counters */
266 func->clear_hw_cntrs = e1000_clear_hw_cntrs_82543;
262 mac->ops.clear_hw_cntrs = e1000_clear_hw_cntrs_82543;
267
268 hw->dev_spec_size = sizeof(struct e1000_dev_spec_82543);
269
270 /* Device-specific structure allocation */
271 ret_val = e1000_alloc_zeroed_dev_spec_struct(hw, hw->dev_spec_size);
272 if (ret_val)
273 goto out;
274

--- 12 unchanged lines hidden (view full) ---

287 *
288 * The only function explicitly called by the api module to initialize
289 * all function pointers and parameters.
290 **/
291void e1000_init_function_pointers_82543(struct e1000_hw *hw)
292{
293 DEBUGFUNC("e1000_init_function_pointers_82543");
294
263
264 hw->dev_spec_size = sizeof(struct e1000_dev_spec_82543);
265
266 /* Device-specific structure allocation */
267 ret_val = e1000_alloc_zeroed_dev_spec_struct(hw, hw->dev_spec_size);
268 if (ret_val)
269 goto out;
270

--- 12 unchanged lines hidden (view full) ---

283 *
284 * The only function explicitly called by the api module to initialize
285 * all function pointers and parameters.
286 **/
287void e1000_init_function_pointers_82543(struct e1000_hw *hw)
288{
289 DEBUGFUNC("e1000_init_function_pointers_82543");
290
295 hw->func.init_mac_params = e1000_init_mac_params_82543;
296 hw->func.init_nvm_params = e1000_init_nvm_params_82543;
297 hw->func.init_phy_params = e1000_init_phy_params_82543;
291 hw->mac.ops.init_params = e1000_init_mac_params_82543;
292 hw->nvm.ops.init_params = e1000_init_nvm_params_82543;
293 hw->phy.ops.init_params = e1000_init_phy_params_82543;
298}
299
300/**
301 * e1000_tbi_compatibility_enabled_82543 - Returns TBI compat status
302 * @hw: pointer to the HW structure
303 *
304 * Returns the current status of 10-bit Interface (TBI) compatibility
305 * (enabled/disabled).

--- 114 unchanged lines hidden (view full) ---

420 return;
421}
422
423/**
424 * e1000_init_phy_disabled_82543 - Returns init PHY status
425 * @hw: pointer to the HW structure
426 *
427 * Returns the current status of whether PHY initialization is disabled.
294}
295
296/**
297 * e1000_tbi_compatibility_enabled_82543 - Returns TBI compat status
298 * @hw: pointer to the HW structure
299 *
300 * Returns the current status of 10-bit Interface (TBI) compatibility
301 * (enabled/disabled).

--- 114 unchanged lines hidden (view full) ---

416 return;
417}
418
419/**
420 * e1000_init_phy_disabled_82543 - Returns init PHY status
421 * @hw: pointer to the HW structure
422 *
423 * Returns the current status of whether PHY initialization is disabled.
428 * True if PHY initialization is disabled else false.
424 * True if PHY initialization is disabled else FALSE.
429 **/
430static bool e1000_init_phy_disabled_82543(struct e1000_hw *hw)
431{
432 struct e1000_dev_spec_82543 *dev_spec;
433 bool ret_val;
434
435 DEBUGFUNC("e1000_init_phy_disabled_82543");
436

--- 97 unchanged lines hidden (view full) ---

534/**
535 * e1000_read_phy_reg_82543 - Read PHY register
536 * @hw: pointer to the HW structure
537 * @offset: register offset to be read
538 * @data: pointer to the read data
539 *
540 * Reads the PHY at offset and stores the information read to data.
541 **/
425 **/
426static bool e1000_init_phy_disabled_82543(struct e1000_hw *hw)
427{
428 struct e1000_dev_spec_82543 *dev_spec;
429 bool ret_val;
430
431 DEBUGFUNC("e1000_init_phy_disabled_82543");
432

--- 97 unchanged lines hidden (view full) ---

530/**
531 * e1000_read_phy_reg_82543 - Read PHY register
532 * @hw: pointer to the HW structure
533 * @offset: register offset to be read
534 * @data: pointer to the read data
535 *
536 * Reads the PHY at offset and stores the information read to data.
537 **/
542STATIC s32 e1000_read_phy_reg_82543(struct e1000_hw *hw, u32 offset, u16 *data)
538static s32 e1000_read_phy_reg_82543(struct e1000_hw *hw, u32 offset, u16 *data)
543{
544 u32 mdic;
545 s32 ret_val = E1000_SUCCESS;
546
547 DEBUGFUNC("e1000_read_phy_reg_82543");
548
549 if (offset > MAX_PHY_REG_ADDRESS) {
550 DEBUGOUT1("PHY Address %d is out of range\n", offset);

--- 39 unchanged lines hidden (view full) ---

590/**
591 * e1000_write_phy_reg_82543 - Write PHY register
592 * @hw: pointer to the HW structure
593 * @offset: register offset to be written
594 * @data: pointer to the data to be written at offset
595 *
596 * Writes data to the PHY at offset.
597 **/
539{
540 u32 mdic;
541 s32 ret_val = E1000_SUCCESS;
542
543 DEBUGFUNC("e1000_read_phy_reg_82543");
544
545 if (offset > MAX_PHY_REG_ADDRESS) {
546 DEBUGOUT1("PHY Address %d is out of range\n", offset);

--- 39 unchanged lines hidden (view full) ---

586/**
587 * e1000_write_phy_reg_82543 - Write PHY register
588 * @hw: pointer to the HW structure
589 * @offset: register offset to be written
590 * @data: pointer to the data to be written at offset
591 *
592 * Writes data to the PHY at offset.
593 **/
598STATIC s32 e1000_write_phy_reg_82543(struct e1000_hw *hw, u32 offset, u16 data)
594static s32 e1000_write_phy_reg_82543(struct e1000_hw *hw, u32 offset, u16 data)
599{
600 u32 mdic;
601 s32 ret_val = E1000_SUCCESS;
602
603 DEBUGFUNC("e1000_write_phy_reg_82543");
604
605 if (offset > MAX_PHY_REG_ADDRESS) {
606 DEBUGOUT1("PHY Address %d is out of range\n", offset);

--- 179 unchanged lines hidden (view full) ---

786/**
787 * e1000_phy_force_speed_duplex_82543 - Force speed/duplex for PHY
788 * @hw: pointer to the HW structure
789 *
790 * Calls the function to force speed and duplex for the m88 PHY, and
791 * if the PHY is not auto-negotiating and the speed is forced to 10Mbit,
792 * then call the function for polarity reversal workaround.
793 **/
595{
596 u32 mdic;
597 s32 ret_val = E1000_SUCCESS;
598
599 DEBUGFUNC("e1000_write_phy_reg_82543");
600
601 if (offset > MAX_PHY_REG_ADDRESS) {
602 DEBUGOUT1("PHY Address %d is out of range\n", offset);

--- 179 unchanged lines hidden (view full) ---

782/**
783 * e1000_phy_force_speed_duplex_82543 - Force speed/duplex for PHY
784 * @hw: pointer to the HW structure
785 *
786 * Calls the function to force speed and duplex for the m88 PHY, and
787 * if the PHY is not auto-negotiating and the speed is forced to 10Mbit,
788 * then call the function for polarity reversal workaround.
789 **/
794STATIC s32 e1000_phy_force_speed_duplex_82543(struct e1000_hw *hw)
790static s32 e1000_phy_force_speed_duplex_82543(struct e1000_hw *hw)
795{
796 s32 ret_val;
797
798 DEBUGFUNC("e1000_phy_force_speed_duplex_82543");
799
800 ret_val = e1000_phy_force_speed_duplex_m88(hw);
801 if (ret_val)
802 goto out;

--- 11 unchanged lines hidden (view full) ---

814 * @hw: pointer to the HW structure
815 *
816 * When forcing link to 10 Full or 10 Half, the PHY can reverse the polarity
817 * inadvertently. To workaround the issue, we disable the transmitter on
818 * the PHY until we have established the link partner's link parameters.
819 **/
820static s32 e1000_polarity_reversal_workaround_82543(struct e1000_hw *hw)
821{
791{
792 s32 ret_val;
793
794 DEBUGFUNC("e1000_phy_force_speed_duplex_82543");
795
796 ret_val = e1000_phy_force_speed_duplex_m88(hw);
797 if (ret_val)
798 goto out;

--- 11 unchanged lines hidden (view full) ---

810 * @hw: pointer to the HW structure
811 *
812 * When forcing link to 10 Full or 10 Half, the PHY can reverse the polarity
813 * inadvertently. To workaround the issue, we disable the transmitter on
814 * the PHY until we have established the link partner's link parameters.
815 **/
816static s32 e1000_polarity_reversal_workaround_82543(struct e1000_hw *hw)
817{
822 s32 ret_val;
818 s32 ret_val = E1000_SUCCESS;
823 u16 mii_status_reg;
824 u16 i;
825 bool link;
826
819 u16 mii_status_reg;
820 u16 i;
821 bool link;
822
823 if (!(hw->phy.ops.write_reg))
824 goto out;
825
827 /* Polarity reversal workaround for forced 10F/10H links. */
828
829 /* Disable the transmitter on the PHY */
830
826 /* Polarity reversal workaround for forced 10F/10H links. */
827
828 /* Disable the transmitter on the PHY */
829
831 ret_val = e1000_write_phy_reg(hw, M88E1000_PHY_PAGE_SELECT, 0x0019);
830 ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_PAGE_SELECT, 0x0019);
832 if (ret_val)
833 goto out;
831 if (ret_val)
832 goto out;
834 ret_val = e1000_write_phy_reg(hw, M88E1000_PHY_GEN_CONTROL, 0xFFFF);
833 ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_GEN_CONTROL, 0xFFFF);
835 if (ret_val)
836 goto out;
837
834 if (ret_val)
835 goto out;
836
838 ret_val = e1000_write_phy_reg(hw, M88E1000_PHY_PAGE_SELECT, 0x0000);
837 ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_PAGE_SELECT, 0x0000);
839 if (ret_val)
840 goto out;
841
842 /*
843 * This loop will early-out if the NO link condition has been met.
844 * In other words, DO NOT use e1000_phy_has_link_generic() here.
845 */
846 for (i = PHY_FORCE_TIME; i > 0; i--) {
847 /*
848 * Read the MII Status Register and wait for Link Status bit
849 * to be clear.
850 */
851
838 if (ret_val)
839 goto out;
840
841 /*
842 * This loop will early-out if the NO link condition has been met.
843 * In other words, DO NOT use e1000_phy_has_link_generic() here.
844 */
845 for (i = PHY_FORCE_TIME; i > 0; i--) {
846 /*
847 * Read the MII Status Register and wait for Link Status bit
848 * to be clear.
849 */
850
852 ret_val = e1000_read_phy_reg(hw, PHY_STATUS, &mii_status_reg);
851 ret_val = hw->phy.ops.read_reg(hw, PHY_STATUS, &mii_status_reg);
853 if (ret_val)
854 goto out;
855
852 if (ret_val)
853 goto out;
854
856 ret_val = e1000_read_phy_reg(hw, PHY_STATUS, &mii_status_reg);
855 ret_val = hw->phy.ops.read_reg(hw, PHY_STATUS, &mii_status_reg);
857 if (ret_val)
858 goto out;
859
860 if ((mii_status_reg & ~MII_SR_LINK_STATUS) == 0)
861 break;
862 msec_delay_irq(100);
863 }
864
865 /* Recommended delay time after link has been lost */
866 msec_delay_irq(1000);
867
868 /* Now we will re-enable the transmitter on the PHY */
869
856 if (ret_val)
857 goto out;
858
859 if ((mii_status_reg & ~MII_SR_LINK_STATUS) == 0)
860 break;
861 msec_delay_irq(100);
862 }
863
864 /* Recommended delay time after link has been lost */
865 msec_delay_irq(1000);
866
867 /* Now we will re-enable the transmitter on the PHY */
868
870 ret_val = e1000_write_phy_reg(hw, M88E1000_PHY_PAGE_SELECT, 0x0019);
869 ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_PAGE_SELECT, 0x0019);
871 if (ret_val)
872 goto out;
873 msec_delay_irq(50);
870 if (ret_val)
871 goto out;
872 msec_delay_irq(50);
874 ret_val = e1000_write_phy_reg(hw, M88E1000_PHY_GEN_CONTROL, 0xFFF0);
873 ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_GEN_CONTROL, 0xFFF0);
875 if (ret_val)
876 goto out;
877 msec_delay_irq(50);
874 if (ret_val)
875 goto out;
876 msec_delay_irq(50);
878 ret_val = e1000_write_phy_reg(hw, M88E1000_PHY_GEN_CONTROL, 0xFF00);
877 ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_GEN_CONTROL, 0xFF00);
879 if (ret_val)
880 goto out;
881 msec_delay_irq(50);
878 if (ret_val)
879 goto out;
880 msec_delay_irq(50);
882 ret_val = e1000_write_phy_reg(hw, M88E1000_PHY_GEN_CONTROL, 0x0000);
881 ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_GEN_CONTROL, 0x0000);
883 if (ret_val)
884 goto out;
885
882 if (ret_val)
883 goto out;
884
886 ret_val = e1000_write_phy_reg(hw, M88E1000_PHY_PAGE_SELECT, 0x0000);
885 ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_PAGE_SELECT, 0x0000);
887 if (ret_val)
888 goto out;
889
890 /*
891 * Read the MII Status Register and wait for Link Status bit
892 * to be set.
893 */
894 ret_val = e1000_phy_has_link_generic(hw, PHY_FORCE_TIME, 100000, &link);

--- 8 unchanged lines hidden (view full) ---

903 * e1000_phy_hw_reset_82543 - PHY hardware reset
904 * @hw: pointer to the HW structure
905 *
906 * Sets the PHY_RESET_DIR bit in the extended device control register
907 * to put the PHY into a reset and waits for completion. Once the reset
908 * has been accomplished, clear the PHY_RESET_DIR bit to take the PHY out
909 * of reset. This is a function pointer entry point called by the api module.
910 **/
886 if (ret_val)
887 goto out;
888
889 /*
890 * Read the MII Status Register and wait for Link Status bit
891 * to be set.
892 */
893 ret_val = e1000_phy_has_link_generic(hw, PHY_FORCE_TIME, 100000, &link);

--- 8 unchanged lines hidden (view full) ---

902 * e1000_phy_hw_reset_82543 - PHY hardware reset
903 * @hw: pointer to the HW structure
904 *
905 * Sets the PHY_RESET_DIR bit in the extended device control register
906 * to put the PHY into a reset and waits for completion. Once the reset
907 * has been accomplished, clear the PHY_RESET_DIR bit to take the PHY out
908 * of reset. This is a function pointer entry point called by the api module.
909 **/
911STATIC s32 e1000_phy_hw_reset_82543(struct e1000_hw *hw)
910static s32 e1000_phy_hw_reset_82543(struct e1000_hw *hw)
912{
911{
913 struct e1000_functions *func = &hw->func;
914 u32 ctrl_ext;
915 s32 ret_val;
916
917 DEBUGFUNC("e1000_phy_hw_reset_82543");
918
919 /*
920 * Read the Extended Device Control Register, assert the PHY_RESET_DIR
921 * bit to put the PHY into reset...

--- 8 unchanged lines hidden (view full) ---

930
931 /* ...then take it out of reset. */
932 ctrl_ext |= E1000_CTRL_EXT_SDP4_DATA;
933 E1000_WRITE_REG(hw, E1000_CTRL_EXT, ctrl_ext);
934 E1000_WRITE_FLUSH(hw);
935
936 usec_delay(150);
937
912 u32 ctrl_ext;
913 s32 ret_val;
914
915 DEBUGFUNC("e1000_phy_hw_reset_82543");
916
917 /*
918 * Read the Extended Device Control Register, assert the PHY_RESET_DIR
919 * bit to put the PHY into reset...

--- 8 unchanged lines hidden (view full) ---

928
929 /* ...then take it out of reset. */
930 ctrl_ext |= E1000_CTRL_EXT_SDP4_DATA;
931 E1000_WRITE_REG(hw, E1000_CTRL_EXT, ctrl_ext);
932 E1000_WRITE_FLUSH(hw);
933
934 usec_delay(150);
935
938 ret_val = func->get_cfg_done(hw);
936 if (!(hw->phy.ops.get_cfg_done))
937 return E1000_SUCCESS;
939
938
939 ret_val = hw->phy.ops.get_cfg_done(hw);
940
940 return ret_val;
941}
942
943/**
944 * e1000_reset_hw_82543 - Reset hardware
945 * @hw: pointer to the HW structure
946 *
947 * This resets the hardware into a known state. This is a
948 * function pointer entry point called by the api module.
949 **/
941 return ret_val;
942}
943
944/**
945 * e1000_reset_hw_82543 - Reset hardware
946 * @hw: pointer to the HW structure
947 *
948 * This resets the hardware into a known state. This is a
949 * function pointer entry point called by the api module.
950 **/
950STATIC s32 e1000_reset_hw_82543(struct e1000_hw *hw)
951static s32 e1000_reset_hw_82543(struct e1000_hw *hw)
951{
952 u32 ctrl, icr;
953 s32 ret_val = E1000_SUCCESS;
954
955 DEBUGFUNC("e1000_reset_hw_82543");
956
957 DEBUGOUT("Masking off all interrupts\n");
958 E1000_WRITE_REG(hw, E1000_IMC, 0xffffffff);

--- 22 unchanged lines hidden (view full) ---

981 */
982 E1000_WRITE_REG_IO(hw, E1000_CTRL, ctrl | E1000_CTRL_RST);
983 }
984
985 /*
986 * After MAC reset, force reload of NVM to restore power-on
987 * settings to device.
988 */
952{
953 u32 ctrl, icr;
954 s32 ret_val = E1000_SUCCESS;
955
956 DEBUGFUNC("e1000_reset_hw_82543");
957
958 DEBUGOUT("Masking off all interrupts\n");
959 E1000_WRITE_REG(hw, E1000_IMC, 0xffffffff);

--- 22 unchanged lines hidden (view full) ---

982 */
983 E1000_WRITE_REG_IO(hw, E1000_CTRL, ctrl | E1000_CTRL_RST);
984 }
985
986 /*
987 * After MAC reset, force reload of NVM to restore power-on
988 * settings to device.
989 */
989 e1000_reload_nvm(hw);
990 hw->nvm.ops.reload(hw);
990 msec_delay(2);
991
992 /* Masking off and clearing any pending interrupts */
993 E1000_WRITE_REG(hw, E1000_IMC, 0xffffffff);
994 icr = E1000_READ_REG(hw, E1000_ICR);
995
996 return ret_val;
997}
998
999/**
1000 * e1000_init_hw_82543 - Initialize hardware
1001 * @hw: pointer to the HW structure
1002 *
1003 * This inits the hardware readying it for operation.
1004 **/
991 msec_delay(2);
992
993 /* Masking off and clearing any pending interrupts */
994 E1000_WRITE_REG(hw, E1000_IMC, 0xffffffff);
995 icr = E1000_READ_REG(hw, E1000_ICR);
996
997 return ret_val;
998}
999
1000/**
1001 * e1000_init_hw_82543 - Initialize hardware
1002 * @hw: pointer to the HW structure
1003 *
1004 * This inits the hardware readying it for operation.
1005 **/
1005STATIC s32 e1000_init_hw_82543(struct e1000_hw *hw)
1006static s32 e1000_init_hw_82543(struct e1000_hw *hw)
1006{
1007 struct e1000_mac_info *mac = &hw->mac;
1008 struct e1000_dev_spec_82543 *dev_spec;
1009 u32 ctrl;
1010 s32 ret_val;
1011 u16 i;
1012
1013 DEBUGFUNC("e1000_init_hw_82543");
1014
1015 dev_spec = (struct e1000_dev_spec_82543 *)hw->dev_spec;
1016
1017 if (!dev_spec) {
1018 DEBUGOUT("dev_spec pointer is set to NULL.\n");
1019 ret_val = -E1000_ERR_CONFIG;
1020 goto out;
1021 }
1022
1023 /* Disabling VLAN filtering */
1024 E1000_WRITE_REG(hw, E1000_VET, 0);
1007{
1008 struct e1000_mac_info *mac = &hw->mac;
1009 struct e1000_dev_spec_82543 *dev_spec;
1010 u32 ctrl;
1011 s32 ret_val;
1012 u16 i;
1013
1014 DEBUGFUNC("e1000_init_hw_82543");
1015
1016 dev_spec = (struct e1000_dev_spec_82543 *)hw->dev_spec;
1017
1018 if (!dev_spec) {
1019 DEBUGOUT("dev_spec pointer is set to NULL.\n");
1020 ret_val = -E1000_ERR_CONFIG;
1021 goto out;
1022 }
1023
1024 /* Disabling VLAN filtering */
1025 E1000_WRITE_REG(hw, E1000_VET, 0);
1025 e1000_clear_vfta(hw);
1026 mac->ops.clear_vfta(hw);
1026
1027 /* Setup the receive address. */
1028 e1000_init_rx_addrs_generic(hw, mac->rar_entry_count);
1029
1030 /* Zero out the Multicast HASH table */
1031 DEBUGOUT("Zeroing the MTA\n");
1032 for (i = 0; i < mac->mta_reg_count; i++) {
1033 E1000_WRITE_REG_ARRAY(hw, E1000_MTA, i, 0);

--- 8 unchanged lines hidden (view full) ---

1042 if (hw->mac.type == e1000_82543 && dev_spec->dma_fairness) {
1043 ctrl = E1000_READ_REG(hw, E1000_CTRL);
1044 E1000_WRITE_REG(hw, E1000_CTRL, ctrl | E1000_CTRL_PRIOR);
1045 }
1046
1047 e1000_pcix_mmrbc_workaround_generic(hw);
1048
1049 /* Setup link and flow control */
1027
1028 /* Setup the receive address. */
1029 e1000_init_rx_addrs_generic(hw, mac->rar_entry_count);
1030
1031 /* Zero out the Multicast HASH table */
1032 DEBUGOUT("Zeroing the MTA\n");
1033 for (i = 0; i < mac->mta_reg_count; i++) {
1034 E1000_WRITE_REG_ARRAY(hw, E1000_MTA, i, 0);

--- 8 unchanged lines hidden (view full) ---

1043 if (hw->mac.type == e1000_82543 && dev_spec->dma_fairness) {
1044 ctrl = E1000_READ_REG(hw, E1000_CTRL);
1045 E1000_WRITE_REG(hw, E1000_CTRL, ctrl | E1000_CTRL_PRIOR);
1046 }
1047
1048 e1000_pcix_mmrbc_workaround_generic(hw);
1049
1050 /* Setup link and flow control */
1050 ret_val = e1000_setup_link(hw);
1051 ret_val = mac->ops.setup_link(hw);
1051
1052 /*
1053 * Clear all of the statistics registers (clear on read). It is
1054 * important that we do this after we have tried to establish link
1055 * because the symbol error count will increment wildly if there
1056 * is no link.
1057 */
1058 e1000_clear_hw_cntrs_82543(hw);

--- 10 unchanged lines hidden (view full) ---

1069 * extended device control register with the information before calling
1070 * the generic setup link function, which does the following:
1071 * Determines which flow control settings to use, then configures flow
1072 * control. Calls the appropriate media-specific link configuration
1073 * function. Assuming the adapter has a valid link partner, a valid link
1074 * should be established. Assumes the hardware has previously been reset
1075 * and the transmitter and receiver are not enabled.
1076 **/
1052
1053 /*
1054 * Clear all of the statistics registers (clear on read). It is
1055 * important that we do this after we have tried to establish link
1056 * because the symbol error count will increment wildly if there
1057 * is no link.
1058 */
1059 e1000_clear_hw_cntrs_82543(hw);

--- 10 unchanged lines hidden (view full) ---

1070 * extended device control register with the information before calling
1071 * the generic setup link function, which does the following:
1072 * Determines which flow control settings to use, then configures flow
1073 * control. Calls the appropriate media-specific link configuration
1074 * function. Assuming the adapter has a valid link partner, a valid link
1075 * should be established. Assumes the hardware has previously been reset
1076 * and the transmitter and receiver are not enabled.
1077 **/
1077STATIC s32 e1000_setup_link_82543(struct e1000_hw *hw)
1078static s32 e1000_setup_link_82543(struct e1000_hw *hw)
1078{
1079 u32 ctrl_ext;
1080 s32 ret_val;
1081 u16 data;
1082
1083 DEBUGFUNC("e1000_setup_link_82543");
1084
1085 /*
1086 * Take the 4 bits from NVM word 0xF that determine the initial
1087 * polarity value for the SW controlled pins, and setup the
1088 * Extended Device Control reg with that info.
1089 * This is needed because one of the SW controlled pins is used for
1090 * signal detection. So this should be done before phy setup.
1091 */
1092 if (hw->mac.type == e1000_82543) {
1079{
1080 u32 ctrl_ext;
1081 s32 ret_val;
1082 u16 data;
1083
1084 DEBUGFUNC("e1000_setup_link_82543");
1085
1086 /*
1087 * Take the 4 bits from NVM word 0xF that determine the initial
1088 * polarity value for the SW controlled pins, and setup the
1089 * Extended Device Control reg with that info.
1090 * This is needed because one of the SW controlled pins is used for
1091 * signal detection. So this should be done before phy setup.
1092 */
1093 if (hw->mac.type == e1000_82543) {
1093 ret_val = e1000_read_nvm(hw, NVM_INIT_CONTROL2_REG, 1, &data);
1094 ret_val = hw->nvm.ops.read(hw, NVM_INIT_CONTROL2_REG, 1, &data);
1094 if (ret_val) {
1095 DEBUGOUT("NVM Read Error\n");
1096 ret_val = -E1000_ERR_NVM;
1097 goto out;
1098 }
1099 ctrl_ext = ((data & NVM_WORD0F_SWPDIO_EXT_MASK) <<
1100 NVM_SWDPIO_EXT_SHIFT);
1101 E1000_WRITE_REG(hw, E1000_CTRL_EXT, ctrl_ext);

--- 8 unchanged lines hidden (view full) ---

1110/**
1111 * e1000_setup_copper_link_82543 - Configure copper link settings
1112 * @hw: pointer to the HW structure
1113 *
1114 * Configures the link for auto-neg or forced speed and duplex. Then we check
1115 * for link, once link is established calls to configure collision distance
1116 * and flow control are called.
1117 **/
1095 if (ret_val) {
1096 DEBUGOUT("NVM Read Error\n");
1097 ret_val = -E1000_ERR_NVM;
1098 goto out;
1099 }
1100 ctrl_ext = ((data & NVM_WORD0F_SWPDIO_EXT_MASK) <<
1101 NVM_SWDPIO_EXT_SHIFT);
1102 E1000_WRITE_REG(hw, E1000_CTRL_EXT, ctrl_ext);

--- 8 unchanged lines hidden (view full) ---

1111/**
1112 * e1000_setup_copper_link_82543 - Configure copper link settings
1113 * @hw: pointer to the HW structure
1114 *
1115 * Configures the link for auto-neg or forced speed and duplex. Then we check
1116 * for link, once link is established calls to configure collision distance
1117 * and flow control are called.
1118 **/
1118STATIC s32 e1000_setup_copper_link_82543(struct e1000_hw *hw)
1119static s32 e1000_setup_copper_link_82543(struct e1000_hw *hw)
1119{
1120 u32 ctrl;
1121 s32 ret_val;
1122 bool link;
1123
1124 DEBUGFUNC("e1000_setup_copper_link_82543");
1125
1126 ctrl = E1000_READ_REG(hw, E1000_CTRL) | E1000_CTRL_SLU;
1127 /*
1128 * With 82543, we need to force speed and duplex on the MAC
1129 * equal to what the PHY speed and duplex configuration is.
1130 * In addition, we need to perform a hardware reset on the
1131 * PHY to take it out of reset.
1132 */
1133 if (hw->mac.type == e1000_82543) {
1134 ctrl |= (E1000_CTRL_FRCSPD | E1000_CTRL_FRCDPX);
1135 E1000_WRITE_REG(hw, E1000_CTRL, ctrl);
1120{
1121 u32 ctrl;
1122 s32 ret_val;
1123 bool link;
1124
1125 DEBUGFUNC("e1000_setup_copper_link_82543");
1126
1127 ctrl = E1000_READ_REG(hw, E1000_CTRL) | E1000_CTRL_SLU;
1128 /*
1129 * With 82543, we need to force speed and duplex on the MAC
1130 * equal to what the PHY speed and duplex configuration is.
1131 * In addition, we need to perform a hardware reset on the
1132 * PHY to take it out of reset.
1133 */
1134 if (hw->mac.type == e1000_82543) {
1135 ctrl |= (E1000_CTRL_FRCSPD | E1000_CTRL_FRCDPX);
1136 E1000_WRITE_REG(hw, E1000_CTRL, ctrl);
1136 ret_val = e1000_phy_hw_reset(hw);
1137 ret_val = hw->phy.ops.reset(hw);
1137 if (ret_val)
1138 goto out;
1139 hw->phy.reset_disable = FALSE;
1140 } else {
1141 ctrl &= ~(E1000_CTRL_FRCSPD | E1000_CTRL_FRCDPX);
1142 E1000_WRITE_REG(hw, E1000_CTRL, ctrl);
1143 }
1144

--- 56 unchanged lines hidden (view full) ---

1201
1202/**
1203 * e1000_setup_fiber_link_82543 - Setup link for fiber
1204 * @hw: pointer to the HW structure
1205 *
1206 * Configures collision distance and flow control for fiber links. Upon
1207 * successful setup, poll for link.
1208 **/
1138 if (ret_val)
1139 goto out;
1140 hw->phy.reset_disable = FALSE;
1141 } else {
1142 ctrl &= ~(E1000_CTRL_FRCSPD | E1000_CTRL_FRCDPX);
1143 E1000_WRITE_REG(hw, E1000_CTRL, ctrl);
1144 }
1145

--- 56 unchanged lines hidden (view full) ---

1202
1203/**
1204 * e1000_setup_fiber_link_82543 - Setup link for fiber
1205 * @hw: pointer to the HW structure
1206 *
1207 * Configures collision distance and flow control for fiber links. Upon
1208 * successful setup, poll for link.
1209 **/
1209STATIC s32 e1000_setup_fiber_link_82543(struct e1000_hw *hw)
1210static s32 e1000_setup_fiber_link_82543(struct e1000_hw *hw)
1210{
1211 u32 ctrl;
1212 s32 ret_val;
1213
1214 DEBUGFUNC("e1000_setup_fiber_link_82543");
1215
1216 ctrl = E1000_READ_REG(hw, E1000_CTRL);
1217

--- 33 unchanged lines hidden (view full) ---

1251 *
1252 * Checks the phy for link, if link exists, do the following:
1253 * - check for downshift
1254 * - do polarity workaround (if necessary)
1255 * - configure collision distance
1256 * - configure flow control after link up
1257 * - configure tbi compatibility
1258 **/
1211{
1212 u32 ctrl;
1213 s32 ret_val;
1214
1215 DEBUGFUNC("e1000_setup_fiber_link_82543");
1216
1217 ctrl = E1000_READ_REG(hw, E1000_CTRL);
1218

--- 33 unchanged lines hidden (view full) ---

1252 *
1253 * Checks the phy for link, if link exists, do the following:
1254 * - check for downshift
1255 * - do polarity workaround (if necessary)
1256 * - configure collision distance
1257 * - configure flow control after link up
1258 * - configure tbi compatibility
1259 **/
1259STATIC s32 e1000_check_for_copper_link_82543(struct e1000_hw *hw)
1260static s32 e1000_check_for_copper_link_82543(struct e1000_hw *hw)
1260{
1261 struct e1000_mac_info *mac = &hw->mac;
1262 u32 icr, rctl;
1263 s32 ret_val;
1264 u16 speed, duplex;
1265 bool link;
1266
1267 DEBUGFUNC("e1000_check_for_copper_link_82543");

--- 73 unchanged lines hidden (view full) ---

1341 * At this point we know that we are on copper and we have
1342 * auto-negotiated link. These are conditions for checking the link
1343 * partner capability register. We use the link speed to determine if
1344 * TBI compatibility needs to be turned on or off. If the link is not
1345 * at gigabit speed, then TBI compatibility is not needed. If we are
1346 * at gigabit speed, we turn on TBI compatibility.
1347 */
1348 if (e1000_tbi_compatibility_enabled_82543(hw)) {
1261{
1262 struct e1000_mac_info *mac = &hw->mac;
1263 u32 icr, rctl;
1264 s32 ret_val;
1265 u16 speed, duplex;
1266 bool link;
1267
1268 DEBUGFUNC("e1000_check_for_copper_link_82543");

--- 73 unchanged lines hidden (view full) ---

1342 * At this point we know that we are on copper and we have
1343 * auto-negotiated link. These are conditions for checking the link
1344 * partner capability register. We use the link speed to determine if
1345 * TBI compatibility needs to be turned on or off. If the link is not
1346 * at gigabit speed, then TBI compatibility is not needed. If we are
1347 * at gigabit speed, we turn on TBI compatibility.
1348 */
1349 if (e1000_tbi_compatibility_enabled_82543(hw)) {
1349 ret_val = e1000_get_speed_and_duplex(hw, &speed, &duplex);
1350 ret_val = mac->ops.get_link_up_info(hw, &speed, &duplex);
1350 if (ret_val) {
1351 DEBUGOUT("Error getting link speed and duplex\n");
1352 return ret_val;
1353 }
1354 if (speed != SPEED_1000) {
1355 /*
1356 * If link speed is not set to gigabit speed,
1357 * we do not need to enable TBI compatibility.

--- 30 unchanged lines hidden (view full) ---

1388
1389/**
1390 * e1000_check_for_fiber_link_82543 - Check for link (Fiber)
1391 * @hw: pointer to the HW structure
1392 *
1393 * Checks for link up on the hardware. If link is not up and we have
1394 * a signal, then we need to force link up.
1395 **/
1351 if (ret_val) {
1352 DEBUGOUT("Error getting link speed and duplex\n");
1353 return ret_val;
1354 }
1355 if (speed != SPEED_1000) {
1356 /*
1357 * If link speed is not set to gigabit speed,
1358 * we do not need to enable TBI compatibility.

--- 30 unchanged lines hidden (view full) ---

1389
1390/**
1391 * e1000_check_for_fiber_link_82543 - Check for link (Fiber)
1392 * @hw: pointer to the HW structure
1393 *
1394 * Checks for link up on the hardware. If link is not up and we have
1395 * a signal, then we need to force link up.
1396 **/
1396STATIC s32 e1000_check_for_fiber_link_82543(struct e1000_hw *hw)
1397static s32 e1000_check_for_fiber_link_82543(struct e1000_hw *hw)
1397{
1398 struct e1000_mac_info *mac = &hw->mac;
1399 u32 rxcw, ctrl, status;
1400 s32 ret_val = E1000_SUCCESS;
1401
1402 DEBUGFUNC("e1000_check_for_fiber_link_82543");
1403
1404 ctrl = E1000_READ_REG(hw, E1000_CTRL);

--- 56 unchanged lines hidden (view full) ---

1461 * @hw: pointer to the HW structure
1462 *
1463 * For the 82543 silicon, we need to set the MAC to match the settings
1464 * of the PHY, even if the PHY is auto-negotiating.
1465 **/
1466static s32 e1000_config_mac_to_phy_82543(struct e1000_hw *hw)
1467{
1468 u32 ctrl;
1398{
1399 struct e1000_mac_info *mac = &hw->mac;
1400 u32 rxcw, ctrl, status;
1401 s32 ret_val = E1000_SUCCESS;
1402
1403 DEBUGFUNC("e1000_check_for_fiber_link_82543");
1404
1405 ctrl = E1000_READ_REG(hw, E1000_CTRL);

--- 56 unchanged lines hidden (view full) ---

1462 * @hw: pointer to the HW structure
1463 *
1464 * For the 82543 silicon, we need to set the MAC to match the settings
1465 * of the PHY, even if the PHY is auto-negotiating.
1466 **/
1467static s32 e1000_config_mac_to_phy_82543(struct e1000_hw *hw)
1468{
1469 u32 ctrl;
1469 s32 ret_val;
1470 s32 ret_val = E1000_SUCCESS;
1470 u16 phy_data;
1471
1472 DEBUGFUNC("e1000_config_mac_to_phy_82543");
1473
1471 u16 phy_data;
1472
1473 DEBUGFUNC("e1000_config_mac_to_phy_82543");
1474
1475 if (!(hw->phy.ops.read_reg))
1476 goto out;
1477
1474 /* Set the bits to force speed and duplex */
1475 ctrl = E1000_READ_REG(hw, E1000_CTRL);
1476 ctrl |= (E1000_CTRL_FRCSPD | E1000_CTRL_FRCDPX);
1477 ctrl &= ~(E1000_CTRL_SPD_SEL | E1000_CTRL_ILOS);
1478
1479 /*
1480 * Set up duplex in the Device Control and Transmit Control
1481 * registers depending on negotiated values.
1482 */
1478 /* Set the bits to force speed and duplex */
1479 ctrl = E1000_READ_REG(hw, E1000_CTRL);
1480 ctrl |= (E1000_CTRL_FRCSPD | E1000_CTRL_FRCDPX);
1481 ctrl &= ~(E1000_CTRL_SPD_SEL | E1000_CTRL_ILOS);
1482
1483 /*
1484 * Set up duplex in the Device Control and Transmit Control
1485 * registers depending on negotiated values.
1486 */
1483 ret_val = e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_STATUS, &phy_data);
1487 ret_val = hw->phy.ops.read_reg(hw, M88E1000_PHY_SPEC_STATUS, &phy_data);
1484 if (ret_val)
1485 goto out;
1486
1487 ctrl &= ~E1000_CTRL_FD;
1488 if (phy_data & M88E1000_PSSR_DPLX)
1489 ctrl |= E1000_CTRL_FD;
1490
1491 e1000_config_collision_dist_generic(hw);

--- 17 unchanged lines hidden (view full) ---

1509 * e1000_write_vfta_82543 - Write value to VLAN filter table
1510 * @hw: pointer to the HW structure
1511 * @offset: the 32-bit offset in which to write the value to.
1512 * @value: the 32-bit value to write at location offset.
1513 *
1514 * This writes a 32-bit value to a 32-bit offset in the VLAN filter
1515 * table.
1516 **/
1488 if (ret_val)
1489 goto out;
1490
1491 ctrl &= ~E1000_CTRL_FD;
1492 if (phy_data & M88E1000_PSSR_DPLX)
1493 ctrl |= E1000_CTRL_FD;
1494
1495 e1000_config_collision_dist_generic(hw);

--- 17 unchanged lines hidden (view full) ---

1513 * e1000_write_vfta_82543 - Write value to VLAN filter table
1514 * @hw: pointer to the HW structure
1515 * @offset: the 32-bit offset in which to write the value to.
1516 * @value: the 32-bit value to write at location offset.
1517 *
1518 * This writes a 32-bit value to a 32-bit offset in the VLAN filter
1519 * table.
1520 **/
1517STATIC void e1000_write_vfta_82543(struct e1000_hw *hw, u32 offset, u32 value)
1521static void e1000_write_vfta_82543(struct e1000_hw *hw, u32 offset, u32 value)
1518{
1519 u32 temp;
1520
1521 DEBUGFUNC("e1000_write_vfta_82543");
1522
1523 if ((hw->mac.type == e1000_82544) && (offset & 1)) {
1524 temp = E1000_READ_REG_ARRAY(hw, E1000_VFTA, offset - 1);
1525 E1000_WRITE_REG_ARRAY(hw, E1000_VFTA, offset, value);

--- 10 unchanged lines hidden (view full) ---

1536 * @hw: pointer to the HW structure
1537 * @hash_value: determines the MTA register and bit to set
1538 *
1539 * The multicast table address is a register array of 32-bit registers.
1540 * The hash_value is used to determine what register the bit is in, the
1541 * current value is read, the new bit is OR'd in and the new value is
1542 * written back into the register.
1543 **/
1522{
1523 u32 temp;
1524
1525 DEBUGFUNC("e1000_write_vfta_82543");
1526
1527 if ((hw->mac.type == e1000_82544) && (offset & 1)) {
1528 temp = E1000_READ_REG_ARRAY(hw, E1000_VFTA, offset - 1);
1529 E1000_WRITE_REG_ARRAY(hw, E1000_VFTA, offset, value);

--- 10 unchanged lines hidden (view full) ---

1540 * @hw: pointer to the HW structure
1541 * @hash_value: determines the MTA register and bit to set
1542 *
1543 * The multicast table address is a register array of 32-bit registers.
1544 * The hash_value is used to determine what register the bit is in, the
1545 * current value is read, the new bit is OR'd in and the new value is
1546 * written back into the register.
1547 **/
1544STATIC void e1000_mta_set_82543(struct e1000_hw *hw, u32 hash_value)
1548static void e1000_mta_set_82543(struct e1000_hw *hw, u32 hash_value)
1545{
1546 u32 hash_bit, hash_reg, mta, temp;
1547
1548 DEBUGFUNC("e1000_mta_set_82543");
1549
1550 hash_reg = (hash_value >> 5);
1551
1552 /*

--- 19 unchanged lines hidden (view full) ---

1572
1573/**
1574 * e1000_led_on_82543 - Turn on SW controllable LED
1575 * @hw: pointer to the HW structure
1576 *
1577 * Turns the SW defined LED on. This is a function pointer entry point
1578 * called by the api module.
1579 **/
1549{
1550 u32 hash_bit, hash_reg, mta, temp;
1551
1552 DEBUGFUNC("e1000_mta_set_82543");
1553
1554 hash_reg = (hash_value >> 5);
1555
1556 /*

--- 19 unchanged lines hidden (view full) ---

1576
1577/**
1578 * e1000_led_on_82543 - Turn on SW controllable LED
1579 * @hw: pointer to the HW structure
1580 *
1581 * Turns the SW defined LED on. This is a function pointer entry point
1582 * called by the api module.
1583 **/
1580STATIC s32 e1000_led_on_82543(struct e1000_hw *hw)
1584static s32 e1000_led_on_82543(struct e1000_hw *hw)
1581{
1582 u32 ctrl = E1000_READ_REG(hw, E1000_CTRL);
1583
1584 DEBUGFUNC("e1000_led_on_82543");
1585
1586 if (hw->mac.type == e1000_82544 &&
1587 hw->phy.media_type == e1000_media_type_copper) {
1588 /* Clear SW-definable Pin 0 to turn on the LED */

--- 11 unchanged lines hidden (view full) ---

1600
1601/**
1602 * e1000_led_off_82543 - Turn off SW controllable LED
1603 * @hw: pointer to the HW structure
1604 *
1605 * Turns the SW defined LED off. This is a function pointer entry point
1606 * called by the api module.
1607 **/
1585{
1586 u32 ctrl = E1000_READ_REG(hw, E1000_CTRL);
1587
1588 DEBUGFUNC("e1000_led_on_82543");
1589
1590 if (hw->mac.type == e1000_82544 &&
1591 hw->phy.media_type == e1000_media_type_copper) {
1592 /* Clear SW-definable Pin 0 to turn on the LED */

--- 11 unchanged lines hidden (view full) ---

1604
1605/**
1606 * e1000_led_off_82543 - Turn off SW controllable LED
1607 * @hw: pointer to the HW structure
1608 *
1609 * Turns the SW defined LED off. This is a function pointer entry point
1610 * called by the api module.
1611 **/
1608STATIC s32 e1000_led_off_82543(struct e1000_hw *hw)
1612static s32 e1000_led_off_82543(struct e1000_hw *hw)
1609{
1610 u32 ctrl = E1000_READ_REG(hw, E1000_CTRL);
1611
1612 DEBUGFUNC("e1000_led_off_82543");
1613
1614 if (hw->mac.type == e1000_82544 &&
1615 hw->phy.media_type == e1000_media_type_copper) {
1616 /* Set SW-definable Pin 0 to turn off the LED */

--- 9 unchanged lines hidden (view full) ---

1626}
1627
1628/**
1629 * e1000_clear_hw_cntrs_82543 - Clear device specific hardware counters
1630 * @hw: pointer to the HW structure
1631 *
1632 * Clears the hardware counters by reading the counter registers.
1633 **/
1613{
1614 u32 ctrl = E1000_READ_REG(hw, E1000_CTRL);
1615
1616 DEBUGFUNC("e1000_led_off_82543");
1617
1618 if (hw->mac.type == e1000_82544 &&
1619 hw->phy.media_type == e1000_media_type_copper) {
1620 /* Set SW-definable Pin 0 to turn off the LED */

--- 9 unchanged lines hidden (view full) ---

1630}
1631
1632/**
1633 * e1000_clear_hw_cntrs_82543 - Clear device specific hardware counters
1634 * @hw: pointer to the HW structure
1635 *
1636 * Clears the hardware counters by reading the counter registers.
1637 **/
1634STATIC void e1000_clear_hw_cntrs_82543(struct e1000_hw *hw)
1638static void e1000_clear_hw_cntrs_82543(struct e1000_hw *hw)
1635{
1636 volatile u32 temp;
1637
1638 DEBUGFUNC("e1000_clear_hw_cntrs_82543");
1639
1640 e1000_clear_hw_cntrs_base_generic(hw);
1641
1642 temp = E1000_READ_REG(hw, E1000_PRC64);

--- 19 unchanged lines hidden --- 		1639{
1640 volatile u32 temp;
1641
1642 DEBUGFUNC("e1000_clear_hw_cntrs_82543");
1643
1644 e1000_clear_hw_cntrs_base_generic(hw);
1645
1646 temp = E1000_READ_REG(hw, E1000_PRC64);

--- 19 unchanged lines hidden ---