X86InstrFPStack.td (210299) | X86InstrFPStack.td (212904) |
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1//==- X86InstrFPStack.td - Describe the X86 Instruction Set --*- tablegen -*-=// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// --- 94 unchanged lines hidden (view full) --- 103 "##FP80_TO_INT32_IN_MEM PSEUDO!", 104 [(X86fp_to_i32mem RFP80:$src, addr:$dst)]>; 105 def FP80_TO_INT64_IN_MEM : I<0, Pseudo, 106 (outs), (ins i64mem:$dst, RFP80:$src), 107 "##FP80_TO_INT64_IN_MEM PSEUDO!", 108 [(X86fp_to_i64mem RFP80:$src, addr:$dst)]>; 109} 110 | 1//==- X86InstrFPStack.td - Describe the X86 Instruction Set --*- tablegen -*-=// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// --- 94 unchanged lines hidden (view full) --- 103 "##FP80_TO_INT32_IN_MEM PSEUDO!", 104 [(X86fp_to_i32mem RFP80:$src, addr:$dst)]>; 105 def FP80_TO_INT64_IN_MEM : I<0, Pseudo, 106 (outs), (ins i64mem:$dst, RFP80:$src), 107 "##FP80_TO_INT64_IN_MEM PSEUDO!", 108 [(X86fp_to_i64mem RFP80:$src, addr:$dst)]>; 109} 110 |
111let isTerminator = 1 in 112 let Defs = [FP0, FP1, FP2, FP3, FP4, FP5, FP6] in 113 def FP_REG_KILL : I<0, Pseudo, (outs), (ins), "##FP_REG_KILL", []>; 114 | |
115// All FP Stack operations are represented with four instructions here. The 116// first three instructions, generated by the instruction selector, use "RFP32" 117// "RFP64" or "RFP80" registers: traditional register files to reference 32-bit, 118// 64-bit or 80-bit floating point values. These sizes apply to the values, 119// not the registers, which are always 80 bits; RFP32, RFP64 and RFP80 can be 120// copied to each other without losing information. These instructions are all 121// pseudo instructions and use the "_Fp" suffix. 122// In some cases there are additional variants with a mixture of different --- 29 unchanged lines hidden (view full) --- 152} 153 154let Defs = [ST1] in { 155def FpSET_ST1_32 : FpI_<(outs), (ins RFP32:$src), SpecialFP, []>; // ST(1) = FPR 156def FpSET_ST1_64 : FpI_<(outs), (ins RFP64:$src), SpecialFP, []>; // ST(1) = FPR 157def FpSET_ST1_80 : FpI_<(outs), (ins RFP80:$src), SpecialFP, []>; // ST(1) = FPR 158} 159 | 111// All FP Stack operations are represented with four instructions here. The 112// first three instructions, generated by the instruction selector, use "RFP32" 113// "RFP64" or "RFP80" registers: traditional register files to reference 32-bit, 114// 64-bit or 80-bit floating point values. These sizes apply to the values, 115// not the registers, which are always 80 bits; RFP32, RFP64 and RFP80 can be 116// copied to each other without losing information. These instructions are all 117// pseudo instructions and use the "_Fp" suffix. 118// In some cases there are additional variants with a mixture of different --- 29 unchanged lines hidden (view full) --- 148} 149 150let Defs = [ST1] in { 151def FpSET_ST1_32 : FpI_<(outs), (ins RFP32:$src), SpecialFP, []>; // ST(1) = FPR 152def FpSET_ST1_64 : FpI_<(outs), (ins RFP64:$src), SpecialFP, []>; // ST(1) = FPR 153def FpSET_ST1_80 : FpI_<(outs), (ins RFP80:$src), SpecialFP, []>; // ST(1) = FPR 154} 155 |
160// FpIf32, FpIf64 - Floating Point Psuedo Instruction template. | 156// FpIf32, FpIf64 - Floating Point Pseudo Instruction template. |
161// f32 instructions can use SSE1 and are predicated on FPStackf32 == !SSE1. 162// f64 instructions can use SSE2 and are predicated on FPStackf64 == !SSE2. 163// f80 instructions cannot use SSE and use neither of these. 164class FpIf32<dag outs, dag ins, FPFormat fp, list<dag> pattern> : 165 FpI_<outs, ins, fp, pattern>, Requires<[FPStackf32]>; 166class FpIf64<dag outs, dag ins, FPFormat fp, list<dag> pattern> : 167 FpI_<outs, ins, fp, pattern>, Requires<[FPStackf64]>; 168 --- 530 unchanged lines hidden --- | 157// f32 instructions can use SSE1 and are predicated on FPStackf32 == !SSE1. 158// f64 instructions can use SSE2 and are predicated on FPStackf64 == !SSE2. 159// f80 instructions cannot use SSE and use neither of these. 160class FpIf32<dag outs, dag ins, FPFormat fp, list<dag> pattern> : 161 FpI_<outs, ins, fp, pattern>, Requires<[FPStackf32]>; 162class FpIf64<dag outs, dag ins, FPFormat fp, list<dag> pattern> : 163 FpI_<outs, ins, fp, pattern>, Requires<[FPStackf64]>; 164 --- 530 unchanged lines hidden --- |