Deleted Added
full compact
200,201d199
< static rtx reg_set_between_after_reload_p (rtx, rtx, rtx);
< static rtx reg_used_between_after_reload_p (rtx, rtx, rtx);
472a471,472
> /* Return true if register X is recorded as being set by an instruction
> whose CUID is greater than the one given. */
473a474,487
> static bool
> reg_changed_after_insn_p (rtx x, int cuid)
> {
> unsigned int regno, end_regno;
>
> regno = REGNO (x);
> end_regno = END_HARD_REGNO (x);
> do
> if (reg_avail_info[regno] > cuid)
> return true;
> while (++regno < end_regno);
> return false;
> }
>
496,498c510
< /* If the last CUID setting the insn is less than the CUID of
< INSN, then reg X is not changed in or after INSN. */
< return reg_avail_info[REGNO (x)] < INSN_CUID (insn);
---
> return !reg_changed_after_insn_p (x, INSN_CUID (insn) - 1);
500,503c512
< /* Reg X is not set before INSN in the current basic block if
< we have not yet recorded the CUID of an insn that touches
< the reg. */
< return reg_avail_info[REGNO (x)] == 0;
---
> return !reg_changed_after_insn_p (x, 0);
720c729,730
< unsigned int regno;
---
> unsigned int regno, end_regno;
> rtx link, x;
725a736,750
> for (link = CALL_INSN_FUNCTION_USAGE (insn); link; link = XEXP (link, 1))
> if (GET_CODE (XEXP (link, 0)) == CLOBBER)
> {
> x = XEXP (XEXP (link, 0), 0);
> if (REG_P (x))
> {
> gcc_assert (HARD_REGISTER_P (x));
> regno = REGNO (x);
> end_regno = END_HARD_REGNO (x);
> do
> record_last_reg_set_info (insn, regno);
> while (++regno < end_regno);
> }
> }
>
859,948d883
<
< /* Return the insn that sets register REG or clobbers it in between
< FROM_INSN and TO_INSN (exclusive of those two).
< Just like reg_set_between but for hard registers and not pseudos. */
<
< static rtx
< reg_set_between_after_reload_p (rtx reg, rtx from_insn, rtx to_insn)
< {
< rtx insn;
<
< /* We are called after register allocation. */
< gcc_assert (REG_P (reg) && REGNO (reg) < FIRST_PSEUDO_REGISTER);
<
< if (from_insn == to_insn)
< return NULL_RTX;
<
< for (insn = NEXT_INSN (from_insn);
< insn != to_insn;
< insn = NEXT_INSN (insn))
< if (INSN_P (insn))
< {
< if (set_of (reg, insn) != NULL_RTX)
< return insn;
< if ((CALL_P (insn)
< && call_used_regs[REGNO (reg)])
< || find_reg_fusage (insn, CLOBBER, reg))
< return insn;
<
< if (FIND_REG_INC_NOTE (insn, reg))
< return insn;
< }
<
< return NULL_RTX;
< }
<
< /* Return the insn that uses register REG in between FROM_INSN and TO_INSN
< (exclusive of those two). Similar to reg_used_between but for hard
< registers and not pseudos. */
<
< static rtx
< reg_used_between_after_reload_p (rtx reg, rtx from_insn, rtx to_insn)
< {
< rtx insn;
<
< /* We are called after register allocation. */
< gcc_assert (REG_P (reg) && REGNO (reg) < FIRST_PSEUDO_REGISTER);
<
< if (from_insn == to_insn)
< return NULL_RTX;
<
< for (insn = NEXT_INSN (from_insn);
< insn != to_insn;
< insn = NEXT_INSN (insn))
< if (INSN_P (insn))
< {
< if (reg_overlap_mentioned_p (reg, PATTERN (insn))
< || (CALL_P (insn)
< && call_used_regs[REGNO (reg)])
< || find_reg_fusage (insn, USE, reg)
< || find_reg_fusage (insn, CLOBBER, reg))
< return insn;
<
< if (FIND_REG_INC_NOTE (insn, reg))
< return insn;
< }
<
< return NULL_RTX;
< }
<
< /* Return true if REG is used, set, or killed between the beginning of
< basic block BB and UP_TO_INSN. Caches the result in reg_avail_info. */
<
< static bool
< reg_set_or_used_since_bb_start (rtx reg, basic_block bb, rtx up_to_insn)
< {
< rtx insn, start = PREV_INSN (BB_HEAD (bb));
<
< if (reg_avail_info[REGNO (reg)] != 0)
< return true;
<
< insn = reg_used_between_after_reload_p (reg, start, up_to_insn);
< if (! insn)
< insn = reg_set_between_after_reload_p (reg, start, up_to_insn);
<
< if (insn)
< reg_avail_info[REGNO (reg)] = INSN_CUID (insn);
<
< return insn != NULL_RTX;
< }
<
1040c975,976
< if (reg_set_or_used_since_bb_start (dest, bb, insn))
---
> if (reg_changed_after_insn_p (dest, 0)
> || reg_used_between_p (dest, PREV_INSN (BB_HEAD (bb)), insn))
1071,1072c1007
< if (! reg_set_between_after_reload_p (avail_reg, avail_insn,
< next_pred_bb_end))
---
> if (!reg_set_between_p (avail_reg, avail_insn, next_pred_bb_end))