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i2c.8 (187712) i2c.8 (198788)
1.\"
2.\" Copyright (C) 2008-2009 Semihalf, Michal Hajduk and Bartlomiej Sieka
3.\" All rights reserved.
4.\"
5.\" Redistribution and use in source and binary forms, with or without
6.\" modification, are permitted provided that the following conditions
7.\" are met:
8.\" 1. Redistributions of source code must retain the above copyright

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18.\" FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19.\" DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20.\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21.\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22.\" LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23.\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24.\" SUCH DAMAGE.
25.\"
1.\"
2.\" Copyright (C) 2008-2009 Semihalf, Michal Hajduk and Bartlomiej Sieka
3.\" All rights reserved.
4.\"
5.\" Redistribution and use in source and binary forms, with or without
6.\" modification, are permitted provided that the following conditions
7.\" are met:
8.\" 1. Redistributions of source code must retain the above copyright

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18.\" FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19.\" DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20.\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21.\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22.\" LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23.\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24.\" SUCH DAMAGE.
25.\"
26.\" $FreeBSD: head/usr.sbin/i2c/i2c.8 187712 2009-01-26 14:00:50Z raj $
26.\" $FreeBSD: head/usr.sbin/i2c/i2c.8 198788 2009-11-02 12:35:38Z brueffer $
27.\"
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27.\"
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29.Dd Jan 23, 2009
29.Dd January 23, 2009
30.Dt I2C 8
31.Os
32.Sh NAME
33.Nm i2c
34.Nd test I2C bus and slave devices
35.Sh SYNOPSIS
36.Nm
37.Cm -a Ar address

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30.Dt I2C 8
31.Os
32.Sh NAME
33.Nm i2c
34.Nd test I2C bus and slave devices
35.Sh SYNOPSIS
36.Nm
37.Cm -a Ar address

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