intr_machdep.c (234989) | intr_machdep.c (241371) |
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1/*- 2 * Copyright (c) 2003 John Baldwin <jhb@FreeBSD.org> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 12 unchanged lines hidden (view full) --- 21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 27 * SUCH DAMAGE. 28 * | 1/*- 2 * Copyright (c) 2003 John Baldwin <jhb@FreeBSD.org> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 12 unchanged lines hidden (view full) --- 21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 27 * SUCH DAMAGE. 28 * |
29 * $FreeBSD: head/sys/x86/x86/intr_machdep.c 234989 2012-05-03 21:44:01Z attilio $ | 29 * $FreeBSD: head/sys/x86/x86/intr_machdep.c 241371 2012-10-09 12:22:43Z attilio $ |
30 */ 31 32/* 33 * Machine dependent interrupt code for x86. For x86, we have to 34 * deal with different PICs. Thus, we use the passed in vector to lookup 35 * an interrupt source associated with that vector. The interrupt source 36 * describes which PIC the source belongs to and includes methods to handle 37 * that source. --- 409 unchanged lines hidden (view full) --- 447#endif 448 449#ifdef SMP 450/* 451 * Support for balancing interrupt sources across CPUs. For now we just 452 * allocate CPUs round-robin. 453 */ 454 | 30 */ 31 32/* 33 * Machine dependent interrupt code for x86. For x86, we have to 34 * deal with different PICs. Thus, we use the passed in vector to lookup 35 * an interrupt source associated with that vector. The interrupt source 36 * describes which PIC the source belongs to and includes methods to handle 37 * that source. --- 409 unchanged lines hidden (view full) --- 447#endif 448 449#ifdef SMP 450/* 451 * Support for balancing interrupt sources across CPUs. For now we just 452 * allocate CPUs round-robin. 453 */ 454 |
455static cpuset_t intr_cpus; | 455static cpuset_t intr_cpus = CPUSET_T_INITIALIZER(0x1); |
456static int current_cpu; 457 458/* 459 * Return the CPU that the next interrupt source should use. For now 460 * this just returns the next local APIC according to round-robin. 461 */ 462u_int 463intr_next_cpu(void) --- 96 unchanged lines hidden (view full) --- 560 * Always route interrupts to the current processor in the UP case. 561 */ 562u_int 563intr_next_cpu(void) 564{ 565 566 return (PCPU_GET(apic_id)); 567} | 456static int current_cpu; 457 458/* 459 * Return the CPU that the next interrupt source should use. For now 460 * this just returns the next local APIC according to round-robin. 461 */ 462u_int 463intr_next_cpu(void) --- 96 unchanged lines hidden (view full) --- 560 * Always route interrupts to the current processor in the UP case. 561 */ 562u_int 563intr_next_cpu(void) 564{ 565 566 return (PCPU_GET(apic_id)); 567} |
568 569/* Use an empty stub for compatibility. */ 570void 571intr_add_cpu(u_int cpu __unused) 572{ 573 574} | |
575#endif | 568#endif |