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specialreg.h (205448) specialreg.h (205573)
1/*-
2 * Copyright (c) 1991 The Regents of the University of California.
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

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22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27 * SUCH DAMAGE.
28 *
29 * from: @(#)specialreg.h 7.1 (Berkeley) 5/9/91
1/*-
2 * Copyright (c) 1991 The Regents of the University of California.
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

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22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27 * SUCH DAMAGE.
28 *
29 * from: @(#)specialreg.h 7.1 (Berkeley) 5/9/91
30 * $FreeBSD: head/sys/i386/include/specialreg.h 205448 2010-03-22 15:08:26Z jhb $
30 * $FreeBSD: head/sys/i386/include/specialreg.h 205573 2010-03-24 03:07:35Z alc $
31 */
32
33#ifndef _MACHINE_SPECIALREG_H_
34#define _MACHINE_SPECIALREG_H_
35
36/*
37 * Bits in 386 special registers:
38 */

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546/* AMD Write Allocate Top-Of-Memory and Control Register */
547#define AMD_WT_ALLOC_TME 0x40000 /* top-of-memory enable */
548#define AMD_WT_ALLOC_PRE 0x20000 /* programmable range enable */
549#define AMD_WT_ALLOC_FRE 0x10000 /* fixed (A0000-FFFFF) range enable */
550
551/* AMD64 MSR's */
552#define MSR_EFER 0xc0000080 /* extended features */
553#define MSR_K8_UCODE_UPDATE 0xc0010020 /* update microcode */
31 */
32
33#ifndef _MACHINE_SPECIALREG_H_
34#define _MACHINE_SPECIALREG_H_
35
36/*
37 * Bits in 386 special registers:
38 */

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546/* AMD Write Allocate Top-Of-Memory and Control Register */
547#define AMD_WT_ALLOC_TME 0x40000 /* top-of-memory enable */
548#define AMD_WT_ALLOC_PRE 0x20000 /* programmable range enable */
549#define AMD_WT_ALLOC_FRE 0x10000 /* fixed (A0000-FFFFF) range enable */
550
551/* AMD64 MSR's */
552#define MSR_EFER 0xc0000080 /* extended features */
553#define MSR_K8_UCODE_UPDATE 0xc0010020 /* update microcode */
554#define MSR_MC0_CTL_MASK 0xc0010044
554
555/* VIA ACE crypto featureset: for via_feature_rng */
556#define VIA_HAS_RNG 1 /* cpu has RNG */
557
558/* VIA ACE crypto featureset: for via_feature_xcrypt */
559#define VIA_HAS_AES 1 /* cpu has AES */
560#define VIA_HAS_SHA 2 /* cpu has SHA1 & SHA256 */
561#define VIA_HAS_MM 4 /* cpu has RSA instructions */

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555
556/* VIA ACE crypto featureset: for via_feature_rng */
557#define VIA_HAS_RNG 1 /* cpu has RNG */
558
559/* VIA ACE crypto featureset: for via_feature_xcrypt */
560#define VIA_HAS_AES 1 /* cpu has AES */
561#define VIA_HAS_SHA 2 /* cpu has SHA1 & SHA256 */
562#define VIA_HAS_MM 4 /* cpu has RSA instructions */

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