1/*- 2 * Copyright (c) 2004 Colin Percival 3 * Copyright (c) 2005 Nate Lawson 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted providing that the following conditions 8 * are met: --- 12 unchanged lines hidden (view full) --- 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 23 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING 24 * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 25 * POSSIBILITY OF SUCH DAMAGE. 26 */ 27 28#include <sys/cdefs.h> |
29__FBSDID("$FreeBSD: head/sys/i386/cpufreq/est.c 185341 2008-11-26 19:25:13Z jkim $"); |
30 31#include <sys/param.h> 32#include <sys/bus.h> 33#include <sys/cpu.h> 34#include <sys/kernel.h> 35#include <sys/malloc.h> 36#include <sys/module.h> 37#include <sys/smp.h> 38#include <sys/systm.h> 39 40#include "cpufreq_if.h" 41#include <machine/clock.h> |
42#include <machine/cputypes.h> |
43#include <machine/md_var.h> 44#include <machine/specialreg.h> 45 46#include <contrib/dev/acpica/acpi.h> 47#include <dev/acpica/acpivar.h> 48#include "acpi_if.h" 49 50/* Status/control registers (from the IA-32 System Programming Guide). */ 51#define MSR_PERF_STATUS 0x198 52#define MSR_PERF_CTL 0x199 53 54/* Register and bit for enabling SpeedStep. */ 55#define MSR_MISC_ENABLE 0x1a0 56#define MSR_SS_ENABLE (1<<16) 57 |
58#ifndef CPU_VENDOR_CENTAUR 59#define CPU_VENDOR_CENTAUR 0x111d 60#endif 61 |
62/* Frequency and MSR control values. */ 63typedef struct { 64 uint16_t freq; 65 uint16_t volts; 66 uint16_t id16; 67 int power; 68} freq_info; 69 70/* Identifying characteristics of a processor and supported frequencies. */ 71typedef struct { |
72 const u_int vendor_id; |
73 uint32_t id32; 74 freq_info *freqtab; 75} cpu_info; 76 77struct est_softc { 78 device_t dev; 79 int acpi_settings; 80 int msr_settings; --- 7 unchanged lines hidden (view full) --- 88 ((ID16(MHz_lo, mV_lo, bus_clk) << 16) | (ID16(MHz_hi, mV_hi, bus_clk))) 89 90/* Format for storing IDs in our table. */ 91#define FREQ_INFO_PWR(MHz, mV, bus_clk, mW) \ 92 { MHz, mV, ID16(MHz, mV, bus_clk), mW } 93#define FREQ_INFO(MHz, mV, bus_clk) \ 94 FREQ_INFO_PWR(MHz, mV, bus_clk, CPUFREQ_VAL_UNKNOWN) 95#define INTEL(tab, zhi, vhi, zlo, vlo, bus_clk) \ |
96 { CPU_VENDOR_INTEL, ID32(zhi, vhi, zlo, vlo, bus_clk), tab } |
97#define CENTAUR(tab, zhi, vhi, zlo, vlo, bus_clk) \ |
98 { CPU_VENDOR_CENTAUR, ID32(zhi, vhi, zlo, vlo, bus_clk), tab } |
99 |
100static int msr_info_enabled = 0; 101TUNABLE_INT("hw.est.msr_info", &msr_info_enabled); 102 103/* Default bus clock value for Centrino processors. */ 104#define INTEL_BUS_CLK 100 105 106/* XXX Update this if new CPUs have more settings. */ 107#define EST_MAX_SETTINGS 10 --- 781 unchanged lines hidden (view full) --- 889 CENTAUR(C7M_765, 1600, 1084, 533, 844, 133), 890 CENTAUR(C7M_764, 1600, 1084, 400, 844, 100), 891 CENTAUR(C7M_754, 1500, 1004, 400, 844, 100), 892 CENTAUR(C7M_775_ULV, 1500, 956, 400, 796, 100), 893 CENTAUR(C7M_771, 1200, 860, 400, 844, 100), 894 CENTAUR(C7M_772_ULV, 1200, 844, 400, 796, 100), 895 CENTAUR(C7M_779_ULV, 1000, 796, 400, 796, 100), 896 CENTAUR(C7M_770_ULV, 1000, 844, 400, 796, 100), |
897 { 0, 0, NULL }, |
898}; 899 900static void est_identify(driver_t *driver, device_t parent); 901static int est_features(driver_t *driver, u_int *features); 902static int est_probe(device_t parent); 903static int est_attach(device_t parent); 904static int est_detach(device_t parent); 905static int est_get_info(device_t dev); --- 50 unchanged lines hidden (view full) --- 956{ 957 device_t child; 958 959 /* Make sure we're not being doubly invoked. */ 960 if (device_find_child(parent, "est", -1) != NULL) 961 return; 962 963 /* Check that CPUID is supported and the vendor is Intel.*/ |
964 if (cpu_high == 0 || (cpu_vendor_id != CPU_VENDOR_INTEL && 965 cpu_vendor_id != CPU_VENDOR_CENTAUR)) |
966 return; 967 968 /* 969 * Check if the CPU supports EST. 970 */ 971 if (!(cpu_feature2 & CPUID2_EST)) 972 return; 973 --- 183 unchanged lines hidden (view full) --- 1157est_table_info(device_t dev, uint64_t msr, freq_info **freqs) 1158{ 1159 cpu_info *p; 1160 uint32_t id; 1161 1162 /* Find a table which matches (vendor, id32). */ 1163 id = msr >> 32; 1164 for (p = ESTprocs; p->id32 != 0; p++) { |
1165 if (p->vendor_id == cpu_vendor_id && p->id32 == id) |
1166 break; 1167 } 1168 if (p->id32 == 0) 1169 return (EOPNOTSUPP); 1170 1171 /* Make sure the current setpoint is valid. */ 1172 if (est_get_current(p->freqtab) == NULL) { 1173 device_printf(dev, "current setting not found in table\n"); --- 222 unchanged lines hidden --- |