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apb.c (225931) apb.c (227848)
1/*-
2 * Copyright (c) 1994,1995 Stefan Esser, Wolfgang StanglMeier
3 * Copyright (c) 2000 Michael Smith <msmith@freebsd.org>
4 * Copyright (c) 2000 BSDi
5 * Copyright (c) 2001, 2003 Thomas Moestl <tmm@FreeBSD.org>
6 * All rights reserved.
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 * 3. The name of the author may not be used to endorse or promote products
17 * derived from this software without specific prior written permission.
18 *
19 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
23 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
24 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
25 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
26 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
27 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
28 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
29 * SUCH DAMAGE.
30 *
31 * from: FreeBSD: src/sys/dev/pci/pci_pci.c,v 1.3 2000/12/13
32 */
33
34#include <sys/cdefs.h>
1/*-
2 * Copyright (c) 1994,1995 Stefan Esser, Wolfgang StanglMeier
3 * Copyright (c) 2000 Michael Smith <msmith@freebsd.org>
4 * Copyright (c) 2000 BSDi
5 * Copyright (c) 2001, 2003 Thomas Moestl <tmm@FreeBSD.org>
6 * All rights reserved.
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 * 3. The name of the author may not be used to endorse or promote products
17 * derived from this software without specific prior written permission.
18 *
19 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
23 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
24 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
25 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
26 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
27 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
28 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
29 * SUCH DAMAGE.
30 *
31 * from: FreeBSD: src/sys/dev/pci/pci_pci.c,v 1.3 2000/12/13
32 */
33
34#include <sys/cdefs.h>
35__FBSDID("$FreeBSD: head/sys/sparc64/pci/apb.c 225931 2011-10-02 23:22:38Z marius $");
35__FBSDID("$FreeBSD: head/sys/sparc64/pci/apb.c 227848 2011-11-22 21:55:40Z marius $");
36
37/*
38 * Support for the Sun APB (Advanced PCI Bridge) PCI-PCI bridge.
39 * This bridge does not fully comply to the PCI bridge specification, and is
40 * therefore not supported by the generic driver.
41 * We can use some of the pcib methods anyway.
42 */
43
44#include "opt_ofw_pci.h"
45
46#include <sys/param.h>
47#include <sys/systm.h>
48#include <sys/kernel.h>
49#include <sys/module.h>
50#include <sys/bus.h>
51#include <sys/rman.h>
52#include <sys/sysctl.h>
53
54#include <dev/ofw/ofw_bus.h>
55#include <dev/ofw/openfirm.h>
56
57#include <machine/bus.h>
58#include <machine/resource.h>
59
60#include <dev/pci/pcireg.h>
61#include <dev/pci/pcivar.h>
62#include <dev/pci/pcib_private.h>
63
64#include "pcib_if.h"
65
66#include <sparc64/pci/ofw_pci.h>
67#include <sparc64/pci/ofw_pcib_subr.h>
68
69/*
70 * Bridge-specific data.
71 */
72struct apb_softc {
73 struct ofw_pcib_gen_softc sc_bsc;
74 uint8_t sc_iomap;
75 uint8_t sc_memmap;
76};
77
78static device_probe_t apb_probe;
79static device_attach_t apb_attach;
80static bus_alloc_resource_t apb_alloc_resource;
81static bus_adjust_resource_t apb_adjust_resource;
82
83static device_method_t apb_methods[] = {
84 /* Device interface */
85 DEVMETHOD(device_probe, apb_probe),
86 DEVMETHOD(device_attach, apb_attach),
87
88 /* Bus interface */
89 DEVMETHOD(bus_alloc_resource, apb_alloc_resource),
90 DEVMETHOD(bus_adjust_resource, apb_adjust_resource),
91 DEVMETHOD(bus_release_resource, bus_generic_release_resource),
92
93 /* pcib interface */
94 DEVMETHOD(pcib_route_interrupt, ofw_pcib_gen_route_interrupt),
95
96 /* ofw_bus interface */
97 DEVMETHOD(ofw_bus_get_node, ofw_pcib_gen_get_node),
98
36
37/*
38 * Support for the Sun APB (Advanced PCI Bridge) PCI-PCI bridge.
39 * This bridge does not fully comply to the PCI bridge specification, and is
40 * therefore not supported by the generic driver.
41 * We can use some of the pcib methods anyway.
42 */
43
44#include "opt_ofw_pci.h"
45
46#include <sys/param.h>
47#include <sys/systm.h>
48#include <sys/kernel.h>
49#include <sys/module.h>
50#include <sys/bus.h>
51#include <sys/rman.h>
52#include <sys/sysctl.h>
53
54#include <dev/ofw/ofw_bus.h>
55#include <dev/ofw/openfirm.h>
56
57#include <machine/bus.h>
58#include <machine/resource.h>
59
60#include <dev/pci/pcireg.h>
61#include <dev/pci/pcivar.h>
62#include <dev/pci/pcib_private.h>
63
64#include "pcib_if.h"
65
66#include <sparc64/pci/ofw_pci.h>
67#include <sparc64/pci/ofw_pcib_subr.h>
68
69/*
70 * Bridge-specific data.
71 */
72struct apb_softc {
73 struct ofw_pcib_gen_softc sc_bsc;
74 uint8_t sc_iomap;
75 uint8_t sc_memmap;
76};
77
78static device_probe_t apb_probe;
79static device_attach_t apb_attach;
80static bus_alloc_resource_t apb_alloc_resource;
81static bus_adjust_resource_t apb_adjust_resource;
82
83static device_method_t apb_methods[] = {
84 /* Device interface */
85 DEVMETHOD(device_probe, apb_probe),
86 DEVMETHOD(device_attach, apb_attach),
87
88 /* Bus interface */
89 DEVMETHOD(bus_alloc_resource, apb_alloc_resource),
90 DEVMETHOD(bus_adjust_resource, apb_adjust_resource),
91 DEVMETHOD(bus_release_resource, bus_generic_release_resource),
92
93 /* pcib interface */
94 DEVMETHOD(pcib_route_interrupt, ofw_pcib_gen_route_interrupt),
95
96 /* ofw_bus interface */
97 DEVMETHOD(ofw_bus_get_node, ofw_pcib_gen_get_node),
98
99 KOBJMETHOD_END
99 DEVMETHOD_END
100};
101
102static devclass_t pcib_devclass;
103
104DEFINE_CLASS_1(pcib, apb_driver, apb_methods, sizeof(struct apb_softc),
105 pcib_driver);
106EARLY_DRIVER_MODULE(apb, pci, apb_driver, pcib_devclass, 0, 0, BUS_PASS_BUS);
107MODULE_DEPEND(apb, pci, 1, 1, 1);
108
109/* APB specific registers */
110#define APBR_IOMAP 0xde
111#define APBR_MEMMAP 0xdf
112
113/* Definitions for the mapping registers */
114#define APB_IO_SCALE 0x200000
115#define APB_MEM_SCALE 0x20000000
116
117/*
118 * Generic device interface
119 */
120static int
121apb_probe(device_t dev)
122{
123
124 if (pci_get_vendor(dev) == 0x108e && /* Sun */
125 pci_get_device(dev) == 0x5000) { /* APB */
126 device_set_desc(dev, "APB PCI-PCI bridge");
127 return (0);
128 }
129 return (ENXIO);
130}
131
132static void
133apb_map_print(uint8_t map, u_long scale)
134{
135 int i, first;
136
137 for (first = 1, i = 0; i < 8; i++) {
138 if ((map & (1 << i)) != 0) {
139 printf("%s0x%lx-0x%lx", first ? "" : ", ",
140 i * scale, (i + 1) * scale - 1);
141 first = 0;
142 }
143 }
144}
145
146static int
147apb_checkrange(uint8_t map, u_long scale, u_long start, u_long end)
148{
149 int i, ei;
150
151 i = start / scale;
152 ei = end / scale;
153 if (i > 7 || ei > 7)
154 return (0);
155 for (; i <= ei; i++)
156 if ((map & (1 << i)) == 0)
157 return (0);
158 return (1);
159}
160
161static int
162apb_attach(device_t dev)
163{
164 struct apb_softc *sc;
165 struct sysctl_ctx_list *sctx;
166 struct sysctl_oid *soid;
167
168 sc = device_get_softc(dev);
169
170 /*
171 * Get current bridge configuration.
172 */
173 sc->sc_bsc.ops_pcib_sc.domain = pci_get_domain(dev);
174 sc->sc_bsc.ops_pcib_sc.secstat =
175 pci_read_config(dev, PCIR_SECSTAT_1, 2);
176 sc->sc_bsc.ops_pcib_sc.command =
177 pci_read_config(dev, PCIR_COMMAND, 2);
178 sc->sc_bsc.ops_pcib_sc.pribus =
179 pci_read_config(dev, PCIR_PRIBUS_1, 1);
180 sc->sc_bsc.ops_pcib_sc.secbus =
181 pci_read_config(dev, PCIR_SECBUS_1, 1);
182 sc->sc_bsc.ops_pcib_sc.subbus =
183 pci_read_config(dev, PCIR_SUBBUS_1, 1);
184 sc->sc_bsc.ops_pcib_sc.bridgectl =
185 pci_read_config(dev, PCIR_BRIDGECTL_1, 2);
186 sc->sc_bsc.ops_pcib_sc.seclat =
187 pci_read_config(dev, PCIR_SECLAT_1, 1);
188 sc->sc_iomap = pci_read_config(dev, APBR_IOMAP, 1);
189 sc->sc_memmap = pci_read_config(dev, APBR_MEMMAP, 1);
190
191 /*
192 * Setup SYSCTL reporting nodes.
193 */
194 sctx = device_get_sysctl_ctx(dev);
195 soid = device_get_sysctl_tree(dev);
196 SYSCTL_ADD_UINT(sctx, SYSCTL_CHILDREN(soid), OID_AUTO, "domain",
197 CTLFLAG_RD, &sc->sc_bsc.ops_pcib_sc.domain, 0,
198 "Domain number");
199 SYSCTL_ADD_UINT(sctx, SYSCTL_CHILDREN(soid), OID_AUTO, "pribus",
200 CTLFLAG_RD, &sc->sc_bsc.ops_pcib_sc.pribus, 0,
201 "Primary bus number");
202 SYSCTL_ADD_UINT(sctx, SYSCTL_CHILDREN(soid), OID_AUTO, "secbus",
203 CTLFLAG_RD, &sc->sc_bsc.ops_pcib_sc.secbus, 0,
204 "Secondary bus number");
205 SYSCTL_ADD_UINT(sctx, SYSCTL_CHILDREN(soid), OID_AUTO, "subbus",
206 CTLFLAG_RD, &sc->sc_bsc.ops_pcib_sc.subbus, 0,
207 "Subordinate bus number");
208
209 ofw_pcib_gen_setup(dev);
210
211 if (bootverbose) {
212 device_printf(dev, " domain %d\n",
213 sc->sc_bsc.ops_pcib_sc.domain);
214 device_printf(dev, " secondary bus %d\n",
215 sc->sc_bsc.ops_pcib_sc.secbus);
216 device_printf(dev, " subordinate bus %d\n",
217 sc->sc_bsc.ops_pcib_sc.subbus);
218 device_printf(dev, " I/O decode ");
219 apb_map_print(sc->sc_iomap, APB_IO_SCALE);
220 printf("\n");
221 device_printf(dev, " memory decode ");
222 apb_map_print(sc->sc_memmap, APB_MEM_SCALE);
223 printf("\n");
224 }
225
226 device_add_child(dev, "pci", -1);
227 return (bus_generic_attach(dev));
228}
229
230/*
231 * We have to trap resource allocation requests and ensure that the bridge
232 * is set up to, or capable of handling them.
233 */
234static struct resource *
235apb_alloc_resource(device_t dev, device_t child, int type, int *rid,
236 u_long start, u_long end, u_long count, u_int flags)
237{
238 struct apb_softc *sc;
239
240 sc = device_get_softc(dev);
241
242 /*
243 * If this is a "default" allocation against this rid, we can't work
244 * out where it's coming from (we should actually never see these) so
245 * we just have to punt.
246 */
247 if (start == 0 && end == ~0) {
248 device_printf(dev, "can't decode default resource id %d for "
249 "%s, bypassing\n", *rid, device_get_nameunit(child));
250 goto passup;
251 }
252
253 /*
254 * Fail the allocation for this range if it's not supported.
255 * XXX we should probably just fix up the bridge decode and
256 * soldier on.
257 */
258 switch (type) {
259 case SYS_RES_IOPORT:
260 if (!apb_checkrange(sc->sc_iomap, APB_IO_SCALE, start, end)) {
261 device_printf(dev, "device %s requested unsupported "
262 "I/O range 0x%lx-0x%lx\n",
263 device_get_nameunit(child), start, end);
264 return (NULL);
265 }
266 if (bootverbose)
267 device_printf(sc->sc_bsc.ops_pcib_sc.dev, "device "
268 "%s requested decoded I/O range 0x%lx-0x%lx\n",
269 device_get_nameunit(child), start, end);
270 break;
271 case SYS_RES_MEMORY:
272 if (!apb_checkrange(sc->sc_memmap, APB_MEM_SCALE, start,
273 end)) {
274 device_printf(dev, "device %s requested unsupported "
275 "memory range 0x%lx-0x%lx\n",
276 device_get_nameunit(child), start, end);
277 return (NULL);
278 }
279 if (bootverbose)
280 device_printf(sc->sc_bsc.ops_pcib_sc.dev, "device "
281 "%s requested decoded memory range 0x%lx-0x%lx\n",
282 device_get_nameunit(child), start, end);
283 break;
284 }
285
286 passup:
287 /*
288 * Bridge is OK decoding this resource, so pass it up.
289 */
290 return (bus_generic_alloc_resource(dev, child, type, rid, start, end,
291 count, flags));
292}
293
294static int
295apb_adjust_resource(device_t dev, device_t child, int type,
296 struct resource *r, u_long start, u_long end)
297{
298 struct apb_softc *sc;
299
300 sc = device_get_softc(dev);
301 switch (type) {
302 case SYS_RES_IOPORT:
303 if (!apb_checkrange(sc->sc_iomap, APB_IO_SCALE, start, end))
304 return (ENXIO);
305 break;
306 case SYS_RES_MEMORY:
307 if (!apb_checkrange(sc->sc_memmap, APB_MEM_SCALE, start, end))
308 return (ENXIO);
309 break;
310 }
311 return (bus_generic_adjust_resource(dev, child, type, r, start, end));
312}
100};
101
102static devclass_t pcib_devclass;
103
104DEFINE_CLASS_1(pcib, apb_driver, apb_methods, sizeof(struct apb_softc),
105 pcib_driver);
106EARLY_DRIVER_MODULE(apb, pci, apb_driver, pcib_devclass, 0, 0, BUS_PASS_BUS);
107MODULE_DEPEND(apb, pci, 1, 1, 1);
108
109/* APB specific registers */
110#define APBR_IOMAP 0xde
111#define APBR_MEMMAP 0xdf
112
113/* Definitions for the mapping registers */
114#define APB_IO_SCALE 0x200000
115#define APB_MEM_SCALE 0x20000000
116
117/*
118 * Generic device interface
119 */
120static int
121apb_probe(device_t dev)
122{
123
124 if (pci_get_vendor(dev) == 0x108e && /* Sun */
125 pci_get_device(dev) == 0x5000) { /* APB */
126 device_set_desc(dev, "APB PCI-PCI bridge");
127 return (0);
128 }
129 return (ENXIO);
130}
131
132static void
133apb_map_print(uint8_t map, u_long scale)
134{
135 int i, first;
136
137 for (first = 1, i = 0; i < 8; i++) {
138 if ((map & (1 << i)) != 0) {
139 printf("%s0x%lx-0x%lx", first ? "" : ", ",
140 i * scale, (i + 1) * scale - 1);
141 first = 0;
142 }
143 }
144}
145
146static int
147apb_checkrange(uint8_t map, u_long scale, u_long start, u_long end)
148{
149 int i, ei;
150
151 i = start / scale;
152 ei = end / scale;
153 if (i > 7 || ei > 7)
154 return (0);
155 for (; i <= ei; i++)
156 if ((map & (1 << i)) == 0)
157 return (0);
158 return (1);
159}
160
161static int
162apb_attach(device_t dev)
163{
164 struct apb_softc *sc;
165 struct sysctl_ctx_list *sctx;
166 struct sysctl_oid *soid;
167
168 sc = device_get_softc(dev);
169
170 /*
171 * Get current bridge configuration.
172 */
173 sc->sc_bsc.ops_pcib_sc.domain = pci_get_domain(dev);
174 sc->sc_bsc.ops_pcib_sc.secstat =
175 pci_read_config(dev, PCIR_SECSTAT_1, 2);
176 sc->sc_bsc.ops_pcib_sc.command =
177 pci_read_config(dev, PCIR_COMMAND, 2);
178 sc->sc_bsc.ops_pcib_sc.pribus =
179 pci_read_config(dev, PCIR_PRIBUS_1, 1);
180 sc->sc_bsc.ops_pcib_sc.secbus =
181 pci_read_config(dev, PCIR_SECBUS_1, 1);
182 sc->sc_bsc.ops_pcib_sc.subbus =
183 pci_read_config(dev, PCIR_SUBBUS_1, 1);
184 sc->sc_bsc.ops_pcib_sc.bridgectl =
185 pci_read_config(dev, PCIR_BRIDGECTL_1, 2);
186 sc->sc_bsc.ops_pcib_sc.seclat =
187 pci_read_config(dev, PCIR_SECLAT_1, 1);
188 sc->sc_iomap = pci_read_config(dev, APBR_IOMAP, 1);
189 sc->sc_memmap = pci_read_config(dev, APBR_MEMMAP, 1);
190
191 /*
192 * Setup SYSCTL reporting nodes.
193 */
194 sctx = device_get_sysctl_ctx(dev);
195 soid = device_get_sysctl_tree(dev);
196 SYSCTL_ADD_UINT(sctx, SYSCTL_CHILDREN(soid), OID_AUTO, "domain",
197 CTLFLAG_RD, &sc->sc_bsc.ops_pcib_sc.domain, 0,
198 "Domain number");
199 SYSCTL_ADD_UINT(sctx, SYSCTL_CHILDREN(soid), OID_AUTO, "pribus",
200 CTLFLAG_RD, &sc->sc_bsc.ops_pcib_sc.pribus, 0,
201 "Primary bus number");
202 SYSCTL_ADD_UINT(sctx, SYSCTL_CHILDREN(soid), OID_AUTO, "secbus",
203 CTLFLAG_RD, &sc->sc_bsc.ops_pcib_sc.secbus, 0,
204 "Secondary bus number");
205 SYSCTL_ADD_UINT(sctx, SYSCTL_CHILDREN(soid), OID_AUTO, "subbus",
206 CTLFLAG_RD, &sc->sc_bsc.ops_pcib_sc.subbus, 0,
207 "Subordinate bus number");
208
209 ofw_pcib_gen_setup(dev);
210
211 if (bootverbose) {
212 device_printf(dev, " domain %d\n",
213 sc->sc_bsc.ops_pcib_sc.domain);
214 device_printf(dev, " secondary bus %d\n",
215 sc->sc_bsc.ops_pcib_sc.secbus);
216 device_printf(dev, " subordinate bus %d\n",
217 sc->sc_bsc.ops_pcib_sc.subbus);
218 device_printf(dev, " I/O decode ");
219 apb_map_print(sc->sc_iomap, APB_IO_SCALE);
220 printf("\n");
221 device_printf(dev, " memory decode ");
222 apb_map_print(sc->sc_memmap, APB_MEM_SCALE);
223 printf("\n");
224 }
225
226 device_add_child(dev, "pci", -1);
227 return (bus_generic_attach(dev));
228}
229
230/*
231 * We have to trap resource allocation requests and ensure that the bridge
232 * is set up to, or capable of handling them.
233 */
234static struct resource *
235apb_alloc_resource(device_t dev, device_t child, int type, int *rid,
236 u_long start, u_long end, u_long count, u_int flags)
237{
238 struct apb_softc *sc;
239
240 sc = device_get_softc(dev);
241
242 /*
243 * If this is a "default" allocation against this rid, we can't work
244 * out where it's coming from (we should actually never see these) so
245 * we just have to punt.
246 */
247 if (start == 0 && end == ~0) {
248 device_printf(dev, "can't decode default resource id %d for "
249 "%s, bypassing\n", *rid, device_get_nameunit(child));
250 goto passup;
251 }
252
253 /*
254 * Fail the allocation for this range if it's not supported.
255 * XXX we should probably just fix up the bridge decode and
256 * soldier on.
257 */
258 switch (type) {
259 case SYS_RES_IOPORT:
260 if (!apb_checkrange(sc->sc_iomap, APB_IO_SCALE, start, end)) {
261 device_printf(dev, "device %s requested unsupported "
262 "I/O range 0x%lx-0x%lx\n",
263 device_get_nameunit(child), start, end);
264 return (NULL);
265 }
266 if (bootverbose)
267 device_printf(sc->sc_bsc.ops_pcib_sc.dev, "device "
268 "%s requested decoded I/O range 0x%lx-0x%lx\n",
269 device_get_nameunit(child), start, end);
270 break;
271 case SYS_RES_MEMORY:
272 if (!apb_checkrange(sc->sc_memmap, APB_MEM_SCALE, start,
273 end)) {
274 device_printf(dev, "device %s requested unsupported "
275 "memory range 0x%lx-0x%lx\n",
276 device_get_nameunit(child), start, end);
277 return (NULL);
278 }
279 if (bootverbose)
280 device_printf(sc->sc_bsc.ops_pcib_sc.dev, "device "
281 "%s requested decoded memory range 0x%lx-0x%lx\n",
282 device_get_nameunit(child), start, end);
283 break;
284 }
285
286 passup:
287 /*
288 * Bridge is OK decoding this resource, so pass it up.
289 */
290 return (bus_generic_alloc_resource(dev, child, type, rid, start, end,
291 count, flags));
292}
293
294static int
295apb_adjust_resource(device_t dev, device_t child, int type,
296 struct resource *r, u_long start, u_long end)
297{
298 struct apb_softc *sc;
299
300 sc = device_get_softc(dev);
301 switch (type) {
302 case SYS_RES_IOPORT:
303 if (!apb_checkrange(sc->sc_iomap, APB_IO_SCALE, start, end))
304 return (ENXIO);
305 break;
306 case SYS_RES_MEMORY:
307 if (!apb_checkrange(sc->sc_memmap, APB_MEM_SCALE, start, end))
308 return (ENXIO);
309 break;
310 }
311 return (bus_generic_adjust_resource(dev, child, type, r, start, end));
312}