26c26
< * $FreeBSD: head/sys/sparc64/include/tlb.h 81334 2001-08-09 02:09:34Z obrien $
---
> * $FreeBSD: head/sys/sparc64/include/tlb.h 81377 2001-08-10 04:21:44Z jake $
86c86
< tlb_dtlb_page_demap(u_int ctx, vm_offset_t va)
---
> tlb_dtlb_page_demap(u_long ctx, vm_offset_t va)
92,93c92,99
< } else
< TODO;
---
> } else {
> stxa(AA_DMMU_SCXR, ASI_DMMU, ctx);
> membar(Sync);
> stxa(TLB_DEMAP_VA(va) | TLB_DEMAP_SECONDARY | TLB_DEMAP_PAGE,
> ASI_DMMU_DEMAP, 0);
> stxa(AA_DMMU_SCXR, ASI_DMMU, 0);
> membar(Sync);
> }
97c103
< tlb_dtlb_store(vm_offset_t va, struct tte tte)
---
> tlb_dtlb_store(vm_offset_t va, u_long ctx, struct tte tte)
100c106
< TLB_TAR_VA(va) | TLB_TAR_CTX(tte_get_ctx(tte)));
---
> TLB_TAR_VA(va) | TLB_TAR_CTX(ctx));
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< tlb_dtlb_store_slot(vm_offset_t va, struct tte tte, int slot)
---
> tlb_dtlb_store_slot(vm_offset_t va, u_long ctx, struct tte tte, int slot)
108c114
< stxa(AA_DMMU_TAR, ASI_DMMU, TLB_TAR_VA(va) | TLB_TAR_CTX(0));
---
> stxa(AA_DMMU_TAR, ASI_DMMU, TLB_TAR_VA(va) | TLB_TAR_CTX(ctx));
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< tlb_itlb_page_demap(u_int ctx, vm_offset_t va)
---
> tlb_itlb_page_demap(u_long ctx, vm_offset_t va)
120,121c126,134
< } else
< TODO;
---
> } else {
> stxa(AA_DMMU_SCXR, ASI_DMMU, ctx);
> membar(Sync);
> stxa(TLB_DEMAP_VA(va) | TLB_DEMAP_SECONDARY | TLB_DEMAP_PAGE,
> ASI_IMMU_DEMAP, 0);
> stxa(AA_DMMU_SCXR, ASI_DMMU, 0);
> /* flush probably not needed. */
> membar(Sync);
> }
125c138
< tlb_itlb_store(vm_offset_t va, struct tte tte)
---
> tlb_itlb_store(vm_offset_t va, u_long ctx, struct tte tte)
127c140,150
< TODO;
---
> stxa(AA_IMMU_TAR, ASI_IMMU, TLB_TAR_VA(va) | TLB_TAR_CTX(ctx));
> stxa(0, ASI_ITLB_DATA_IN_REG, tte.tte_data);
> if (ctx == TLB_CTX_KERNEL)
> flush(va);
> else {
> /*
> * flush probably not needed and impossible here, no access to
> * user page.
> */
> membar(Sync);
> }
131c154
< tlb_itlb_store_slot(vm_offset_t va, struct tte tte, int slot)
---
> tlb_itlb_store_slot(vm_offset_t va, u_long ctx, struct tte tte, int slot)
133c156
< stxa(AA_IMMU_TAR, ASI_IMMU, TLB_TAR_VA(va) | TLB_TAR_CTX(0));
---
> stxa(AA_IMMU_TAR, ASI_IMMU, TLB_TAR_VA(va) | TLB_TAR_CTX(ctx));
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< tlb_store(u_int tlb, vm_offset_t va, struct tte tte)
---
> tlb_store(u_int tlb, vm_offset_t va, u_long ctx, struct tte tte)
151c174
< tlb_dtlb_store(va, tte);
---
> tlb_dtlb_store(va, ctx, tte);
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< tlb_itlb_store(va, tte);
---
> tlb_itlb_store(va, ctx, tte);
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< tlb_store_slot(u_int tlb, vm_offset_t va, struct tte tte, int slot)
---
> tlb_store_slot(u_int tlb, vm_offset_t va, u_long ctx, struct tte tte, int slot)
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< tlb_dtlb_store_slot(va, tte, slot);
---
> tlb_dtlb_store_slot(va, ctx, tte, slot);
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< tlb_itlb_store_slot(va, tte, slot);
---
> tlb_itlb_store_slot(va, ctx, tte, slot);