| smp.h (91617) | smp.h (91783) |
|---|---|
| 1/*- 2 * Copyright (c) 2001 Jake Burkholder. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 9 unchanged lines hidden (view full) --- 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * | 1/*- 2 * Copyright (c) 2001 Jake Burkholder. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 9 unchanged lines hidden (view full) --- 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * |
| 26 * $FreeBSD: head/sys/sparc64/include/smp.h 91617 2002-03-04 07:12:36Z jake $ | 26 * $FreeBSD: head/sys/sparc64/include/smp.h 91783 2002-03-07 06:01:40Z jake $ |
| 27 */ 28 29#ifndef _MACHINE_SMP_H_ 30#define _MACHINE_SMP_H_ 31 32#define CPU_CLKSYNC 1 33#define CPU_INIT 2 34#define CPU_BOOTSTRAP 3 --- 8 unchanged lines hidden (view full) --- 43 44#define IPI_AST PIL_AST 45#define IPI_RENDEZVOUS PIL_RENDEZVOUS 46#define IPI_STOP PIL_STOP 47 48#define IPI_RETRIES 100 49 50struct cpu_start_args { | 27 */ 28 29#ifndef _MACHINE_SMP_H_ 30#define _MACHINE_SMP_H_ 31 32#define CPU_CLKSYNC 1 33#define CPU_INIT 2 34#define CPU_BOOTSTRAP 3 --- 8 unchanged lines hidden (view full) --- 43 44#define IPI_AST PIL_AST 45#define IPI_RENDEZVOUS PIL_RENDEZVOUS 46#define IPI_STOP PIL_STOP 47 48#define IPI_RETRIES 100 49 50struct cpu_start_args { |
| 51 u_int csa_count; |
|
| 51 u_int csa_mid; 52 u_int csa_state; | 52 u_int csa_mid; 53 u_int csa_state; |
| 54 vm_offset_t csa_pcpu; |
|
| 53 u_long csa_tick; 54 u_long csa_ver; 55 struct tte csa_ttes[PCPU_PAGES]; 56}; 57 58struct ipi_level_args { 59 u_int ila_count; 60 u_int ila_level; 61}; 62 63struct ipi_tlb_args { 64 u_int ita_count; 65 u_long ita_tlb; | 55 u_long csa_tick; 56 u_long csa_ver; 57 struct tte csa_ttes[PCPU_PAGES]; 58}; 59 60struct ipi_level_args { 61 u_int ila_count; 62 u_int ila_level; 63}; 64 65struct ipi_tlb_args { 66 u_int ita_count; 67 u_long ita_tlb; |
| 66 u_long ita_ctx; | 68 struct pmap *ita_pmap; |
| 67 u_long ita_start; 68 u_long ita_end; 69}; 70#define ita_va ita_start 71 72struct pcpu; 73 74void cpu_mp_bootstrap(struct pcpu *pc); --- 5 unchanged lines hidden (view full) --- 80void ipi_all(u_int ipi); 81void ipi_all_but_self(u_int ipi); 82 83vm_offset_t mp_tramp_alloc(void); 84 85extern struct ipi_level_args ipi_level_args; 86extern struct ipi_tlb_args ipi_tlb_args; 87 | 69 u_long ita_start; 70 u_long ita_end; 71}; 72#define ita_va ita_start 73 74struct pcpu; 75 76void cpu_mp_bootstrap(struct pcpu *pc); --- 5 unchanged lines hidden (view full) --- 82void ipi_all(u_int ipi); 83void ipi_all_but_self(u_int ipi); 84 85vm_offset_t mp_tramp_alloc(void); 86 87extern struct ipi_level_args ipi_level_args; 88extern struct ipi_tlb_args ipi_tlb_args; 89 |
| 88extern int mp_ncpus; 89 | |
| 90extern vm_offset_t mp_tramp; 91extern char *mp_tramp_code; 92extern u_long mp_tramp_code_len; 93extern u_long mp_tramp_tlb_slots; 94extern u_long mp_tramp_func; 95 96extern void mp_startup(void); 97 98extern char tl_ipi_level[]; 99extern char tl_ipi_test[]; 100extern char tl_ipi_tlb_context_demap[]; 101extern char tl_ipi_tlb_page_demap[]; 102extern char tl_ipi_tlb_range_demap[]; 103 104#ifdef SMP 105 | 90extern vm_offset_t mp_tramp; 91extern char *mp_tramp_code; 92extern u_long mp_tramp_code_len; 93extern u_long mp_tramp_tlb_slots; 94extern u_long mp_tramp_func; 95 96extern void mp_startup(void); 97 98extern char tl_ipi_level[]; 99extern char tl_ipi_test[]; 100extern char tl_ipi_tlb_context_demap[]; 101extern char tl_ipi_tlb_page_demap[]; 102extern char tl_ipi_tlb_range_demap[]; 103 104#ifdef SMP 105 |
| 106#ifdef _MACHINE_PMAP_H_ 107 |
|
| 106static __inline void * | 108static __inline void * |
| 107ipi_tlb_context_demap(u_int ctx) | 109ipi_tlb_context_demap(struct pmap *pm) |
| 108{ 109 struct ipi_tlb_args *ita; | 110{ 111 struct ipi_tlb_args *ita; |
| 112 u_int cpus; |
|
| 110 | 113 |
| 111 if (mp_ncpus == 1) | 114 if (smp_cpus == 1) |
| 112 return (NULL); | 115 return (NULL); |
| 116 if ((cpus = (pm->pm_active & PCPU_GET(other_cpus))) == 0) 117 return (NULL); |
|
| 113 ita = &ipi_tlb_args; | 118 ita = &ipi_tlb_args; |
| 114 ita->ita_count = mp_ncpus; 115 ita->ita_ctx = ctx; 116 cpu_ipi_selected(PCPU_GET(other_cpus), 0, 117 (u_long)tl_ipi_tlb_context_demap, (u_long)ita); | 119 ita->ita_count = smp_cpus; 120 ita->ita_pmap = pm; 121 cpu_ipi_selected(cpus, 0, (u_long)tl_ipi_tlb_context_demap, 122 (u_long)ita); |
| 118 return (&ita->ita_count); 119} 120 121static __inline void * | 123 return (&ita->ita_count); 124} 125 126static __inline void * |
| 122ipi_tlb_page_demap(u_int tlb, u_int ctx, vm_offset_t va) | 127ipi_tlb_page_demap(u_int tlb, struct pmap *pm, vm_offset_t va) |
| 123{ 124 struct ipi_tlb_args *ita; | 128{ 129 struct ipi_tlb_args *ita; |
| 130 u_int cpus; |
|
| 125 | 131 |
| 126 if (mp_ncpus == 1) | 132 if (smp_cpus == 1) |
| 127 return (NULL); | 133 return (NULL); |
| 134 if ((cpus = (pm->pm_active & PCPU_GET(other_cpus))) == 0) 135 return (NULL); |
|
| 128 ita = &ipi_tlb_args; | 136 ita = &ipi_tlb_args; |
| 129 ita->ita_count = mp_ncpus; | 137 ita->ita_count = smp_cpus; |
| 130 ita->ita_tlb = tlb; | 138 ita->ita_tlb = tlb; |
| 131 ita->ita_ctx = ctx; | 139 ita->ita_pmap = pm; |
| 132 ita->ita_va = va; | 140 ita->ita_va = va; |
| 133 cpu_ipi_selected(PCPU_GET(other_cpus), 0, 134 (u_long)tl_ipi_tlb_page_demap, (u_long)ita); | 141 cpu_ipi_selected(cpus, 0, (u_long)tl_ipi_tlb_page_demap, (u_long)ita); |
| 135 return (&ita->ita_count); 136} 137 138static __inline void * | 142 return (&ita->ita_count); 143} 144 145static __inline void * |
| 139ipi_tlb_range_demap(u_int ctx, vm_offset_t start, vm_offset_t end) | 146ipi_tlb_range_demap(struct pmap *pm, vm_offset_t start, vm_offset_t end) |
| 140{ 141 struct ipi_tlb_args *ita; | 147{ 148 struct ipi_tlb_args *ita; |
| 149 u_int cpus; |
|
| 142 | 150 |
| 143 if (mp_ncpus == 1) | 151 if (smp_cpus == 1) |
| 144 return (NULL); | 152 return (NULL); |
| 153 if ((cpus = (pm->pm_active & PCPU_GET(other_cpus))) == 0) 154 return (NULL); |
|
| 145 ita = &ipi_tlb_args; | 155 ita = &ipi_tlb_args; |
| 146 ita->ita_count = mp_ncpus; 147 ita->ita_ctx = ctx; | 156 ita->ita_count = smp_cpus; 157 ita->ita_pmap = pm; |
| 148 ita->ita_start = start; 149 ita->ita_end = end; | 158 ita->ita_start = start; 159 ita->ita_end = end; |
| 150 cpu_ipi_selected(PCPU_GET(other_cpus), 0, 151 (u_long)tl_ipi_tlb_range_demap, (u_long)ita); | 160 cpu_ipi_selected(cpus, 0, (u_long)tl_ipi_tlb_range_demap, (u_long)ita); |
| 152 return (&ita->ita_count); 153} 154 155static __inline void 156ipi_wait(void *cookie) 157{ | 161 return (&ita->ita_count); 162} 163 164static __inline void 165ipi_wait(void *cookie) 166{ |
| 167#if 0 |
|
| 158 u_int *count; 159 160 if ((count = cookie) != NULL) { 161 atomic_subtract_int(count, 1); 162 while (*count != 0) 163 ; 164 } | 168 u_int *count; 169 170 if ((count = cookie) != NULL) { 171 atomic_subtract_int(count, 1); 172 while (*count != 0) 173 ; 174 } |
| 175#endif |
|
| 165} 166 | 176} 177 |
| 178#endif 179 |
|
| 167#else 168 169static __inline void * | 180#else 181 182static __inline void * |
| 170ipi_tlb_context_demap(u_int ctx) | 183ipi_tlb_context_demap(struct pmap *pm) |
| 171{ 172 return (NULL); 173} 174 175static __inline void * | 184{ 185 return (NULL); 186} 187 188static __inline void * |
| 176ipi_tlb_page_demap(u_int tlb, u_int ctx, vm_offset_t va) | 189ipi_tlb_page_demap(u_int tlb, struct pmap *pm, vm_offset_t va) |
| 177{ 178 return (NULL); 179} 180 181static __inline void * | 190{ 191 return (NULL); 192} 193 194static __inline void * |
| 182ipi_tlb_range_demap(u_int ctx, vm_offset_t start, vm_offset_t end) | 195ipi_tlb_range_demap(struct pmap *pm, vm_offset_t start, vm_offset_t end) |
| 183{ 184 return (NULL); 185} 186 187static __inline void 188ipi_wait(void *cookie) 189{ 190} 191 192#endif /* SMP */ 193 194#endif /* !LOCORE */ 195 196#endif /* !_MACHINE_SMP_H_ */ | 196{ 197 return (NULL); 198} 199 200static __inline void 201ipi_wait(void *cookie) 202{ 203} 204 205#endif /* SMP */ 206 207#endif /* !LOCORE */ 208 209#endif /* !_MACHINE_SMP_H_ */ |