| smp.h (91157) | smp.h (91617) |
|---|---|
| 1/*- 2 * Copyright (c) 2001 Jake Burkholder. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 9 unchanged lines hidden (view full) --- 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * | 1/*- 2 * Copyright (c) 2001 Jake Burkholder. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 9 unchanged lines hidden (view full) --- 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * |
| 26 * $FreeBSD: head/sys/sparc64/include/smp.h 91157 2002-02-23 18:41:34Z jake $ | 26 * $FreeBSD: head/sys/sparc64/include/smp.h 91617 2002-03-04 07:12:36Z jake $ |
| 27 */ 28 29#ifndef _MACHINE_SMP_H_ 30#define _MACHINE_SMP_H_ 31 | 27 */ 28 29#ifndef _MACHINE_SMP_H_ 30#define _MACHINE_SMP_H_ 31 |
| 32#define CPU_INITING 1 33#define CPU_INITED 2 34#define CPU_REJECT 3 35#define CPU_STARTING 4 36#define CPU_STARTED 5 37#define CPU_BOOTSTRAPING 6 38#define CPU_BOOTSTRAPPED 7 | 32#define CPU_CLKSYNC 1 33#define CPU_INIT 2 34#define CPU_BOOTSTRAP 3 |
| 39 40#ifndef LOCORE 41 42#include <machine/intr_machdep.h> | 35 36#ifndef LOCORE 37 38#include <machine/intr_machdep.h> |
| 39#include <machine/tte.h> |
|
| 43 44#define IDR_BUSY (1<<0) 45#define IDR_NACK (1<<1) 46 47#define IPI_AST PIL_AST 48#define IPI_RENDEZVOUS PIL_RENDEZVOUS 49#define IPI_STOP PIL_STOP 50 51#define IPI_RETRIES 100 52 53struct cpu_start_args { 54 u_int csa_mid; 55 u_int csa_state; | 40 41#define IDR_BUSY (1<<0) 42#define IDR_NACK (1<<1) 43 44#define IPI_AST PIL_AST 45#define IPI_RENDEZVOUS PIL_RENDEZVOUS 46#define IPI_STOP PIL_STOP 47 48#define IPI_RETRIES 100 49 50struct cpu_start_args { 51 u_int csa_mid; 52 u_int csa_state; |
| 56 u_long csa_data; 57 vm_offset_t csa_va; | 53 u_long csa_tick; 54 u_long csa_ver; 55 struct tte csa_ttes[PCPU_PAGES]; |
| 58}; 59 60struct ipi_level_args { 61 u_int ila_count; 62 u_int ila_level; 63}; 64 65struct ipi_tlb_args { --- 11 unchanged lines hidden (view full) --- 77 78void cpu_ipi_selected(u_int cpus, u_long d0, u_long d1, u_long d2); 79void cpu_ipi_send(u_int mid, u_long d0, u_long d1, u_long d2); 80 81void ipi_selected(u_int cpus, u_int ipi); 82void ipi_all(u_int ipi); 83void ipi_all_but_self(u_int ipi); 84 | 56}; 57 58struct ipi_level_args { 59 u_int ila_count; 60 u_int ila_level; 61}; 62 63struct ipi_tlb_args { --- 11 unchanged lines hidden (view full) --- 75 76void cpu_ipi_selected(u_int cpus, u_long d0, u_long d1, u_long d2); 77void cpu_ipi_send(u_int mid, u_long d0, u_long d1, u_long d2); 78 79void ipi_selected(u_int cpus, u_int ipi); 80void ipi_all(u_int ipi); 81void ipi_all_but_self(u_int ipi); 82 |
| 83vm_offset_t mp_tramp_alloc(void); 84 |
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| 85extern struct ipi_level_args ipi_level_args; 86extern struct ipi_tlb_args ipi_tlb_args; 87 88extern int mp_ncpus; 89 | 85extern struct ipi_level_args ipi_level_args; 86extern struct ipi_tlb_args ipi_tlb_args; 87 88extern int mp_ncpus; 89 |
| 90extern vm_offset_t mp_tramp; 91extern char *mp_tramp_code; 92extern u_long mp_tramp_code_len; 93extern u_long mp_tramp_tlb_slots; 94extern u_long mp_tramp_func; 95 96extern void mp_startup(void); 97 |
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| 90extern char tl_ipi_level[]; 91extern char tl_ipi_test[]; 92extern char tl_ipi_tlb_context_demap[]; 93extern char tl_ipi_tlb_page_demap[]; 94extern char tl_ipi_tlb_range_demap[]; 95 96#ifdef SMP 97 --- 49 unchanged lines hidden (view full) --- 147static __inline void 148ipi_wait(void *cookie) 149{ 150 u_int *count; 151 152 if ((count = cookie) != NULL) { 153 atomic_subtract_int(count, 1); 154 while (*count != 0) | 98extern char tl_ipi_level[]; 99extern char tl_ipi_test[]; 100extern char tl_ipi_tlb_context_demap[]; 101extern char tl_ipi_tlb_page_demap[]; 102extern char tl_ipi_tlb_range_demap[]; 103 104#ifdef SMP 105 --- 49 unchanged lines hidden (view full) --- 155static __inline void 156ipi_wait(void *cookie) 157{ 158 u_int *count; 159 160 if ((count = cookie) != NULL) { 161 atomic_subtract_int(count, 1); 162 while (*count != 0) |
| 155 membar(LoadStore); | 163 ; |
| 156 } 157} 158 159#else 160 161static __inline void * 162ipi_tlb_context_demap(u_int ctx) 163{ --- 25 unchanged lines hidden --- | 164 } 165} 166 167#else 168 169static __inline void * 170ipi_tlb_context_demap(u_int ctx) 171{ --- 25 unchanged lines hidden --- |