| uninorthvar.h (258272) | uninorthvar.h (259284) |
|---|---|
| 1/*- 2 * Copyright (C) 2002 Benno Rice. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 8 unchanged lines hidden (view full) --- 17 * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 18 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 19 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 20 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 21 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 22 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF 23 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 24 * | 1/*- 2 * Copyright (C) 2002 Benno Rice. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 8 unchanged lines hidden (view full) --- 17 * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 18 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 19 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 20 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 21 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 22 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF 23 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 24 * |
| 25 * $FreeBSD: head/sys/powerpc/powermac/uninorthvar.h 258272 2013-11-17 19:01:13Z nwhitehorn $ | 25 * $FreeBSD: head/sys/powerpc/powermac/uninorthvar.h 259284 2013-12-13 02:37:35Z jhibbits $ |
| 26 */ 27 28#ifndef _POWERPC_POWERMAC_UNINORTHVAR_H_ 29#define _POWERPC_POWERMAC_UNINORTHVAR_H_ 30 | 26 */ 27 28#ifndef _POWERPC_POWERMAC_UNINORTHVAR_H_ 29#define _POWERPC_POWERMAC_UNINORTHVAR_H_ 30 |
| 31#include <dev/ofw/ofw_bus_subr.h> 32#include <dev/ofw/ofw_pci.h> |
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| 31#include <powerpc/ofw/ofw_pci.h> 32 33struct uninorth_softc { 34 struct ofw_pci_softc pci_sc; 35 vm_offset_t sc_addr; 36 vm_offset_t sc_data; 37 int sc_ver; 38}; --- 32 unchanged lines hidden (view full) --- 71 72/* 73 * Clock-control register 74 */ 75#define UNIN_CLOCKCNTL 0x20 76#define UNIN_CLOCKCNTL_GMAC 0x2 77 78/* | 33#include <powerpc/ofw/ofw_pci.h> 34 35struct uninorth_softc { 36 struct ofw_pci_softc pci_sc; 37 vm_offset_t sc_addr; 38 vm_offset_t sc_data; 39 int sc_ver; 40}; --- 32 unchanged lines hidden (view full) --- 73 74/* 75 * Clock-control register 76 */ 77#define UNIN_CLOCKCNTL 0x20 78#define UNIN_CLOCKCNTL_GMAC 0x2 79 80/* |
| 81 * Power management register 82 */ 83#define UNIN_PWR_MGMT 0x30 84#define UNIN_PWR_NORMAL 0x00 85#define UNIN_PWR_IDLE2 0x01 86#define UNIN_PWR_SLEEP 0x02 87#define UNIN_PWR_SAVE 0x03 88#define UNIN_PWR_MASK 0x03 89 90/* 91 * Hardware initialization state register 92 */ 93#define UNIN_HWINIT_STATE 0x70 94#define UNIN_SLEEPING 0x01 95#define UNIN_RUNNING 0x02 96 97 98/* |
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| 79 * Toggle registers 80 */ 81#define UNIN_TOGGLE_REG 0xe0 82#define UNIN_MPIC_RESET 0x2 83#define UNIN_MPIC_OUTPUT_ENABLE 0x4 84 | 99 * Toggle registers 100 */ 101#define UNIN_TOGGLE_REG 0xe0 102#define UNIN_MPIC_RESET 0x2 103#define UNIN_MPIC_OUTPUT_ENABLE 0x4 104 |
| 105extern int unin_chip_sleep(device_t dev, int idle); 106extern int unin_chip_wake(device_t dev); |
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| 85#endif /* _POWERPC_POWERMAC_UNINORTHVAR_H_ */ | 107#endif /* _POWERPC_POWERMAC_UNINORTHVAR_H_ */ |