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< __FBSDID("$FreeBSD: head/sys/powerpc/mpc85xx/mpc85xx.c 178596 2008-04-26 17:57:29Z raj $");
---
> __FBSDID("$FreeBSD: head/sys/powerpc/mpc85xx/mpc85xx.c 178597 2008-04-26 18:03:00Z raj $");
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> #include <vm/vm.h>
> #include <vm/vm_param.h>
>
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> #include <machine/pio.h>
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> #include <powerpc/mpc85xx/ocpbus.h>
>
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> uint32_t svr = mfsvr();
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< /* Clear DBCR0, disables debug interrupts and events. */
< mtspr(SPR_DBCR0, 0);
< __asm volatile("isync");
---
> if (svr == SVR_MPC8572E || svr == SVR_MPC8572)
> /* Systems with dedicated reset register */
> out32(OCP85XX_RSTCR, 2);
> else {
> /* Clear DBCR0, disables debug interrupts and events. */
> mtspr(SPR_DBCR0, 0);
> __asm volatile("isync");
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< /* Enable Debug Interrupts in MSR. */
< mtmsr(mfmsr() | PSL_DE);
---
> /* Enable Debug Interrupts in MSR. */
> mtmsr(mfmsr() | PSL_DE);
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< /* Enable debug interrupts and issue reset. */
< mtspr(SPR_DBCR0, mfspr(SPR_DBCR0) | DBCR0_IDM | DBCR0_RST_SYSTEM);
---
> /* Enable debug interrupts and issue reset. */
> mtspr(SPR_DBCR0, mfspr(SPR_DBCR0) | DBCR0_IDM | DBCR0_RST_SYSTEM);
> }
>