1/*- 2 * Copyright (C) 2008 Semihalf, Rafal Jaworowski 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 3. Neither the name of the author nor the names of contributors 14 * may be used to endorse or promote products derived from this software 15 * without specific prior written permission. 16 * 17 * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND 18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 20 * ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE 21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 27 * SUCH DAMAGE. 28 */ 29 30#include <sys/cdefs.h>
| 1/*- 2 * Copyright (C) 2008 Semihalf, Rafal Jaworowski 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 3. Neither the name of the author nor the names of contributors 14 * may be used to endorse or promote products derived from this software 15 * without specific prior written permission. 16 * 17 * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND 18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 20 * ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE 21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 27 * SUCH DAMAGE. 28 */ 29 30#include <sys/cdefs.h>
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31__FBSDID("$FreeBSD: head/sys/powerpc/mpc85xx/mpc85xx.c 178596 2008-04-26 17:57:29Z raj $");
| 31__FBSDID("$FreeBSD: head/sys/powerpc/mpc85xx/mpc85xx.c 178597 2008-04-26 18:03:00Z raj $");
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32 33#include <sys/param.h> 34#include <sys/systm.h> 35
| 32 33#include <sys/param.h> 34#include <sys/systm.h> 35
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| 36#include <vm/vm.h> 37#include <vm/vm_param.h> 38
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36#include <machine/cpu.h> 37#include <machine/cpufunc.h>
| 39#include <machine/cpu.h> 40#include <machine/cpufunc.h>
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| 41#include <machine/pio.h>
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38#include <machine/spr.h> 39
| 42#include <machine/spr.h> 43
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| 44#include <powerpc/mpc85xx/ocpbus.h> 45
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40/* 41 * MPC85xx system specific routines 42 */ 43 44void 45cpu_reset() 46{
| 46/* 47 * MPC85xx system specific routines 48 */ 49 50void 51cpu_reset() 52{
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| 53 uint32_t svr = mfsvr();
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47
| 54
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48 /* Clear DBCR0, disables debug interrupts and events. */ 49 mtspr(SPR_DBCR0, 0); 50 __asm volatile("isync");
| 55 if (svr == SVR_MPC8572E || svr == SVR_MPC8572) 56 /* Systems with dedicated reset register */ 57 out32(OCP85XX_RSTCR, 2); 58 else { 59 /* Clear DBCR0, disables debug interrupts and events. */ 60 mtspr(SPR_DBCR0, 0); 61 __asm volatile("isync");
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51
| 62
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52 /* Enable Debug Interrupts in MSR. */ 53 mtmsr(mfmsr() | PSL_DE);
| 63 /* Enable Debug Interrupts in MSR. */ 64 mtmsr(mfmsr() | PSL_DE);
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54
| 65
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55 /* Enable debug interrupts and issue reset. */ 56 mtspr(SPR_DBCR0, mfspr(SPR_DBCR0) | DBCR0_IDM | DBCR0_RST_SYSTEM);
| 66 /* Enable debug interrupts and issue reset. */ 67 mtspr(SPR_DBCR0, mfspr(SPR_DBCR0) | DBCR0_IDM | DBCR0_RST_SYSTEM); 68 } 69
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57 printf("Reset failed...\n"); 58 while (1); 59}
| 70 printf("Reset failed...\n"); 71 while (1); 72}
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