1/*-
2 * Copyright (C) 2008 Semihalf, Rafal Jaworowski
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

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23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27 * SUCH DAMAGE.
28 */
29
30#include <sys/cdefs.h>
31__FBSDID("$FreeBSD: head/sys/powerpc/mpc85xx/mpc85xx.c 178596 2008-04-26 17:57:29Z raj $");
32
33#include <sys/param.h>
34#include <sys/systm.h>
35
36#include <machine/cpu.h>
37#include <machine/cpufunc.h>
38#include <machine/spr.h>
39
40/*
41 * MPC85xx system specific routines
42 */
43
44void
45cpu_reset()
46{
47
48 /* Clear DBCR0, disables debug interrupts and events. */
49 mtspr(SPR_DBCR0, 0);
50 __asm volatile("isync");
51
52 /* Enable Debug Interrupts in MSR. */
53 mtmsr(mfmsr() | PSL_DE);
54
55 /* Enable debug interrupts and issue reset. */
56 mtspr(SPR_DBCR0, mfspr(SPR_DBCR0) | DBCR0_IDM | DBCR0_RST_SYSTEM);
57 printf("Reset failed...\n");
58 while (1);
59}