| lbc.h (184250) | lbc.h (186288) |
|---|---|
| 1/*- 2 * Copyright (c) 2006-2008, Juniper Networks, Inc. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * --- 9 unchanged lines hidden (view full) --- 18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 25 * | 1/*- 2 * Copyright (c) 2006-2008, Juniper Networks, Inc. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * --- 9 unchanged lines hidden (view full) --- 18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 25 * |
| 26 * $FreeBSD: head/sys/powerpc/mpc85xx/lbc.h 184250 2008-10-25 06:03:40Z marcel $ | 26 * $FreeBSD: head/sys/powerpc/mpc85xx/lbc.h 186288 2008-12-18 18:27:12Z raj $ |
| 27 */ 28 29#ifndef _MACHINE_LBC_H_ 30#define _MACHINE_LBC_H_ 31 32#define LBC_IVAR_DEVTYPE 1 | 27 */ 28 29#ifndef _MACHINE_LBC_H_ 30#define _MACHINE_LBC_H_ 31 32#define LBC_IVAR_DEVTYPE 1 |
| 33#define LBC_IVAR_CLOCK 2 34#define LBC_IVAR_REGSHIFT 3 | |
| 35 | 33 |
| 34/* Maximum number of devices on Local Bus */ 35#define LBC_DEV_MAX 8 36 |
|
| 36/* Device types. */ 37#define LBC_DEVTYPE_CFI 1 | 37/* Device types. */ 38#define LBC_DEVTYPE_CFI 1 |
| 38#define LBC_DEVTYPE_UART 2 | 39#define LBC_DEVTYPE_RTC 2 |
| 39 | 40 |
| 41/* Local access registers */ 42#define LBC85XX_BR(n) (OCP85XX_LBC_OFF + (8 * n)) 43#define LBC85XX_OR(n) (OCP85XX_LBC_OFF + 4 + (8 * n)) 44#define LBC85XX_LBCR (OCP85XX_LBC_OFF + 0xd0) 45#define LBC85XX_LCRR (OCP85XX_LBC_OFF + 0xd4) 46 47/* LBC machine select */ 48#define LBCRES_MSEL_GPCM 0 49#define LBCRES_MSEL_FCM 1 50#define LBCRES_MSEL_UPMA 8 51#define LBCRES_MSEL_UPMB 9 52#define LBCRES_MSEL_UPMC 10 53 54/* LBC data error checking modes */ 55#define LBCRES_DECC_DISABLED 0 56#define LBCRES_DECC_NORMAL 1 57#define LBCRES_DECC_RMW 2 58 59/* LBC atomic operation modes */ 60#define LBCRES_ATOM_DISABLED 0 61#define LBCRES_ATOM_RAWA 1 62#define LBCRES_ATOM_WARA 2 63 64struct lbc_resource { 65 int lbr_devtype; /* LBC device type */ 66 int lbr_unit; /* Resource table entry number */ 67 vm_paddr_t lbr_base_addr; /* Device mem region base address */ 68 size_t lbr_size; /* Device mem region size */ 69 int lbr_port_size; /* Data bus width */ 70 uint8_t lbr_msel; /* LBC machine select */ 71 uint8_t lbr_decc; /* Data error checking mode */ 72 uint8_t lbr_atom; /* Atomic operation mode */ 73 uint8_t lbr_wp; /* Write protect */ 74}; 75 76extern const struct lbc_resource mpc85xx_lbc_resources[]; 77 |
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| 40#endif /* _MACHINE_LBC_H_ */ | 78#endif /* _MACHINE_LBC_H_ */ |