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< * $FreeBSD: head/sys/powerpc/mpc85xx/lbc.h 184250 2008-10-25 06:03:40Z marcel $
---
> * $FreeBSD: head/sys/powerpc/mpc85xx/lbc.h 186288 2008-12-18 18:27:12Z raj $
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< #define LBC_IVAR_CLOCK 2
< #define LBC_IVAR_REGSHIFT 3
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> /* Maximum number of devices on Local Bus */
> #define LBC_DEV_MAX 8
>
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< #define LBC_DEVTYPE_UART 2
---
> #define LBC_DEVTYPE_RTC 2
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> /* Local access registers */
> #define LBC85XX_BR(n) (OCP85XX_LBC_OFF + (8 * n))
> #define LBC85XX_OR(n) (OCP85XX_LBC_OFF + 4 + (8 * n))
> #define LBC85XX_LBCR (OCP85XX_LBC_OFF + 0xd0)
> #define LBC85XX_LCRR (OCP85XX_LBC_OFF + 0xd4)
>
> /* LBC machine select */
> #define LBCRES_MSEL_GPCM 0
> #define LBCRES_MSEL_FCM 1
> #define LBCRES_MSEL_UPMA 8
> #define LBCRES_MSEL_UPMB 9
> #define LBCRES_MSEL_UPMC 10
>
> /* LBC data error checking modes */
> #define LBCRES_DECC_DISABLED 0
> #define LBCRES_DECC_NORMAL 1
> #define LBCRES_DECC_RMW 2
>
> /* LBC atomic operation modes */
> #define LBCRES_ATOM_DISABLED 0
> #define LBCRES_ATOM_RAWA 1
> #define LBCRES_ATOM_WARA 2
>
> struct lbc_resource {
> int lbr_devtype; /* LBC device type */
> int lbr_unit; /* Resource table entry number */
> vm_paddr_t lbr_base_addr; /* Device mem region base address */
> size_t lbr_size; /* Device mem region size */
> int lbr_port_size; /* Data bus width */
> uint8_t lbr_msel; /* LBC machine select */
> uint8_t lbr_decc; /* Data error checking mode */
> uint8_t lbr_atom; /* Atomic operation mode */
> uint8_t lbr_wp; /* Write protect */
> };
>
> extern const struct lbc_resource mpc85xx_lbc_resources[];
>