1/*- 2 * Copyright (C) 2008-2009 Semihalf, Michal Hajduk 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 11 unchanged lines hidden (view full) --- 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 */ 26 27#include <sys/cdefs.h> |
28__FBSDID("$FreeBSD: head/sys/powerpc/mpc85xx/i2c.c 209908 2010-07-11 21:08:29Z raj $"); |
29 30#include <sys/param.h> 31#include <sys/systm.h> 32#include <sys/bus.h> 33#include <sys/kernel.h> 34#include <sys/module.h> 35#include <sys/resource.h> 36 37#include <machine/bus.h> 38#include <machine/resource.h> |
39#include <sys/rman.h> 40 41#include <sys/lock.h> 42#include <sys/mutex.h> 43 44#include <dev/iicbus/iiconf.h> 45#include <dev/iicbus/iicbus.h> 46#include "iicbus_if.h" 47 |
48#include <dev/ofw/ofw_bus.h> 49#include <dev/ofw/ofw_bus_subr.h> |
50 51#define I2C_ADDR_REG 0x00 /* I2C slave address register */ 52#define I2C_FDR_REG 0x04 /* I2C frequency divider register */ 53#define I2C_CONTROL_REG 0x08 /* I2C control register */ 54#define I2C_STATUS_REG 0x0C /* I2C status register */ 55#define I2C_DATA_REG 0x10 /* I2C data register */ 56#define I2C_DFSRR_REG 0x14 /* I2C Digital Filter Sampling rate */ 57#define I2C_ENABLE 0x80 /* Module enable - interrupt disable */ --- 61 unchanged lines hidden (view full) --- 119 120static driver_t i2c_driver = { 121 "i2c", 122 i2c_methods, 123 sizeof(struct i2c_softc), 124}; 125static devclass_t i2c_devclass; 126 |
127DRIVER_MODULE(i2c, simplebus, i2c_driver, i2c_devclass, 0, 0); |
128DRIVER_MODULE(iicbus, i2c, iicbus_driver, iicbus_devclass, 0, 0); 129 130static __inline void 131i2c_write_reg(struct i2c_softc *sc, bus_size_t off, uint8_t val) 132{ 133 134 bus_space_write_1(sc->bst, sc->bsh, off, val); 135} --- 16 unchanged lines hidden (view full) --- 152} 153 154static int 155i2c_do_wait(device_t dev, struct i2c_softc *sc, int write, int start) 156{ 157 int err; 158 uint8_t status; 159 |
160 status = i2c_read_reg(sc, I2C_STATUS_REG); |
161 if (status & I2CSR_MIF) { 162 if (write && start && (status & I2CSR_RXAK)) { 163 debugf("no ack %s", start ? 164 "after sending slave address" : ""); 165 err = IIC_ENOACK; 166 goto error; 167 } 168 if (status & I2CSR_MAL) { --- 14 unchanged lines hidden (view full) --- 183 i2c_write_reg(sc, I2C_STATUS_REG, 0x0); 184 i2c_write_reg(sc, I2C_CONTROL_REG, I2CCR_MEN | I2CCR_TXAK); 185 return (err); 186} 187 188static int 189i2c_probe(device_t dev) 190{ |
191 struct i2c_softc *sc; |
192 |
193 if (!ofw_bus_is_compatible(dev, "fsl-i2c")) |
194 return (ENXIO); 195 196 sc = device_get_softc(dev); 197 sc->rid = 0; 198 199 sc->res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &sc->rid, 200 RF_ACTIVE); 201 if (sc->res == NULL) { |
202 device_printf(dev, "could not allocate resources\n"); |
203 return (ENXIO); 204 } 205 206 sc->bst = rman_get_bustag(sc->res); 207 sc->bsh = rman_get_bushandle(sc->res); 208 209 /* Enable I2C */ 210 i2c_write_reg(sc, I2C_CONTROL_REG, I2C_ENABLE); --- 220 unchanged lines hidden --- |