1/*-
2 * Copyright (C) 1995, 1996 Wolfgang Solfrank.
3 * Copyright (C) 1995, 1996 TooLs GmbH.
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * 3. All advertising materials mentioning features or use of this software
15 * must display the following acknowledgement:
16 * This product includes software developed by TooLs GmbH.
17 * 4. The name of TooLs GmbH may not be used to endorse or promote products
18 * derived from this software without specific prior written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR
21 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
22 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
23 * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
24 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
25 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
26 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
27 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
28 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
29 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
30 *
31 * $NetBSD: pte.h,v 1.2 1998/08/31 14:43:40 tsubai Exp $
32 * $FreeBSD: head/sys/powerpc/include/pte.h 279595 2015-03-04 17:04:22Z nwhitehorn $
33 */
34
35#ifndef _MACHINE_PTE_H_
36#define _MACHINE_PTE_H_
37
38#if defined(AIM)
39
40/*
41 * Page Table Entries
42 */
43#ifndef LOCORE
44
45/* 32-bit PTE */
46struct pte {
47 u_int32_t pte_hi;
48 u_int32_t pte_lo;
49};
50
51struct pteg {
52 struct pte pt[8];
53};
54
55/* 64-bit (long) PTE */
56struct lpte {
57 u_int64_t pte_hi;
58 u_int64_t pte_lo;
59};
60
61struct lpteg {
62 struct lpte pt[8];
63};
64
65#endif /* LOCORE */
66
67/* 32-bit PTE definitions */
68
69/* High word: */
70#define PTE_VALID 0x80000000
71#define PTE_VSID_SHFT 7
72#define PTE_HID 0x00000040
73#define PTE_API 0x0000003f
74/* Low word: */
75#define PTE_RPGN 0xfffff000
76#define PTE_REF 0x00000100
77#define PTE_CHG 0x00000080
78#define PTE_WIMG 0x00000078
79#define PTE_W 0x00000040
80#define PTE_I 0x00000020
81#define PTE_M 0x00000010
82#define PTE_G 0x00000008
83#define PTE_PP 0x00000003
84#define PTE_SO 0x00000000 /* Super. Only (U: XX, S: RW) */
85#define PTE_SW 0x00000001 /* Super. Write-Only (U: RO, S: RW) */
86#define PTE_BW 0x00000002 /* Supervisor (U: RW, S: RW) */
87#define PTE_BR 0x00000003 /* Both Read Only (U: RO, S: RO) */
88#define PTE_RW PTE_BW
89#define PTE_RO PTE_BR
90
91#define PTE_EXEC 0x00000200 /* pseudo bit in attrs; page is exec */
92
93/* 64-bit PTE definitions */
94
95/* High quadword: */
96#define LPTE_VSID_SHIFT 12
97#define LPTE_AVPN_MASK 0xFFFFFFFFFFFFFF80ULL
98#define LPTE_API 0x0000000000000F80ULL
99#define LPTE_SWBITS 0x0000000000000078ULL
100#define LPTE_WIRED 0x0000000000000010ULL
101#define LPTE_LOCKED 0x0000000000000008ULL
102#define LPTE_BIG 0x0000000000000004ULL /* 4kb/16Mb page */
103#define LPTE_HID 0x0000000000000002ULL
104#define LPTE_VALID 0x0000000000000001ULL
105
106/* Low quadword: */
107#define EXTEND_PTE(x) UINT64_C(x) /* make constants 64-bit */
108#define LPTE_RPGN 0xfffffffffffff000ULL
109#define LPTE_REF EXTEND_PTE( PTE_REF )
110#define LPTE_CHG EXTEND_PTE( PTE_CHG )
111#define LPTE_WIMG EXTEND_PTE( PTE_WIMG )
112#define LPTE_W EXTEND_PTE( PTE_W )
113#define LPTE_I EXTEND_PTE( PTE_I )
114#define LPTE_M EXTEND_PTE( PTE_M )
115#define LPTE_G EXTEND_PTE( PTE_G )
116#define LPTE_NOEXEC 0x0000000000000004ULL
117#define LPTE_PP EXTEND_PTE( PTE_PP )
118
119#define LPTE_SO EXTEND_PTE( PTE_SO ) /* Super. Only */
120#define LPTE_SW EXTEND_PTE( PTE_SW ) /* Super. Write-Only */
121#define LPTE_BW EXTEND_PTE( PTE_BW ) /* Supervisor */
122#define LPTE_BR EXTEND_PTE( PTE_BR ) /* Both Read Only */
123#define LPTE_RW LPTE_BW
124#define LPTE_RO LPTE_BR
125
126#ifndef LOCORE
127typedef struct pte pte_t;
128typedef struct lpte lpte_t;
129#endif /* LOCORE */
130
131/*
132 * Extract bits from address
133 */
134#define ADDR_SR_SHFT 28
135#define ADDR_PIDX 0x0ffff000UL
136#define ADDR_PIDX_SHFT 12
137#define ADDR_API_SHFT 22
138#define ADDR_API_SHFT64 16
139#define ADDR_POFF 0x00000fffUL
140
141/*
142 * Bits in DSISR:
143 */
144#define DSISR_DIRECT 0x80000000
145#define DSISR_NOTFOUND 0x40000000
146#define DSISR_PROTECT 0x08000000
147#define DSISR_INVRX 0x04000000
148#define DSISR_STORE 0x02000000
149#define DSISR_DABR 0x00400000
150#define DSISR_SEGMENT 0x00200000
151#define DSISR_EAR 0x00100000
152
153/*
154 * Bits in SRR1 on ISI:
155 */
156#define ISSRR1_NOTFOUND 0x40000000
157#define ISSRR1_DIRECT 0x10000000
158#define ISSRR1_PROTECT 0x08000000
159#define ISSRR1_SEGMENT 0x00200000
160
161#else /* BOOKE */
162
163#include <machine/tlb.h>
164
165/*
166 * 1st level - page table directory (pdir)
167 *
168 * pdir consists of 1024 entries, each being a pointer to
169 * second level entity, i.e. the actual page table (ptbl).
170 */
171#define PDIR_SHIFT 22
172#define PDIR_SIZE (1 << PDIR_SHIFT) /* va range mapped by pdir */
173#define PDIR_MASK (~(PDIR_SIZE - 1))
174#define PDIR_NENTRIES 1024 /* number of page tables in pdir */
175
176/* Returns pdir entry number for given va */
177#define PDIR_IDX(va) ((va) >> PDIR_SHIFT)
178
179#define PDIR_ENTRY_SHIFT 2 /* entry size is 2^2 = 4 bytes */
180
181/*
182 * 2nd level - page table (ptbl)
183 *
184 * Page table covers 1024 page table entries. Page
185 * table entry (pte) is 32 bit wide and defines mapping
186 * for a single page.
187 */
188#define PTBL_SHIFT PAGE_SHIFT
189#define PTBL_SIZE PAGE_SIZE /* va range mapped by ptbl entry */
190#define PTBL_MASK ((PDIR_SIZE - 1) & ~((1 << PAGE_SHIFT) - 1))
191#define PTBL_NENTRIES 1024 /* number of pages mapped by ptbl */
192
193/* Returns ptbl entry number for given va */
194#define PTBL_IDX(va) (((va) & PTBL_MASK) >> PTBL_SHIFT)
195
196/* Size of ptbl in pages, 1024 entries, each sizeof(struct pte_entry). */
197#define PTBL_PAGES 2
198#define PTBL_ENTRY_SHIFT 3 /* entry size is 2^3 = 8 bytes */
199
200/*
201 * Flags for pte_remove() routine.
202 */
203#define PTBL_HOLD 0x00000001 /* do not unhold ptbl pages */
204#define PTBL_UNHOLD 0x00000002 /* unhold and attempt to free ptbl pages */
205
206#define PTBL_HOLD_FLAG(pmap) (((pmap) == kernel_pmap) ? PTBL_HOLD : PTBL_UNHOLD)
207
208/*
209 * Page Table Entry definitions and macros.
210 */
211#ifndef LOCORE
212struct pte {
213 vm_offset_t rpn;
214 uint32_t flags;
215};
216typedef struct pte pte_t;
217#endif
218
219/* RPN mask, TLB0 4K pages */
220#define PTE_PA_MASK PAGE_MASK
221
222#if defined(BOOKE_E500)
223
224/* PTE bits assigned to MAS2, MAS3 flags */
225#define PTE_W MAS2_W
226#define PTE_I MAS2_I
227#define PTE_M MAS2_M
228#define PTE_G MAS2_G
229#define PTE_MAS2_MASK (MAS2_G | MAS2_M | MAS2_I | MAS2_W)
230
231#define PTE_MAS3_SHIFT 8
232#define PTE_UX (MAS3_UX << PTE_MAS3_SHIFT)
233#define PTE_SX (MAS3_SX << PTE_MAS3_SHIFT)
234#define PTE_UW (MAS3_UW << PTE_MAS3_SHIFT)
235#define PTE_SW (MAS3_SW << PTE_MAS3_SHIFT)
236#define PTE_UR (MAS3_UR << PTE_MAS3_SHIFT)
237#define PTE_SR (MAS3_SR << PTE_MAS3_SHIFT)
238#define PTE_MAS3_MASK ((MAS3_UX | MAS3_SX | MAS3_UW \
239 | MAS3_SW | MAS3_UR | MAS3_SR) << PTE_MAS3_SHIFT)
240
241#elif defined(BOOKE_PPC4XX)
242
243#define PTE_WL1 TLB_WL1
244#define PTE_IL2I TLB_IL2I
245#define PTE_IL2D TLB_IL2D
246
247#define PTE_W TLB_W
248#define PTE_I TLB_I
249#define PTE_M TLB_M
250#define PTE_G TLB_G
251
252#define PTE_UX TLB_UX
253#define PTE_SX TLB_SX
254#define PTE_UW TLB_UW
255#define PTE_SW TLB_SW
256#define PTE_UR TLB_UR
257#define PTE_SR TLB_SR
258
259#endif
260
261/* Other PTE flags */
262#define PTE_VALID 0x80000000 /* Valid */
263#define PTE_MODIFIED 0x40000000 /* Modified */
264#define PTE_WIRED 0x20000000 /* Wired */
265#define PTE_MANAGED 0x10000000 /* Managed */
266#define PTE_REFERENCED 0x04000000 /* Referenced */
267
268/* Macro argument must of pte_t type. */
269#define PTE_PA(pte) ((pte)->rpn & ~PTE_PA_MASK)
270#define PTE_ISVALID(pte) ((pte)->flags & PTE_VALID)
271#define PTE_ISWIRED(pte) ((pte)->flags & PTE_WIRED)
272#define PTE_ISMANAGED(pte) ((pte)->flags & PTE_MANAGED)
273#define PTE_ISMODIFIED(pte) ((pte)->flags & PTE_MODIFIED)
274#define PTE_ISREFERENCED(pte) ((pte)->flags & PTE_REFERENCED)
275
276#endif /* BOOKE_PPC4XX */
277#endif /* _MACHINE_PTE_H_ */
2 * Copyright (C) 1995, 1996 Wolfgang Solfrank.
3 * Copyright (C) 1995, 1996 TooLs GmbH.
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * 3. All advertising materials mentioning features or use of this software
15 * must display the following acknowledgement:
16 * This product includes software developed by TooLs GmbH.
17 * 4. The name of TooLs GmbH may not be used to endorse or promote products
18 * derived from this software without specific prior written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR
21 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
22 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
23 * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
24 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
25 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
26 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
27 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
28 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
29 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
30 *
31 * $NetBSD: pte.h,v 1.2 1998/08/31 14:43:40 tsubai Exp $
32 * $FreeBSD: head/sys/powerpc/include/pte.h 279595 2015-03-04 17:04:22Z nwhitehorn $
33 */
34
35#ifndef _MACHINE_PTE_H_
36#define _MACHINE_PTE_H_
37
38#if defined(AIM)
39
40/*
41 * Page Table Entries
42 */
43#ifndef LOCORE
44
45/* 32-bit PTE */
46struct pte {
47 u_int32_t pte_hi;
48 u_int32_t pte_lo;
49};
50
51struct pteg {
52 struct pte pt[8];
53};
54
55/* 64-bit (long) PTE */
56struct lpte {
57 u_int64_t pte_hi;
58 u_int64_t pte_lo;
59};
60
61struct lpteg {
62 struct lpte pt[8];
63};
64
65#endif /* LOCORE */
66
67/* 32-bit PTE definitions */
68
69/* High word: */
70#define PTE_VALID 0x80000000
71#define PTE_VSID_SHFT 7
72#define PTE_HID 0x00000040
73#define PTE_API 0x0000003f
74/* Low word: */
75#define PTE_RPGN 0xfffff000
76#define PTE_REF 0x00000100
77#define PTE_CHG 0x00000080
78#define PTE_WIMG 0x00000078
79#define PTE_W 0x00000040
80#define PTE_I 0x00000020
81#define PTE_M 0x00000010
82#define PTE_G 0x00000008
83#define PTE_PP 0x00000003
84#define PTE_SO 0x00000000 /* Super. Only (U: XX, S: RW) */
85#define PTE_SW 0x00000001 /* Super. Write-Only (U: RO, S: RW) */
86#define PTE_BW 0x00000002 /* Supervisor (U: RW, S: RW) */
87#define PTE_BR 0x00000003 /* Both Read Only (U: RO, S: RO) */
88#define PTE_RW PTE_BW
89#define PTE_RO PTE_BR
90
91#define PTE_EXEC 0x00000200 /* pseudo bit in attrs; page is exec */
92
93/* 64-bit PTE definitions */
94
95/* High quadword: */
96#define LPTE_VSID_SHIFT 12
97#define LPTE_AVPN_MASK 0xFFFFFFFFFFFFFF80ULL
98#define LPTE_API 0x0000000000000F80ULL
99#define LPTE_SWBITS 0x0000000000000078ULL
100#define LPTE_WIRED 0x0000000000000010ULL
101#define LPTE_LOCKED 0x0000000000000008ULL
102#define LPTE_BIG 0x0000000000000004ULL /* 4kb/16Mb page */
103#define LPTE_HID 0x0000000000000002ULL
104#define LPTE_VALID 0x0000000000000001ULL
105
106/* Low quadword: */
107#define EXTEND_PTE(x) UINT64_C(x) /* make constants 64-bit */
108#define LPTE_RPGN 0xfffffffffffff000ULL
109#define LPTE_REF EXTEND_PTE( PTE_REF )
110#define LPTE_CHG EXTEND_PTE( PTE_CHG )
111#define LPTE_WIMG EXTEND_PTE( PTE_WIMG )
112#define LPTE_W EXTEND_PTE( PTE_W )
113#define LPTE_I EXTEND_PTE( PTE_I )
114#define LPTE_M EXTEND_PTE( PTE_M )
115#define LPTE_G EXTEND_PTE( PTE_G )
116#define LPTE_NOEXEC 0x0000000000000004ULL
117#define LPTE_PP EXTEND_PTE( PTE_PP )
118
119#define LPTE_SO EXTEND_PTE( PTE_SO ) /* Super. Only */
120#define LPTE_SW EXTEND_PTE( PTE_SW ) /* Super. Write-Only */
121#define LPTE_BW EXTEND_PTE( PTE_BW ) /* Supervisor */
122#define LPTE_BR EXTEND_PTE( PTE_BR ) /* Both Read Only */
123#define LPTE_RW LPTE_BW
124#define LPTE_RO LPTE_BR
125
126#ifndef LOCORE
127typedef struct pte pte_t;
128typedef struct lpte lpte_t;
129#endif /* LOCORE */
130
131/*
132 * Extract bits from address
133 */
134#define ADDR_SR_SHFT 28
135#define ADDR_PIDX 0x0ffff000UL
136#define ADDR_PIDX_SHFT 12
137#define ADDR_API_SHFT 22
138#define ADDR_API_SHFT64 16
139#define ADDR_POFF 0x00000fffUL
140
141/*
142 * Bits in DSISR:
143 */
144#define DSISR_DIRECT 0x80000000
145#define DSISR_NOTFOUND 0x40000000
146#define DSISR_PROTECT 0x08000000
147#define DSISR_INVRX 0x04000000
148#define DSISR_STORE 0x02000000
149#define DSISR_DABR 0x00400000
150#define DSISR_SEGMENT 0x00200000
151#define DSISR_EAR 0x00100000
152
153/*
154 * Bits in SRR1 on ISI:
155 */
156#define ISSRR1_NOTFOUND 0x40000000
157#define ISSRR1_DIRECT 0x10000000
158#define ISSRR1_PROTECT 0x08000000
159#define ISSRR1_SEGMENT 0x00200000
160
161#else /* BOOKE */
162
163#include <machine/tlb.h>
164
165/*
166 * 1st level - page table directory (pdir)
167 *
168 * pdir consists of 1024 entries, each being a pointer to
169 * second level entity, i.e. the actual page table (ptbl).
170 */
171#define PDIR_SHIFT 22
172#define PDIR_SIZE (1 << PDIR_SHIFT) /* va range mapped by pdir */
173#define PDIR_MASK (~(PDIR_SIZE - 1))
174#define PDIR_NENTRIES 1024 /* number of page tables in pdir */
175
176/* Returns pdir entry number for given va */
177#define PDIR_IDX(va) ((va) >> PDIR_SHIFT)
178
179#define PDIR_ENTRY_SHIFT 2 /* entry size is 2^2 = 4 bytes */
180
181/*
182 * 2nd level - page table (ptbl)
183 *
184 * Page table covers 1024 page table entries. Page
185 * table entry (pte) is 32 bit wide and defines mapping
186 * for a single page.
187 */
188#define PTBL_SHIFT PAGE_SHIFT
189#define PTBL_SIZE PAGE_SIZE /* va range mapped by ptbl entry */
190#define PTBL_MASK ((PDIR_SIZE - 1) & ~((1 << PAGE_SHIFT) - 1))
191#define PTBL_NENTRIES 1024 /* number of pages mapped by ptbl */
192
193/* Returns ptbl entry number for given va */
194#define PTBL_IDX(va) (((va) & PTBL_MASK) >> PTBL_SHIFT)
195
196/* Size of ptbl in pages, 1024 entries, each sizeof(struct pte_entry). */
197#define PTBL_PAGES 2
198#define PTBL_ENTRY_SHIFT 3 /* entry size is 2^3 = 8 bytes */
199
200/*
201 * Flags for pte_remove() routine.
202 */
203#define PTBL_HOLD 0x00000001 /* do not unhold ptbl pages */
204#define PTBL_UNHOLD 0x00000002 /* unhold and attempt to free ptbl pages */
205
206#define PTBL_HOLD_FLAG(pmap) (((pmap) == kernel_pmap) ? PTBL_HOLD : PTBL_UNHOLD)
207
208/*
209 * Page Table Entry definitions and macros.
210 */
211#ifndef LOCORE
212struct pte {
213 vm_offset_t rpn;
214 uint32_t flags;
215};
216typedef struct pte pte_t;
217#endif
218
219/* RPN mask, TLB0 4K pages */
220#define PTE_PA_MASK PAGE_MASK
221
222#if defined(BOOKE_E500)
223
224/* PTE bits assigned to MAS2, MAS3 flags */
225#define PTE_W MAS2_W
226#define PTE_I MAS2_I
227#define PTE_M MAS2_M
228#define PTE_G MAS2_G
229#define PTE_MAS2_MASK (MAS2_G | MAS2_M | MAS2_I | MAS2_W)
230
231#define PTE_MAS3_SHIFT 8
232#define PTE_UX (MAS3_UX << PTE_MAS3_SHIFT)
233#define PTE_SX (MAS3_SX << PTE_MAS3_SHIFT)
234#define PTE_UW (MAS3_UW << PTE_MAS3_SHIFT)
235#define PTE_SW (MAS3_SW << PTE_MAS3_SHIFT)
236#define PTE_UR (MAS3_UR << PTE_MAS3_SHIFT)
237#define PTE_SR (MAS3_SR << PTE_MAS3_SHIFT)
238#define PTE_MAS3_MASK ((MAS3_UX | MAS3_SX | MAS3_UW \
239 | MAS3_SW | MAS3_UR | MAS3_SR) << PTE_MAS3_SHIFT)
240
241#elif defined(BOOKE_PPC4XX)
242
243#define PTE_WL1 TLB_WL1
244#define PTE_IL2I TLB_IL2I
245#define PTE_IL2D TLB_IL2D
246
247#define PTE_W TLB_W
248#define PTE_I TLB_I
249#define PTE_M TLB_M
250#define PTE_G TLB_G
251
252#define PTE_UX TLB_UX
253#define PTE_SX TLB_SX
254#define PTE_UW TLB_UW
255#define PTE_SW TLB_SW
256#define PTE_UR TLB_UR
257#define PTE_SR TLB_SR
258
259#endif
260
261/* Other PTE flags */
262#define PTE_VALID 0x80000000 /* Valid */
263#define PTE_MODIFIED 0x40000000 /* Modified */
264#define PTE_WIRED 0x20000000 /* Wired */
265#define PTE_MANAGED 0x10000000 /* Managed */
266#define PTE_REFERENCED 0x04000000 /* Referenced */
267
268/* Macro argument must of pte_t type. */
269#define PTE_PA(pte) ((pte)->rpn & ~PTE_PA_MASK)
270#define PTE_ISVALID(pte) ((pte)->flags & PTE_VALID)
271#define PTE_ISWIRED(pte) ((pte)->flags & PTE_WIRED)
272#define PTE_ISMANAGED(pte) ((pte)->flags & PTE_MANAGED)
273#define PTE_ISMODIFIED(pte) ((pte)->flags & PTE_MODIFIED)
274#define PTE_ISREFERENCED(pte) ((pte)->flags & PTE_REFERENCED)
275
276#endif /* BOOKE_PPC4XX */
277#endif /* _MACHINE_PTE_H_ */