| hid.h (209975) | hid.h (236025) |
|---|---|
| 1/*- 2 * Copyright (c) 2000 Tsubai Masanari. All rights reserved. 3 * 4 * Redistribution and use in source and binary forms, with or without 5 * modification, are permitted provided that the following conditions 6 * are met: 7 * 1. Redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer. --- 10 unchanged lines hidden (view full) --- 19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 24 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 25 * 26 * $NetBSD: hid.h,v 1.2 2001/08/22 21:05:25 matt Exp $ | 1/*- 2 * Copyright (c) 2000 Tsubai Masanari. All rights reserved. 3 * 4 * Redistribution and use in source and binary forms, with or without 5 * modification, are permitted provided that the following conditions 6 * are met: 7 * 1. Redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer. --- 10 unchanged lines hidden (view full) --- 19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 24 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 25 * 26 * $NetBSD: hid.h,v 1.2 2001/08/22 21:05:25 matt Exp $ |
| 27 * $FreeBSD: head/sys/powerpc/include/hid.h 209975 2010-07-13 05:32:19Z nwhitehorn $ | 27 * $FreeBSD: head/sys/powerpc/include/hid.h 236025 2012-05-25 21:12:24Z raj $ |
| 28 */ 29 30#ifndef _POWERPC_HID_H_ 31#define _POWERPC_HID_H_ 32 33/* Hardware Implementation Dependent registers for the PowerPC */ 34 35#define HID0_EMCP 0x80000000 /* Enable machine check pin */ --- 37 unchanged lines hidden (view full) --- 73#define HID0_NOPTI 0x00000001 /* No-op the dcbt(st) */ 74 75#define HID0_AIM_TBEN 0x04000000 /* Time base enable (7450) */ 76 77#define HID0_E500_TBEN 0x00004000 /* Time Base and decr. enable */ 78#define HID0_E500_SEL_TBCLK 0x00002000 /* Select Time Base clock */ 79#define HID0_E500_MAS7UPDEN 0x00000080 /* Enable MAS7 update (e500v2) */ 80 | 28 */ 29 30#ifndef _POWERPC_HID_H_ 31#define _POWERPC_HID_H_ 32 33/* Hardware Implementation Dependent registers for the PowerPC */ 34 35#define HID0_EMCP 0x80000000 /* Enable machine check pin */ --- 37 unchanged lines hidden (view full) --- 73#define HID0_NOPTI 0x00000001 /* No-op the dcbt(st) */ 74 75#define HID0_AIM_TBEN 0x04000000 /* Time base enable (7450) */ 76 77#define HID0_E500_TBEN 0x00004000 /* Time Base and decr. enable */ 78#define HID0_E500_SEL_TBCLK 0x00002000 /* Select Time Base clock */ 79#define HID0_E500_MAS7UPDEN 0x00000080 /* Enable MAS7 update (e500v2) */ 80 |
| 81#define HID0_E500MC_L2MMU_MHD 0x40000000 /* L2MMU Multiple Hit Detection */ 82 |
|
| 81#define HID0_BITMASK \ 82 "\20" \ 83 "\040EMCP\037DBP\036EBA\035EBD\034BCLK\033EICE\032ECLK\031PAR" \ 84 "\030DOZE\027NAP\026SLEEP\025DPM\024RISEG\023EIEC\022res\021NHR" \ 85 "\020ICE\017DCE\016ILOCK\015DLOCK\014ICFI\013DCFI\012SPD\011IFEM" \ 86 "\010SGE\007DCFA\006BTIC\005FBIOB\004ABE\003BHT\002NOPDST\001NOPTI" 87 88#define HID0_7450_BITMASK \ --- 11 unchanged lines hidden (view full) --- 100 "\010EN_MAS7_UPDATE\007DCFA\006b26\005b27\004b28\003b29\002b30\001NOPTI" 101 102#define HID0_970_BITMASK \ 103 "\20" \ 104 "\040ONEPPC\037SINGLE\036ISYNCSC\035SERGP\031DEEPNAP\030DOZE" \ 105 "\027NAP\025DPM\023TG\022HANGDETECT\021NHR\020INORDER" \ 106 "\016TBCTRL\015TBEN\012CIABREN\011HDICEEN\001ENATTN" 107 | 83#define HID0_BITMASK \ 84 "\20" \ 85 "\040EMCP\037DBP\036EBA\035EBD\034BCLK\033EICE\032ECLK\031PAR" \ 86 "\030DOZE\027NAP\026SLEEP\025DPM\024RISEG\023EIEC\022res\021NHR" \ 87 "\020ICE\017DCE\016ILOCK\015DLOCK\014ICFI\013DCFI\012SPD\011IFEM" \ 88 "\010SGE\007DCFA\006BTIC\005FBIOB\004ABE\003BHT\002NOPDST\001NOPTI" 89 90#define HID0_7450_BITMASK \ --- 11 unchanged lines hidden (view full) --- 102 "\010EN_MAS7_UPDATE\007DCFA\006b26\005b27\004b28\003b29\002b30\001NOPTI" 103 104#define HID0_970_BITMASK \ 105 "\20" \ 106 "\040ONEPPC\037SINGLE\036ISYNCSC\035SERGP\031DEEPNAP\030DOZE" \ 107 "\027NAP\025DPM\023TG\022HANGDETECT\021NHR\020INORDER" \ 108 "\016TBCTRL\015TBEN\012CIABREN\011HDICEEN\001ENATTN" 109 |
| 110#define HID0_E500MC_BITMASK \ 111 "\20" \ 112 "\040EMCP\037EN_L2MMU_MHD\036b2\035b3\034b4\033b5\032b6\031b7" \ 113 "\030b8\027b9\026b10\025b11\024b12\023b13\022b14\021b15" \ 114 "\020b16\017b17\016b18\015b19\014b20\013b21\012b22\011b23" \ 115 "\010EN_MAS7_UPDATE\007DCFA\006b26\005CIGLSO\004b28\003b29\002b30\001NOPTI" 116 117#define HID0_E5500_BITMASK \ 118 "\20" \ 119 "\040EMCP\037EN_L2MMU_MHD\036b2\035b3\034b4\033b5\032b6\031b7" \ 120 "\030b8\027b9\026b10\025b11\024b12\023b13\022b14\021b15" \ 121 "\020b16\017b17\016b18\015b19\014b20\013b21\012b22\011b23" \ 122 "\010b24\007DCFA\006b26\005CIGLSO\004b28\003b29\002b30\001NOPTI" 123 |
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| 108/* 109 * HID0 bit definitions per cpu model 110 * 111 * bit 603 604 750 7400 7410 7450 7457 e500 112 * 0 EMCP EMCP EMCP EMCP EMCP - - EMCP 113 * 1 - ECP DBP - - - - - 114 * 2 EBA EBA EBA EBA EDA - - - 115 * 3 EBD EBD EBD EBD EBD - - - --- 21 unchanged lines hidden (view full) --- 137 * 25 - - DCFA DCFA DCFA - - DCFA 138 * 26 - - BTIC BTIC BTIC BTIC BTIC - 139 * 27 FBIOB - - - - LRSTK LRSTK - 140 * 28 - - ABE - - FOLD FOLD - 141 * 29 - BHT BHT BHT BHT BHT BHT - 142 * 30 - - - NOPDST NOPDST NOPDST NOPDST - 143 * 31 NOOPTI - NOOPTI NOPTI NOPTI NOPTI NOPTI NOPTI 144 * | 124/* 125 * HID0 bit definitions per cpu model 126 * 127 * bit 603 604 750 7400 7410 7450 7457 e500 128 * 0 EMCP EMCP EMCP EMCP EMCP - - EMCP 129 * 1 - ECP DBP - - - - - 130 * 2 EBA EBA EBA EBA EDA - - - 131 * 3 EBD EBD EBD EBD EBD - - - --- 21 unchanged lines hidden (view full) --- 153 * 25 - - DCFA DCFA DCFA - - DCFA 154 * 26 - - BTIC BTIC BTIC BTIC BTIC - 155 * 27 FBIOB - - - - LRSTK LRSTK - 156 * 28 - - ABE - - FOLD FOLD - 157 * 29 - BHT BHT BHT BHT BHT BHT - 158 * 30 - - - NOPDST NOPDST NOPDST NOPDST - 159 * 31 NOOPTI - NOOPTI NOPTI NOPTI NOPTI NOPTI NOPTI 160 * |
| 161 * bit e500mc e5500 162 * 0 EMCP EMCP 163 * 1 EN_L2MMU_MHD EN_L2MMU_MHD 164 * 2 - - 165 * 3 - - 166 * 4 - - 167 * 5 - - 168 * 6 - - 169 * 7 - - 170 * 8 - - 171 * 9 - - 172 * 10 - - 173 * 11 - - 174 * 12 - - 175 * 13 - - 176 * 14 - - 177 * 15 - - 178 * 16 - - 179 * 17 - - 180 * 18 - - 181 * 19 - - 182 * 20 - - 183 * 21 - - 184 * 22 - - 185 * 23 - - 186 * 24 EN_MAS7_UPDATE - 187 * 25 DCFA DCFA 188 * 26 - - 189 * 27 CIGLSO CIGLSO 190 * 28 - - 191 * 29 - - 192 * 30 - - 193 * 31 NOPTI NOPTI 194 * |
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| 145 * 604: ECP = Enable cache parity checking 146 * 604: SIE = Serial instruction execution disable 147 * 7450: TBEN = Time Base Enable 148 * 7450: STEN = Software table lookup enable 149 * 7450: BHTCLR = Branch history clear 150 * 7450: XAEN = Extended Addressing Enabled 151 * 7450: LRSTK = Link Register Stack Enable 152 * 7450: FOLD = Branch folding enable 153 * 7457: HBATEN = High BAT Enable 154 * 7457: XBSEN = Extended BAT Block Size Enable 155 */ 156 157#define HID1_E500_ABE 0x00001000 /* Address broadcast enable */ 158#define HID1_E500_ASTME 0x00002000 /* Address bus streaming mode enable */ 159#define HID1_E500_RFXE 0x00020000 /* Read fault exception enable */ 160 161#define HID0_E500_DEFAULT_SET (HID0_EMCP | HID0_E500_TBEN) 162#define HID1_E500_DEFAULT_SET (HID1_E500_ABE | HID1_E500_ASTME) | 195 * 604: ECP = Enable cache parity checking 196 * 604: SIE = Serial instruction execution disable 197 * 7450: TBEN = Time Base Enable 198 * 7450: STEN = Software table lookup enable 199 * 7450: BHTCLR = Branch history clear 200 * 7450: XAEN = Extended Addressing Enabled 201 * 7450: LRSTK = Link Register Stack Enable 202 * 7450: FOLD = Branch folding enable 203 * 7457: HBATEN = High BAT Enable 204 * 7457: XBSEN = Extended BAT Block Size Enable 205 */ 206 207#define HID1_E500_ABE 0x00001000 /* Address broadcast enable */ 208#define HID1_E500_ASTME 0x00002000 /* Address bus streaming mode enable */ 209#define HID1_E500_RFXE 0x00020000 /* Read fault exception enable */ 210 211#define HID0_E500_DEFAULT_SET (HID0_EMCP | HID0_E500_TBEN) 212#define HID1_E500_DEFAULT_SET (HID1_E500_ABE | HID1_E500_ASTME) |
| 213#define HID0_E500MC_DEFAULT_SET (HID0_EMCP | HID0_E500MC_L2MMU_MHD | \ 214 HID0_E500_MAS7UPDEN) 215#define HID0_E5500_DEFAULT_SET (HID0_EMCP | HID0_E500MC_L2MMU_MHD) |
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| 163 164#define HID5_970_DCBZ_SIZE_HI 0x00000080UL /* dcbz does a 32-byte store */ 165#define HID4_970_DISABLE_LG_PG 0x00000004ULL /* disables large pages */ 166 167#endif /* _POWERPC_HID_H_ */ | 216 217#define HID5_970_DCBZ_SIZE_HI 0x00000080UL /* dcbz does a 32-byte store */ 218#define HID4_970_DISABLE_LG_PG 0x00000004ULL /* disables large pages */ 219 220#endif /* _POWERPC_HID_H_ */ |