| hid.h (176534) | hid.h (176742) |
|---|---|
| 1/*- 2 * Copyright (c) 2000 Tsubai Masanari. All rights reserved. 3 * 4 * Redistribution and use in source and binary forms, with or without 5 * modification, are permitted provided that the following conditions 6 * are met: 7 * 1. Redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer. --- 10 unchanged lines hidden (view full) --- 19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 24 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 25 * 26 * $NetBSD: hid.h,v 1.2 2001/08/22 21:05:25 matt Exp $ | 1/*- 2 * Copyright (c) 2000 Tsubai Masanari. All rights reserved. 3 * 4 * Redistribution and use in source and binary forms, with or without 5 * modification, are permitted provided that the following conditions 6 * are met: 7 * 1. Redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer. --- 10 unchanged lines hidden (view full) --- 19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 24 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 25 * 26 * $NetBSD: hid.h,v 1.2 2001/08/22 21:05:25 matt Exp $ |
| 27 * $FreeBSD: head/sys/powerpc/include/hid.h 176534 2008-02-25 00:09:23Z raj $ | 27 * $FreeBSD: head/sys/powerpc/include/hid.h 176742 2008-03-02 17:05:57Z raj $ |
| 28 */ 29 30#ifndef _POWERPC_HID_H_ 31#define _POWERPC_HID_H_ 32 33/* Hardware Implementation Dependent registers for the PowerPC */ 34 35#define HID0_EMCP 0x80000000 /* Enable MCP */ 36#define HID0_DBP 0x40000000 /* Disable 60x bus parity generation */ 37#define HID0_EBA 0x20000000 /* Enable 60x bus address parity checking */ 38#define HID0_EBD 0x10000000 /* Enable 60x bus data parity checking */ 39#define HID0_BCLK 0x08000000 /* CLK_OUT clock type selection */ 40#define HID0_EICE 0x04000000 /* Enable ICE output */ | 28 */ 29 30#ifndef _POWERPC_HID_H_ 31#define _POWERPC_HID_H_ 32 33/* Hardware Implementation Dependent registers for the PowerPC */ 34 35#define HID0_EMCP 0x80000000 /* Enable MCP */ 36#define HID0_DBP 0x40000000 /* Disable 60x bus parity generation */ 37#define HID0_EBA 0x20000000 /* Enable 60x bus address parity checking */ 38#define HID0_EBD 0x10000000 /* Enable 60x bus data parity checking */ 39#define HID0_BCLK 0x08000000 /* CLK_OUT clock type selection */ 40#define HID0_EICE 0x04000000 /* Enable ICE output */ |
| 41#define HID0_TBEN 0x04000000 /* Time base enable (7450) */ | |
| 42#define HID0_ECLK 0x02000000 /* CLK_OUT clock type selection */ 43#define HID0_PAR 0x01000000 /* Disable precharge of ARTRY */ 44#define HID0_STEN 0x01000000 /* Software table search enable (7450) */ 45#define HID0_HBATEN 0x00800000 /* High BAT enable (74[45][578]) */ 46#define HID0_DOZE 0x00800000 /* Enable doze mode */ 47#define HID0_NAP 0x00400000 /* Enable nap mode */ 48#define HID0_SLEEP 0x00200000 /* Enable sleep mode */ 49#define HID0_DPM 0x00100000 /* Enable Dynamic power management */ --- 16 unchanged lines hidden (view full) --- 66#define HID0_DCFA 0x00000040 /* Data cache flush assist */ 67#define HID0_BTIC 0x00000020 /* Enable BTIC */ 68#define HID0_LRSTK 0x00000010 /* Link register stack enable (7450) */ 69#define HID0_ABE 0x00000008 /* Enable address broadcast */ 70#define HID0_FOLD 0x00000008 /* Branch folding enable (7450) */ 71#define HID0_BHT 0x00000004 /* Enable branch history table */ 72#define HID0_NOPTI 0x00000001 /* No-op the dcbt(st) */ 73 | 41#define HID0_ECLK 0x02000000 /* CLK_OUT clock type selection */ 42#define HID0_PAR 0x01000000 /* Disable precharge of ARTRY */ 43#define HID0_STEN 0x01000000 /* Software table search enable (7450) */ 44#define HID0_HBATEN 0x00800000 /* High BAT enable (74[45][578]) */ 45#define HID0_DOZE 0x00800000 /* Enable doze mode */ 46#define HID0_NAP 0x00400000 /* Enable nap mode */ 47#define HID0_SLEEP 0x00200000 /* Enable sleep mode */ 48#define HID0_DPM 0x00100000 /* Enable Dynamic power management */ --- 16 unchanged lines hidden (view full) --- 65#define HID0_DCFA 0x00000040 /* Data cache flush assist */ 66#define HID0_BTIC 0x00000020 /* Enable BTIC */ 67#define HID0_LRSTK 0x00000010 /* Link register stack enable (7450) */ 68#define HID0_ABE 0x00000008 /* Enable address broadcast */ 69#define HID0_FOLD 0x00000008 /* Branch folding enable (7450) */ 70#define HID0_BHT 0x00000004 /* Enable branch history table */ 71#define HID0_NOPTI 0x00000001 /* No-op the dcbt(st) */ 72 |
| 73#define HID0_AIM_TBEN 0x04000000 /* Time base enable (7450) */ 74 75#define HID0_BOOKE_TBEN 0x00004000 /* Time Base and decr. enable */ 76#define HID0_BOOKE_SEL_TBCLK 0x00002000 /* Select Time Base clock */ 77#define HID0_BOOKE_MAS7UPDEN 0x00000080 /* Enable MAS7 update (e500v2) */ 78 |
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| 74#define HID0_BITMASK \ 75 "\20" \ 76 "\040EMCP\037DBP\036EBA\035EBD\034BCLK\033EICE\032ECLK\031PAR" \ 77 "\030DOZE\027NAP\026SLEEP\025DPM\024RISEG\023EIEC\022res\021NHR" \ 78 "\020ICE\017DCE\016ILOCK\015DLOCK\014ICFI\013DCFI\012SPD\011IFEM" \ 79 "\010SGE\007DCFA\006BTIC\005FBIOB\004ABE\003BHT\002NOPDST\001NOPTI" 80 81#define HID0_7450_BITMASK \ --- 8 unchanged lines hidden (view full) --- 90 "\040EMCP\037b1\036b2\035b3\034b4\033b5\032b6\031b7" \ 91 "\030DOZE\027NAP\026SLEEP\025b11\024b12\023b13\022b14\021b15" \ 92 "\020b16\017TBEN\016SEL_TBCLK\015b19\014b20\013b21\012b22\011b23" \ 93 "\010EN_MAS7_UPDATE\007DCFA\006b26\005b27\004b28\003b29\002b30\001NOPTI" 94 95/* 96 * HID0 bit definitions per cpu model 97 * | 79#define HID0_BITMASK \ 80 "\20" \ 81 "\040EMCP\037DBP\036EBA\035EBD\034BCLK\033EICE\032ECLK\031PAR" \ 82 "\030DOZE\027NAP\026SLEEP\025DPM\024RISEG\023EIEC\022res\021NHR" \ 83 "\020ICE\017DCE\016ILOCK\015DLOCK\014ICFI\013DCFI\012SPD\011IFEM" \ 84 "\010SGE\007DCFA\006BTIC\005FBIOB\004ABE\003BHT\002NOPDST\001NOPTI" 85 86#define HID0_7450_BITMASK \ --- 8 unchanged lines hidden (view full) --- 95 "\040EMCP\037b1\036b2\035b3\034b4\033b5\032b6\031b7" \ 96 "\030DOZE\027NAP\026SLEEP\025b11\024b12\023b13\022b14\021b15" \ 97 "\020b16\017TBEN\016SEL_TBCLK\015b19\014b20\013b21\012b22\011b23" \ 98 "\010EN_MAS7_UPDATE\007DCFA\006b26\005b27\004b28\003b29\002b30\001NOPTI" 99 100/* 101 * HID0 bit definitions per cpu model 102 * |
| 98 * bit 603 604 750 7400 7410 7450 7457 99 * 0 EMCP EMCP EMCP EMCP EMCP - - 100 * 1 - ECP DBP - - - - 101 * 2 EBA EBA EBA EBA EDA - - 102 * 3 EBD EBD EBD EBD EBD - - 103 * 4 SBCLK - BCLK BCKL BCLK - - 104 * 5 EICE - - - - TBEN TBEN 105 * 6 ECLK - ECLK ECLK ECLK - - 106 * 7 PAR PAR PAR PAR PAR STEN STEN 107 * 8 DOZE - DOZE DOZE DOZE - HBATEN 108 * 9 NAP - NAP NAP NAP NAP NAP 109 * 10 SLEEP - SLEEP SLEEP SLEEP SLEEP SLEEP 110 * 11 DPM - DPM DPM DPM DPM DPM 111 * 12 RISEG - - RISEG - - - 112 * 13 - - - EIEC EIEC BHTCLR BHTCLR 113 * 14 - - - - - XAEN XAEN 114 * 15 - NHR NHR NHR NHR NHR NHR 115 * 16 ICE ICE ICE ICE ICE ICE ICE 116 * 17 DCE DCE DCE DCE DCE DCE DCE 117 * 18 ILOCK ILOCK ILOCK ILOCK ILOCK ILOCK ILOCK 118 * 19 DLOCK DLOCK DLOCK DLOCK DLOCK DLOCK DLOCK 119 * 20 ICFI ICFI ICFI ICFI ICFI ICFI ICFI 120 * 21 DCFI DCFI DCFI DCFI DCFI DCFI DCFI 121 * 22 - - SPD SPD SPG SPD SPD 122 * 23 - - IFEM IFTT IFTT - XBSEN 123 * 24 - SIE SGE SGE SGE SGE SGE 124 * 25 - - DCFA DCFA DCFA - - 125 * 26 - - BTIC BTIC BTIC BTIC BTIC 126 * 27 FBIOB - - - - LRSTK LRSTK 127 * 28 - - ABE - - FOLD FOLD 128 * 29 - BHT BHT BHT BHT BHT BHT 129 * 30 - - - NOPDST NOPDST NOPDST NOPDST 130 * 31 NOOPTI - NOOPTI NOPTI NOPTI NOPTI NOPTI | 103 * bit 603 604 750 7400 7410 7450 7457 e500 104 * 0 EMCP EMCP EMCP EMCP EMCP - - EMCP 105 * 1 - ECP DBP - - - - - 106 * 2 EBA EBA EBA EBA EDA - - - 107 * 3 EBD EBD EBD EBD EBD - - - 108 * 4 SBCLK - BCLK BCKL BCLK - - - 109 * 5 EICE - - - - TBEN TBEN - 110 * 6 ECLK - ECLK ECLK ECLK - - - 111 * 7 PAR PAR PAR PAR PAR STEN STEN - 112 * 8 DOZE - DOZE DOZE DOZE - HBATEN DOZE 113 * 9 NAP - NAP NAP NAP NAP NAP NAP 114 * 10 SLEEP - SLEEP SLEEP SLEEP SLEEP SLEEP SLEEP 115 * 11 DPM - DPM DPM DPM DPM DPM - 116 * 12 RISEG - - RISEG - - - - 117 * 13 - - - EIEC EIEC BHTCLR BHTCLR - 118 * 14 - - - - - XAEN XAEN - 119 * 15 - NHR NHR NHR NHR NHR NHR - 120 * 16 ICE ICE ICE ICE ICE ICE ICE - 121 * 17 DCE DCE DCE DCE DCE DCE DCE TBEN 122 * 18 ILOCK ILOCK ILOCK ILOCK ILOCK ILOCK ILOCK SEL_TBCLK 123 * 19 DLOCK DLOCK DLOCK DLOCK DLOCK DLOCK DLOCK - 124 * 20 ICFI ICFI ICFI ICFI ICFI ICFI ICFI - 125 * 21 DCFI DCFI DCFI DCFI DCFI DCFI DCFI - 126 * 22 - - SPD SPD SPG SPD SPD - 127 * 23 - - IFEM IFTT IFTT - XBSEN - 128 * 24 - SIE SGE SGE SGE SGE SGE EN_MAS7_UPDATE 129 * 25 - - DCFA DCFA DCFA - - DCFA 130 * 26 - - BTIC BTIC BTIC BTIC BTIC - 131 * 27 FBIOB - - - - LRSTK LRSTK - 132 * 28 - - ABE - - FOLD FOLD - 133 * 29 - BHT BHT BHT BHT BHT BHT - 134 * 30 - - - NOPDST NOPDST NOPDST NOPDST - 135 * 31 NOOPTI - NOOPTI NOPTI NOPTI NOPTI NOPTI NOPTI |
| 131 * 132 * 604: ECP = Enable cache parity checking 133 * 604: SIE = Serial instruction execution disable 134 * 7450: TBEN = Time Base Enable 135 * 7450: STEN = Software table lookup enable 136 * 7450: BHTCLR = Branch history clear 137 * 7450: XAEN = Extended Addressing Enabled 138 * 7450: LRSTK = Link Register Stack Enable 139 * 7450: FOLD = Branch folding enable 140 * 7457: HBATEN = High BAT Enable 141 * 7457: XBSEN = Extended BAT Block Size Enable 142 */ 143 144#endif /* _POWERPC_HID_H_ */ | 136 * 137 * 604: ECP = Enable cache parity checking 138 * 604: SIE = Serial instruction execution disable 139 * 7450: TBEN = Time Base Enable 140 * 7450: STEN = Software table lookup enable 141 * 7450: BHTCLR = Branch history clear 142 * 7450: XAEN = Extended Addressing Enabled 143 * 7450: LRSTK = Link Register Stack Enable 144 * 7450: FOLD = Branch folding enable 145 * 7457: HBATEN = High BAT Enable 146 * 7457: XBSEN = Extended BAT Block Size Enable 147 */ 148 149#endif /* _POWERPC_HID_H_ */ |